Huei-Shan Lin

11 papers C 4Journal 6Unranked 1
YearRankTypeTitle / Venue / Authors
2013 J jnl
Reactant and Waste Minimization in Multitarget Sample Preparation on Digital Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Juinn-Dar Huang, Chia-Hung Liu, Huei-Shan Lin
2011 J jnl
Two-Dimensional Partially Differential Cepstrum and Its Applications on Filter Stabilization and Phase Unwrapping.
IEEE Trans. Circuits Syst. I Regul. Pap.
Soo-Chang Pei, Huei-Shan Lin
2010 J jnl
Closed-Form Design of Maximally Flat IIR Hilbert Transformer With Integer Delay.
IEEE Trans. Circuits Syst. I Regul. Pap.
Soo-Chang Pei, Huei-Shan Lin, Peng-Hua Wang
2010 C conf
Design of IIR allpass fractional-delay fractional Hilbert transformer using complex cepstrum.
ISCAS
Soo-Chang Pei, Huei-Shan Lin
2010 C conf
Two-dimensional partially differential cepstrum and minimum-phase sequence construction.
ISCAS
Soo-Chang Pei, Huei-Shan Lin
2009 J jnl
Tunable FIR and IIR Fractional-Delay Filter Design and Structure Based on Complex Cepstrum.
IEEE Trans. Circuits Syst. I Regul. Pap.
Soo-Chang Pei, Huei-Shan Lin
2007 C conf
Design of Allpass Fractional Delay Filter and Fractional Hilbert Transformer Using Closed-Form of Cepstral Coefficients.
ISCAS
Soo-Chang Pei, Huei-Shan Lin, Peng-Hua Wang
2006 C conf
Closed-form design of maximally flat FIR fractional delay filters.
ISCAS
Soo-Chang Pei, Huei-Shan Lin, Peng-Hua Wang
2006 J jnl
Closed-form design of maximally flat FIR fractional delay filters.
IEEE Signal Process. Lett.
Soo-Chang Pei, Peng-Hua Wang, Huei-Shan Lin
2006 J jnl
Minimum-Phase FIR Filter Design Using Real Cepstrum.
IEEE Trans. Circuits Syst. II Express Briefs
Soo-Chang Pei, Huei-Shan Lin
2005 — conf
Minimum-phase FIR filter design using real cepstrum.
EUSIPCO
Soo-Chang Pei, Huei-Shan Lin