Huaide Wang

16 papers Journal 8Unranked 8
YearRankTypeTitle / Venue / Authors
2024 J jnl
DOT-SLAM: A Stereo Visual Simultaneous Localization and Mapping (SLAM) System with Dynamic Object Tracking Based on Graph Optimization.
Sensors
Yuan Zhu, Hao An, Huaide Wang, Ruidong Xu, Zhipeng Sun, Ke Lu
2024 J jnl
DS-Trans: A 3D Object Detection Method Based on a Deformable Spatiotemporal Transformer for Autonomous Vehicles.
Remote. Sens.
Yuan Zhu, Ruidong Xu, Chongben Tao, Hao An, Huaide Wang, Zhipeng Sun, Ke Lu
2024 J jnl
RC-SLAM: Road Constrained Stereo Visual SLAM System Based on Graph Optimization.
Sensors
Yuan Zhu, Hao An, Huaide Wang, Ruidong Xu, Mingzhi Wu, Ke Lu
2024 — conf
Stereo Visual SLAM System with Road Constrained Based on Graph Optimization.
ICIRA (8)
Yuan Zhu, Hao An, Huaide Wang, Ruidong Xu, Ke Lu
2023 — conf
A Visual-Inertial Fusion Mapping and Localization System Using AprilTag in GNSS-Denied Scenes.
ICIRA (9)
Zhihong Wu, Hao An, Boyu Wu, Huaide Wang, Ke Lu
2023 — conf
DPC-SLAM: Discrete Plane Constrained VSLAM for Intelligent Vehicle in Road Environment.
ITSC
Zhihong Wu, Huaide Wang, Hao An, Yuan Zhu, Ruidong Xu, Ke Lu
2014 — conf
A 4K×2K@60fps multi-standard TV SoC processor with integrated HDMI/MHL receiver.
VLSIC
Chi-Cheng Ju, Tsu-Ming Liu, Huaide Wang, Yung-Chang Chang, Chih-Ming Wang, Chang-Lin Hsieh, Brian Liu, Hue-Min Lin, Chia-Yun Cheng, Chun-Chia Chen, Min-Hao Chiu, Sheng-Jen Wang, Ping Chao, Meng-Jye Hu, Ryan Yeh, Ted Chuang, Hsiu-Yi Lin, Chung-Hung Tsai
2011 — conf
An 87GHz QPSK transceiver with costas-loop carrier recovery in 65nm CMOS.
ISSCC
Shih-Jou Huang, Yu-Ching Yeh, Huaide Wang, Pang-Ning Chen, Jri Lee
2011 J jnl
W-Band BPSK and QPSK Transceivers With Costas-Loop Carrier Recovery in 65-nm CMOS Technology.
IEEE J. Solid State Circuits
Shih-Jou Huang, Yu-Ching Yeh, Huaide Wang, Pang-Ning Chen, Jri Lee
2010 J jnl
A 21-Gb/s 87-mW Transceiver With FFE/DFE/Analog Equalizer in 65-nm CMOS Technology.
IEEE J. Solid State Circuits
Huaide Wang, Jri Lee
2009 J jnl
Study of Subharmonically Injection-Locked PLLs.
IEEE J. Solid State Circuits
Jri Lee, Huaide Wang
2009 — conf
Subharmonically injection-locked PLLs for ultra-low-noise clock generation.
ISSCC
Jri Lee, Huaide Wang, Wen-Tsao Chen, Yung-Pin Lee
2008 — conf
A 20Gb/s Duobinary Transceiver in 90nm CMOS.
ISSCC
Jri Lee, Ming-Shuan Chen, Huaide Wang
2008 J jnl
A 75-GHz Phase-Locked Loop in 90-nm CMOS Technology.
IEEE J. Solid State Circuits
Jri Lee, Mingchung Liu, Huaide Wang
2008 J jnl
Design and Comparison of Three 20-Gb/s Backplane Transceivers for Duobinary, PAM4, and NRZ Data.
IEEE J. Solid State Circuits
Jri Lee, Ming-Shuan Chen, Huaide Wang
2007 — conf
A 20Gb/s Broadband Transmitter with Auto-Configuration Technique.
ISSCC
Jri Lee, Huaide Wang