Huaguo Liang

175 papers A 3C 8Misc 3Journal 131Unranked 29
YearRankTypeTitle / Venue / Authors
2026 J jnl
A Lightweight and High-Throughput True Random Number Generator Based on Hybrid Entropy Source.
Int. J. Circuit Theory Appl.
Yingchun Lu, Rong Hu, Xinkai Wu, Huaguo Liang, Zhengfeng Huang, Liang Yao, Lixiang Ma
2026 J jnl
A Parallel Feedback Obfuscation Strong PUF Against Machine-Learning Modeling Attacks and Lightweight Authentication Protocol.
IEEE Trans. Dependable Secur. Comput.
Zhengfeng Huang, Yankun Lin, Zezheng Wang, Yingchun Lu, Huaguo Liang, Jingchang Bian, Yiming Ouyang, Tianming Ni, Xiaoqing Wen
2026 J jnl
A Phase-Walk-Based True Random Number Generator Exploiting Dual-Ring Phase Jitter Comparison.
IEEE Trans. Circuits Syst. II Express Briefs
Liang Yao, Peiyang Kang, Jiahao Zhang, Yaohua Xu, Ying Zhang, Xiumin Xu, Huaguo Liang, Zhengfeng Huang, Yingchun Lu
2026 J jnl
Design of a dynamic obfuscation-based strong PUF resistant to modeling attacks and mutual authentication protocol.
Integr.
Yingchun Lu, Hongliang Lu, Yujie Liu, Huaguo Liang, Zhengfeng Huang, Jinlin Chen, Xiumin Xu, Liang Yao
2026 J jnl
FTPUF:Feedback structure of TERO PUF for high reliability.
Integr.
Yingchun Lu, Xinkai Wu, Jinlin Chen, Huaguo Liang, Zhengfeng Huang, Xiumin Xu, Bo Liu
2026 J jnl
RO-like ring-based TRNG with adaptive mode switching for enhanced entropy Harvesting.
Integr.
Jinlin Chen, Huaguo Liang, Yingchun Lu, Liang Yao
2026 J jnl
Ring Oscillator-Based PreBond TSV Testing Method With Classification and Grading of Defects.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xianrui Dou, Huaguo Liang, Zhengfeng Huang, Yingchun Lu, Tian Chen, Jun Liu
2025 J jnl
A Block-Group-Based Redundant TSV Architecture for Clustered Faults.
IEEE Trans. Very Large Scale Integr. Syst.
Jun Liu, Tianhao Du, Mulin Ye, Tian Chen, Xi Wu, Tianming Ni, Huaguo Liang
2025 — conf
A High-Precision Pre-Bond TSV Delay-Fault Detection Technique Using Digitally Controlled Delay Lines.
ITC-Asia
Zhongyuan Liang, Huaguo Liang, Weikun Chen, Xianrui Dou
2025 J jnl
A QNU hardened latch design with low cost high stability and high performance.
Microelectron. J.
Zhengfeng Huang, Xinyu Jiang, Linya Qiu, Yuxin Zhu, Can Liu, Huaguo Liang, Yiming Ouyang, Tianming Ni
2025 J jnl
A TSV Misalignment-Based Repair Architecture in 3-D Chips.
IEEE Trans. Very Large Scale Integr. Syst.
Huaguo Liang, Jiahui Xiao, Xianrui Dou, Tianming Ni, Yingchun Lu, Zhengfeng Huang
2025 J jnl
A chaotic strong transition effect ring oscillator PUF with effective immunity to modeling attacks.
Microelectron. J.
Jingchang Bian, Xingchen Du, Yingchun Lu, Aibin Yan, Huaguo Liang, Zhengfeng Huang
2025 J jnl
A design of lightweight true random number generator based on Galois LFSR with dynamic feedback path.
Microelectron. J.
Zihao Miao, Huaguo Liang, Xin Li, Yingchun Lu, Liang Yao
2025 J jnl
A reliability-noise-delay quantification method for APUF physical modeling and CRPs screening.
Microelectron. J.
Zhengfeng Huang, Ruixiang Liu, Zezheng Wang, Yanrong Zhu, Jingchang Bian, Zhao Yang, Yingchun Lu, Yiming Ouyang, Huaguo Liang, Tianming Ni
2025 J jnl
A true random number generator based on autonomous Boolean network with imbalanced node oscillation rings.
Microelectron. J.
Maoxiang Yi, Zhengwen Liu, Zihao Miao, Yingchun Lu, Huaguo Liang, Lixiang Ma
2025 J jnl
BF PUF: A Modeling Attack-Resistant Strong PUF Based on Bent Functions.
IEEE Trans. Very Large Scale Integr. Syst.
Zhengfeng Huang, Fansheng Zeng, Yanqiao Chi, Yankun Lin, Yingchun Lu, Huaguo Liang, Jingchang Bian, Yiming Ouyang, Tianming Ni, Xiaoqing Wen
2025 — conf
Design of a Dynamic Obfuscation-Based Strong PUF Resistant to Modeling Attacks.
SBCCI
Yingchun Lu, Hongliang Lu, Yujie Liu, Huaguo Liang, Cuiyun Jiang, Zhengfeng Huang, Xiumin Xu, Liang Yao
2025 J jnl
ESegNet-ILT: An end-to-end mask optimization method in VLSI design flow based on enhanced SegNet.
Integr.
Hui Xu, Yong Xue, Yu Zhang, Xia Sun, Jiale Li, Ruijun Ma, Huaguo Liang, Zhengfeng Huang
2025 J jnl
Fabdb: a low-latency fault-tolerant architecture based on dynamic bypass for network-on-chip.
J. Supercomput.
Yiming Ouyang, Zhuoxuan Ji, Jianhua Li, Huaguo Liang
2025 J jnl
High throughput true random number generator based on dynamically superimposed hybrid entropy sources.
Integr.
Yingchun Lu, Changlong Cao, Yang Li, Huaguo Liang, Liang Yao, Lixiang Ma
2025 J jnl
IRCA-TRNG: A Lightweight Dual-Ring Chaotic TRNG With Perturbation Refresh for High Throughput.
IEEE Trans. Very Large Scale Integr. Syst.
Liang Yao, Peiyang Kang, Deqin Shi, Yaohua Xu, Yunlai Zhu, Zhengfeng Huang, Huaguo Liang, Yingchun Lu, Aibin Yan, Ying Zhang
2025 J jnl
Improve SAC in PUFs: Metric, Analysis, Algorithm, and Application.
IEEE Internet Things J.
Zhengfeng Huang, Ruixiang Liu, Fansheng Zeng, Jingchang Bian, Huaguo Liang, Yingchun Lu, Tianming Ni
2025 J jnl
Lightweight high-throughput true random number generator based on state switchable ring oscillator.
Integr.
Shehui Wu, Huaguo Liang, Siyu Wang, Hao Lv, Maoxiang Yi, Yingchun Lu
2025 J jnl
Low test cost adaptive testing method for high yield IC products.
Integr.
Yuqi Pan, Huaguo Liang, Junming Li, Zhengfeng Huang, Maoxiang Yi, Yingchun Lu
2025 J jnl
PRLM: A parallel loading mechanism for a deep neural network accelerator based on NoC.
Microelectron. J.
Yiming Ouyang, Chengming An, Jianhua Li, Huaguo Liang
2025 J jnl
Prebond Test of TSV Based on Voltage Skew Amplification.
IEEE Trans. Circuits Syst. II Express Briefs
Xianrui Dou, Huaguo Liang, Zhengfeng Huang, Yingchun Lu, Yue Wang, Tian Chen, Jun Liu
2025 J jnl
Pulse-Based Prebond TSV Testing.
IEEE Trans. Very Large Scale Integr. Syst.
Xianrui Dou, Huaguo Liang, Zhengfeng Huang, Yingchun Lu, Tian Chen, Maoxiang Yi
2025 J jnl
RHT_NoC: A Reconfigurable Hybrid Topology Architecture for Chiplet-Based Multicore System.
IEEE Trans. Very Large Scale Integr. Syst.
Dongyu Xu, Wu Zhou, Zhengfeng Huang, Huaguo Liang, Xiaoqing Wen
2025 J jnl
SegNet-OPC: A Mask Optimization Framework in VLSI Design Flow Based on Semantic Segmentation Network.
J. Comput. Sci. Technol.
Hui Xu, Pan Qi, Fuxin Tang, Huaguo Liang, Zhengfeng Huang
2025 J jnl
Segmentation-Enhanced Overlapped Defect Identification for Multipatterns Wafer Maps.
IEEE Trans. Instrum. Meas.
Tianming Ni, Wen Jiang, Huaguo Liang, Xiaoqing Wen, Mu Nie
2025 J jnl
Semi-supervised lithography hotspot detection based on feature fusion and residual attention.
Integr.
Hui Xu, Xinzhong Xiao, Wenxin Huang, Ruijun Ma, Fuxin Tang, Pan Qi, Ye Yuan, Huaguo Liang
2025 C conf
TNURML: Triple-Node-Upset-Recovery Magnetic Latch Design with Non-Volatility for Aerospace Applications.
ISCAS
Aibin Yan, Zhiyuan Pei, Xing Guo, Jie Song, Cuiyun Jiang, Huaguo Liang, Xiaoqing Wen, Patrick Girard
2025 J jnl
Ultra-High Efficiency TRNG IP Based on Mesh Topology of Coupled-XOR.
IEEE Trans. Circuits Syst. I Regul. Pap.
Yingchun Lu, Enpu Xu, Yujie Liu, Jinlin Chen, Huaguo Liang, Zhengfeng Huang, Liang Yao
2024 J jnl
A High-Performance Quadruple-Node-Upset-Tolerant Latch Design and an Algorithm for Tolerance Verification of Hardened Latches.
J. Electron. Test.
Hui Xu, Xuewei Qin, Ruijun Ma, Chaoming Liu, Shuo Zhu, Jun Wang, Huaguo Liang
2024 J jnl
A Low-Cost Triple-Node-Upset Self-Recovery Latch Design.
J. Circuits Syst. Comput.
Hui Xu, Yu Xia, Ruijun Ma, Huaguo Liang, Zhenfeng Huang
2024 J jnl
A Quadruple-Node Upsets Hardened Latch Design Based on Cross-Coupled Elements.
J. Electron. Test.
Zhengfeng Huang, Zishuai Li, Liting Sun, Huaguo Liang, Tianming Ni, Aibin Yan
2024 — conf
A RO-Integrated-LFSR-Based Nonlinear Strong PUF with Intrinsic Modeling Attacks Resilience.
ITC-Asia
Jingchang Bian, Zhengfeng Huang, Ruixiang Liu, Yankun Lin, Zhao Yang, Huaguo Liang, Aibin Yan
2024 J jnl
A Reliability-Aware Splitting Duty-Cycle Physical Unclonable Function Based on Trade-off Process, Voltage, and Temperature Variations.
ACM Trans. Design Autom. Electr. Syst.
Jingchang Bian, Zhengfeng Huang, Peng Ye, Zhao Yang, Huaguo Liang
2024 J jnl
A Scan-Chain-Based Built-in Self-Test for ILV in Monolithic 3-D ICs.
IEEE Trans. Instrum. Meas.
Tian Chen, Ruiyuan Ding, Jun Liu, Xiaohui Yuan, Yingchun Lu, Huaguo Liang, Siyuan Liu
2024 J jnl
A Self-Biased Current Reference Source-Based Pre-Bond TSV Test Solution.
IEEE Trans. Very Large Scale Integr. Syst.
Jun Liu, Songren Cheng, Tian Chen, Xi Wu, Huaguo Liang
2024 J jnl
A Symmetric Bridge-Based Pre-Bond TSV Faults Detection Method.
IEEE Trans. Instrum. Meas.
Jun Liu, Zhi Chen, Songren Cheng, Chen Xiang, Tian Chen, Xi Wu, Yingchun Lu, Huaguo Liang
2024 J jnl
A cost-effective and highly robust triple-node-upset self-recoverable latch design based on dual-output C-elements.
Microelectron. J.
Hui Xu, Lin Tang, Ruijun Ma, Huaguo Liang, Zhengfeng Huang, Tianming Ni, Jiuqi Li, Xiaodong Ai
2024 J jnl
A lightweight reversible multi-mode physical unclonable function.
Microelectron. J.
Zhengfeng Huang, Peng Ye, Ruixiang Liu, Jingchang Bian, Zhao Yang, Yingchun Lu, Yiming Ouyang, Huaguo Liang, Tianming Ni
2024 J jnl
A machine learning resistant PUF circuit adjustment method based on strict avalanche criterion.
IEICE Electron. Express
Jinhao Xie, Huaguo Liang, Changlong Cao, Liang Yao, Yingchun Lu
2024 J jnl
A self-training end-to-end mask optimization framework based on semantic segmentation network.
Integr.
Hui Xu, Fuxin Tang, Pan Qi, Ye Yuan, Huaguo Liang, Zhengfeng Huang
2024 J jnl
A tree-recursive partitioned multicast mechanism for NoC-based deep neural network accelerator.
Microelectron. J.
Yiming Ouyang, Yihe Zhang, Huaguo Liang, Jianhua Li
2024 J jnl
DBU-PG: energy-efficient noc design using dual-buffering power gating.
J. Supercomput.
Yiming Ouyang, Cheng Cao, Dongyu Xu, Wu Zhou, Zhengfeng Huang, Huaguo Liang
2024 J jnl
Design Guidelines and Feedback Structure of Ring Oscillator PUF for Performance Improvement.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Zhengfeng Huang, Jingchang Bian, Yankun Lin, Huaguo Liang, Tianming Ni
2024 J jnl
Design of novel low cost triple-node-upset self-recoverable hardened latch.
Integr.
Hui Xu, Shuo Zhu, Ruijun Ma, Zhengfeng Huang, Huaguo Liang, Haojie Sun, Chaoming Liu
2024 J jnl
Design of radiation hardened latch with low delay and tolerance of quadruple-node-upset in 32 nm process.
Microelectron. J.
Zhengfeng Huang, Xin Chen, Xinyu Jiang, Lei Ai, Huaguo Liang, Yiming Ouyang, Tianming Ni
2024 J jnl
Designs of High-Speed Triple-Node-Upset Hardened Latch Based on Dual-Modular-Redundancy.
J. Circuits Syst. Comput.
Zhengfeng Huang, Yan Zhang, Lei Ai, Huaguo Liang, Tianming Ni, Tai Song, Aibin Yan
2024 J jnl
F-Bypass: A Low-Power Network-on-Chip Design Utilizing Bypass to Improve Network Connectivity.
ACM J. Emerg. Technol. Comput. Syst.
Yiming Ouyang, Shuaijie Yuan, Jianhua Li, Huaguo Liang
2024 J jnl
Fault-tolerant routing for reliable packet transmission in on-chip networks.
Microelectron. J.
Yiming Ouyang, Tianbao Zhang, Jianhua Li, Huaguo Liang
2024 J jnl
High throughput dynamic dual entropy source true random number generator based on FPGA.
Microelectron. J.
Yu Chen, Huaguo Liang, Linghui Zhang, Liang Yao, Yingchun Lu
2024 J jnl
Lightweight Hybrid Entropy Source True Random Number Generator Based on Jitter and Metastability.
IEEE Trans. Circuits Syst. II Express Briefs
Shihao Yang, Huaguo Liang, Rong Hu, Liang Yao, Zhengfeng Huang, Maoxiang Yi, Yingchun Lu
2024 — conf
MTCX: Ultra-high Throughput TRNG Based on Mesh topology of Coupled-XOR.
ATS
Yingchun Lu, Enpu Xu, Huaguo Liang, Cuiyun Jiang, Lixiang Ma, Liang Yao
2024 — conf
Machine Learning-Based Diagnosis of Defects in Chiplet Interconnects.
3DIC
Junming Li, Huaguo Liang, Xianrui Dou, Le Yu, Zhengfeng Huang, Yingchun Lu, Cuiyun Jiang
2024 J jnl
Multi-transition delay test for improving the coverage of cell internal defects.
IEICE Electron. Express
Hong Zhang, Huaguo Liang, Yue Wang, Danqing Li, Zhiwei Shao, Maoxiang Yi, Yingchun Lu, Zhengfeng Huang
2024 J jnl
NEST: A Quadruple-Node Upset Recovery Latch Design and Algorithm-Based Recovery Optimization.
IEEE Trans. Aerosp. Electron. Syst.
Zhengfeng Huang, Liting Sun, Xu Wang, Huaguo Liang, Yingchun Lu, Aibin Yan, Jun Pan, Xiaoqing Wen
2024 — conf
PFO PUF: A Lightweight Parallel Feed Obfuscation PUF Resistant to Machine Learning Attacks.
ITC-Asia
Zhengfeng Huang, Yankun Lin, Fansheng Zeng, Jingchang Bian, Zhao Yang, Huaguo Liang, Yingchun Lu, Liang Yao, Xiaoqing Wen, Tianming Ni
2024 J jnl
Reliability analysis and comparison of ring-PUF based on probabilistic models.
Microelectron. J.
Jingchang Bian, Zhengfeng Huang, Yankun Lin, Zhao Yang, Huaguo Liang, Tianming Ni
2024 J jnl
SPONGE+: A NoC-based power gating scheme for overall router column opening and closing control.
Microelectron. J.
Yiming Ouyang, Zhiyuan Chen, Dongyu Xu, Huaguo Liang
2024 J jnl
Traffic-oriented reconfigurable NoC with augmented inter-port buffer sharing.
Frontiers Inf. Technol. Electron. Eng.
Chenglong Sun, Yiming Ouyang, Huaguo Liang
2024 J jnl
Voltage Skew-Based Test Technique for Pre-Bond TSVs in 3-D ICs.
IEEE Trans. Circuits Syst. II Express Briefs
Jun Liu, Zhi Chen, Tian Chen, Xi Wu, Huaguo Liang, Xiaohui Yuan
2024 J jnl
Wafer-level Adaptive Testing Based on Dual-Predictor Collaborative Decision.
J. Electron. Test.
Yuqi Pan, Huaguo Liang, Junming Li, Jinxing Qu, Zhengfeng Huang, Maoxiang Yi, Yingchun Lu
2023 J jnl
A dynamically reconfigurable entropy source circuit for high-throughput true random number generator.
Microelectron. J.
Liyu Jin, Maoxiang Yi, Yuan Xiao, Lifa Sun, Yingchun Lu, Huaguo Liang
2023 J jnl
Design of approximate Booth multipliers based on error compensation.
Integr.
Yongxia Sheng, Huaguo Liang, Bao Fang, Cuiyun Jiang, Zhengfeng Huang, Maoxiang Yi, Yingchun Lu
2023 J jnl
Dynamic detection of wireless interface faults and fault-tolerant routing algorithm in WiNoC.
Integr.
Yiming Ouyang, Dongyu Xu, Chang Qian, Wu Zhou, Qi Wang, Huaguo Liang
2023 J jnl
Energy-Efficient Multiple Network-on-Chip Architecture With Bandwidth Expansion.
IEEE Trans. Very Large Scale Integr. Syst.
Wu Zhou, Yiming Ouyang, Dongyu Xu, Zhengfeng Huang, Huaguo Liang, Xiaoqing Wen
2023 J jnl
Fault-avoidance C-element based low overhead and TNU-resilient latch.
Microelectron. J.
Zhengfeng Huang, Zhouyu Gong, Dongxing Ma, Xiaolei Wang, Yingchun Lu, Wenfa Zhan, Huaguo Liang, Tianming Ni
2023 J jnl
High-efficiency TRNG Design Based on Multi-bit Dual-ring Oscillator.
ACM Trans. Reconfigurable Technol. Syst.
Yingchun Lu, Yun Yang, Rong Hu, Huaguo Liang, Maoxiang Yi, Zhengfeng Huang, Yuanming Ma, Tian Chen, Liang Yao
2023 J jnl
Improvement of cell internal weak defects detection under process variation by optimizing test path and test pattern.
Microelectron. J.
Hong Zhang, Huaguo Liang, Jiewen Hu, Zhiwei Shao, Maoxiang Yi, Yingchun Lu, Zhengfeng Huang
2023 J jnl
Improving power and performance of on-chip network through virtual channel sharing and power gating.
Integr.
Dongyu Xu, Yiming Ouyang, Wu Zhou, Huaguo Liang
2023 J jnl
LQNTL: Low-overhead quadruple-node-upset self-recovery latch based on triple-mode redundancy.
Integr.
Hui Xu, Jing Zhou, Ruijun Ma, Huaguo Liang, Zhengfeng Huang, Chaoming Liu
2023 J jnl
Low Overhead and High Stability Radiation-Hardened Latch for Double/Triple Node Upsets.
J. Electron. Test.
Zhengfeng Huang, Hao Wang, Dongxing Ma, Huaguo Liang, Yiming Ouyang, Aibin Yan
2023 J jnl
Low-overhead TRNG based on MUX for cryptographic protection using multiphase sampling.
J. Supercomput.
Liang Yao, Huaguo Liang, Yingchun Lu
2023 J jnl
Novel Critical Gate-Based Circuit Path-Level NBTI-Aware Aging Circuit Degradation Prediction.
J. Circuits Syst. Comput.
Hui Xu, Rui Zhu, Xia Sun, Xianjin Fang, Pan Qi, Huaguo Liang, Zhengfeng Huang
2023 J jnl
Overhead Optimized and Quadruple-Node-Upset Self-Recoverable Latch Design Based on Looped C-Element Matrix.
IEEE Trans. Aerosp. Electron. Syst.
Zhengfeng Huang, Dongxing Ma, Runwu Ji, Huaguo Liang, Aibin Yan, Tai Song, Tianming Ni
2023 J jnl
RMC_NoC: A Reliable On-Chip Network Architecture With Reconfigurable Multifunctional Channel.
IEEE Trans. Very Large Scale Integr. Syst.
Dongyu Xu, Yiming Ouyang, Wu Zhou, Zhengfeng Huang, Huaguo Liang, Xiaoqing Wen
2023 J jnl
URMP: using reconfigurable multicast path for NoC-based deep neural network accelerators.
J. Supercomput.
Yiming Ouyang, Jiaxin Wang, Chenglong Sun, Qi Wang, Huaguo Liang
2022 — conf
A Lightweight M_TRNG Design based on MUX Cell Entropy using Multiphase Sampling.
AsianHOST
Liang Yao, Huaguo Liang, Hong Zhang, Tianming Ni, Maoxiang Yi, Yingchun Lu
2022 J jnl
A Low Power-Consumption Triple-Node-Upset-Tolerant Latch Design.
J. Electron. Test.
Yingchun Lu, Guangzhen Hu, Jianan Wang, Hao Wang, Liang Yao, Huaguo Liang, Maoxiang Yi, Zhengfeng Huang
2022 J jnl
A reconfigurable PUF structure with dual working modes based on entropy separation model.
Microelectron. J.
Yanjie Wang, Huaguo Liang, Yuchuan Wang, Liang Yao, Maoxiang Yi, Zhengfeng Huang, Yingchun Lu
2022 J jnl
A reconfigurable test method based on LFSR for 3D stacking integrated circuits.
Integr.
Chen Tian, JianYong Lu, Liu Jun, Huaguo Liang, Yingchun Lu, Maoxiang Yi
2022 J jnl
A router architecture with dual input and dual output channels for Networks-on-Chip.
Microprocess. Microsystems
Wu Zhou, Yiming Ouyang, Yingchun Lu, Huaguo Liang
2022 J jnl
Architecting a congestion pre-avoidance and load-balanced wireless network-on-chip.
J. Parallel Distributed Comput.
Chenglong Sun, Yiming Ouyang, Huaguo Liang
2022 J jnl
Design of True Random Number Generator Based on Multi-Stage Feedback Ring Oscillator.
IEEE Trans. Circuits Syst. II Express Briefs
Jianguo Cui, Maoxiang Yi, Di Cao, Liang Yao, Xinyu Wang, Huaguo Liang, Zhengfeng Huang, Haochen Qi, Tianming Ni, Yingchun Lu
2022 J jnl
Design of fully adaptive routing and hybrid VC allocation in wireless NOC.
Microelectron. J.
Yiming Ouyang, Ruifeng Li, Chunlei Hu, Qi Wang, Yingchun Lu, Huaguo Liang
2022 J jnl
Low-Power Anti-Glitch Double-Edge Triggered Flip-Flop Based on Robust C-Elements.
J. Circuits Syst. Comput.
Zhengfeng Huang, Wanshu Zhong, Lanxi Duan, Yue Zhang, Huaguo Liang, Jianan Wang, Tai Song, Yingchun Lu
2022 J jnl
M-RO PUF: A portable pure digital RO PUF based on MUX unit.
Microelectron. J.
Liang Yao, Huaguo Liang, Qian Han, Hong Zhang, Zhengfeng Huang, Cuiyun Jiang, Maoxiang Yi, Yingchun Lu
2022 J jnl
REE: Reconfigurable and energy-efficient router architecture in wireless network-on-chip.
Microelectron. J.
Yiming Ouyang, Dongyu Xu, Zhimou Chen, Rongjing Chen, Wu Zhou, Huaguo Liang
2021 J jnl
A Cost-Effective TSV Repair Architecture for Clustered Faults in 3-D IC.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Tianming Ni, Qi Xu, Zhengfeng Huang, Huaguo Liang, Aibin Yan, Xiaoqing Wen
2021 — conf
A N: 1 Single-Channel TDMA Fault-Tolerant Technique for TSVs in 3D-ICs.
ITC-Asia
Huaguo Liang, Danqing Li, Zhao Yang, Tianming Ni, Zhengfeng Huang, Cuiyun Jiang
2021 J jnl
A high reliability physically unclonable function based on multiple tunable ring oscillator.
Microelectron. J.
Yuan Zhang, Huaguo Liang, Liang Yao, Maoxiang Yi, Zhengfeng Huang, Yingchun Lu
2021 J jnl
A high-speed and triple-node-upset recovery latch with heterogeneous interconnection.
Microelectron. J.
Zhengfeng Huang, Hao Wang, Yang Ang, Huaguo Liang, Yiming Ouyang, Tianming Ni
2021 J jnl
Approximate multipliers based on a novel unbiased approximate 4-2 compressor.
Integr.
Bao Fang, Huaguo Liang, Dawen Xu, Maoxiang Yi, Yongxia Sheng, Cuiyun Jiang, Zhengfeng Huang, Yingchun Lu
2021 J jnl
Architecting a priority-based dynamic media access control mechanism in Wireless Network-on-Chip.
Microelectron. J.
Yiming Ouyang, Chenglong Sun, Boyuan Jia, Qi Wang, Huaguo Liang
2021 J jnl
Chip test pattern reordering method using adaptive test to reduce cost for testing of ICs.
IEICE Electron. Express
Tai Song, Huaguo Liang, Zhengfeng Huang, Tianming Ni, Ying Sun
2021 J jnl
Design of MNU-Resilient latches based on input-split C-elements.
Microelectron. J.
Zhengfeng Huang, Xiandong Li, Zhouyu Gong, Huaguo Liang, Yingchun Lu, Yiming Ouyang, Tianming Ni
2021 J jnl
Design of a Highly Robust Triple-Node-Upset Self-Recoverable Latch.
IEEE Access
Hui Xu, Cong Sun, Le Zhou, Huaguo Liang, Zhengfeng Huang
2021 J jnl
Design of node separated triple-node-upset self-recoverable latch.
Microelectron. J.
Zhengfeng Huang, Di Cao, Jianguo Cui, Yingchun Lu, Huaguo Liang, Yiming Ouyang, Tianming Ni, Zhenmin Li
2021 J jnl
High-Throughput Portable True Random Number Generator Based on Jitter-Latch Structure.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xinyu Wang, Huaguo Liang, Yanjie Wang, Liang Yao, Yang Guo, Maoxiang Yi, Zhengfeng Huang, Haochen Qi, Yingchun Lu
2021 J jnl
LC-TSL: A low-cost triple-node-upset self-recovery latch design based on heterogeneous elements for 22 nm CMOS.
Microelectron. J.
Zhengfeng Huang, Shangjie Pan, Hao Wang, Huaguo Liang, Tianming Ni
2021 J jnl
Neural Network-based Online Fault Diagnosis in Wireless-NoC Systems.
J. Electron. Test.
Qi Wang, Yiming Ouyang, Yingchun Lu, Huaguo Liang, Dakai Zhu
2021 J jnl
Pure Digital Scalable Mixed Entropy Separation Structure for Physical Unclonable Function and True Random Number Generator.
IEEE Trans. Very Large Scale Integr. Syst.
Yingchun Lu, Xinyu Wang, Yanjie Wang, Yuan Zhang, Liang Yao, Maoxiang Yi, Zhengfeng Huang, Huaguo Liang
2021 J jnl
Reliability Evaluation and Analysis of FPGA-Based Neural Network Acceleration System.
IEEE Trans. Very Large Scale Integr. Syst.
Dawen Xu, Ziyang Zhu, Cheng Liu, Ying Wang, Shuang Zhao, Lei Zhang, Huaguo Liang, Huawei Li, Kwang-Ting Cheng
2020 C conf
A Hybrid Computing Architecture for Fault-tolerant Deep Learning Accelerators.
ICCD
Dawen Xu, Cheng Chu, Qianlong Wang, Cheng Liu, Ying Wang, Lei Zhang, Huaguo Liang, Kwang-Ting Cheng
2020 J jnl
A Novel Low-Latency Regional Fault-Aware Fault-Tolerant Routing Algorithm for Wireless NoC.
IEEE Access
Yiming Ouyang, Qi Wang, Mengxuan Ru, Huaguo Liang, Jianhua Li
2020 J jnl
Architecture of Cobweb-Based Redundant TSV for Clustered Faults.
IEEE Trans. Very Large Scale Integr. Syst.
Tianming Ni, Dongsheng Liu, Qi Xu, Zhengfeng Huang, Huaguo Liang, Aibin Yan
2020 J jnl
Design of a Wireless Router with Virtual Channel Fault Tolerant in WiNoC.
J. Circuits Syst. Comput.
Yiming Ouyang, Wu Zhou, Sheng Li, Zhilu Wang, Huaguo Liang, Gaoming Du
2020 C conf
Dual-Interlocked-Storage-Cell-Based Double-Node-Upset Self-Recoverable Flip-Flop Design for Safety-Critical Applications.
ISCAS
Aibin Yan, Zhelong Xu, Jie Cui, Zuobin Ying, Zhengfeng Huang, Huaguo Liang, Patrick Girard, Xiaoqing Wen
2020 J jnl
Jitter-Quantizing-Based TRNG Robust Against PVT Variations.
IEEE Access
Yingchun Lu, Huaguo Liang, Liang Yao, Xinyu Wang, Haochen Qi, Maoxiang Yi, Cuiyun Jiang, Zhengfeng Huang
2020 J jnl
LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered Faults.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Tianming Ni, Yao Yao, Hao Chang, Lin Lu, Huaguo Liang, Aibin Yan, Zhengfeng Huang, Xiaoqing Wen
2020 — conf
Multi-task Scheduling for PIM-based Heterogeneous Computing System.
ACM Great Lakes Symposium on VLSI
Dawen Xu, Cheng Chu, Cheng Liu, Ying Wang, Xianzhong Zhou, Lei Zhang, Huaguo Liang, Huawei Li
2020 J jnl
Non-Intrusive Online Distributed Pulse Shrinking-Based Interconnect Testing in 2.5D IC.
IEEE Trans. Circuits Syst.
Tianming Ni, Hao Chang, Tai Song, Qi Xu, Zhengfeng Huang, Huaguo Liang, Aibin Yan, Xiaoqing Wen
2020 J jnl
Pattern Reorder for Test Cost Reduction Through Improved SVMRANK Algorithm.
IEEE Access
Tai Song, Huaguo Liang, Tianming Ni, Zhengfeng Huang, Yingchun Lu, Jinlei Wan, Aibin Yan
2020 J jnl
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IEEE Access
Dedong Zhao, Yiming Ouyang, Qi Wang, Huaguo Liang
2019 — conf
A Novel Triple-Node-Upset-Tolerant CMOS Latch Design using Single-Node-Upset-Resilient Cells.
ITC-Asia
Zhiyuan Song, Aibin Yan, Jie Cui, Zhili Chen, Xuejun Li, Xiaoqing Wen, Chaoping Lai, Zhengfeng Huang, Huaguo Liang
2019 J jnl
A Pulse Shrinking-Based Test Solution for Prebond Through Silicon via in 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Maoxiang Yi, Jingchang Bian, Tianming Ni, Cuiyun Jiang, Hao Chang, Huaguo Liang
2019 J jnl
CPCA: An efficient wireless routing algorithm in WiNoC for cross path congestion awareness.
Integr.
Yiming Ouyang, Zhe Li, Jianhua Li, Chenglong Sun, Huaguo Liang, Gaoming Du
2019 J jnl
DVFS Based Error Avoidance Strategy in Wireless Network-on-Chip.
J. Electron. Test.
Yiming Ouyang, Qi Wang, Lizhu Hu, Huaguo Liang
2019 J jnl
Design of Wireless Network on Chip with Priority-Based MAC.
J. Circuits Syst. Comput.
Yiming Ouyang, Yang Zhao, Kun Xing, Zhengfeng Huang, Huaguo Liang, Jianhua Li
2019 Misc conf
Novel Application of Deep Learning for Adaptive Testing Based on Long Short-Term Memory.
VTS
Tai Song, Huaguo Liang, Ying Sun, Zhengfeng Huang, Maoxiang Yi, Xiangsheng Fang, Aibin Yan
2019 J jnl
Temperature-Aware Floorplanning for Fixed-Outline 3D ICs.
IEEE Access
Tianming Ni, Hao Chang, Shidong Zhu, Lin Lu, Xueyun Li, Qi Xu, Huaguo Liang, Zhengfeng Huang
2018 — conf
A Dictionary-Based Test Data Compression Method Using Tri-State Coding.
ATS
Tian Chen, Chenxin Lin, Huaguo Liang, Fuji Ren
2018 — conf
A High Reliability FPGA Chip Identification Generator Based on PDLs.
ATS
Kai Zhou, Huaguo Liang, Yue Jiang, Zhengfeng Huang, Maoxiang Yi, Xiumin Xu, Yao Yao
2018 — conf
A Hybrid DMR Latch to Tolerate MNU Using TDICE and WDICE.
ATS
Zhengfeng Huang, Yangyang Zhang, Zian Su, Huaguo Liang, Huijie Yao, Tianming Ni
2018 — conf
A Low-Cost High-Efficiency True Random Number Generator on FPGAs.
ATS
Gaoliang Ma, Huaguo Liang, Liang Yao, Zhengfeng Huang, Maoxiang Yi, Xiumin Xu, Kai Zhou
2018 — conf
An All-Digital and Jitter-Quantizing True Random Number Generator in SRAM-Based FPGAs.
ATS
Xiumin Xu, Huaguo Liang, Kai Zhou, Gaoliang Ma, Zhengfeng Huang, Maoxiang Yi, Tianming Ni, Yingchun Lu
2018 J jnl
An improved communication scheme for non-HOL-blocking wireless NoC.
Integr.
Yiming Ouyang, Jianfeng Yang, Kun Xing, Zhengfeng Huang, Huaguo Liang
2018 J jnl
Design of Low-Power WiNoC with Congestion-Aware Wireless Node.
J. Circuits Syst. Comput.
Yiming Ouyang, Zhe Li, Kun Xing, Zhengfeng Huang, Huaguo Liang, Jianhua Li
2018 — conf
MTTF-Aware Reliability Task Scheduling for PIM-Based Heterogeneous Computing System.
ITC-Asia
Desong Pang, Dawen Xu, Ying Wang, Huaguo Liang
2018 C conf
Novel low cost and DNU online self-recoverable RHBD latch design for nanoscale CMOS.
ISCAS
Qian He, Aibin Yan, Chaoping Lai, Yinlei Zhang, Chunming Liu, Zhile Chen, Zhen Wu, Jie Cui, Huaguo Liang
2017 J jnl
A Region-Based Through-Silicon via Repair Method for Clustered Faults.
IEICE Trans. Electron.
Tianming Ni, Huaguo Liang, Mu Nie, Xiumin Xu, Aibin Yan, Zhengfeng Huang
2017 J jnl
A TSV Fault-Tolerant Scheme Based on Failure Classification in 3D-NoC.
J. Circuits Syst. Comput.
Yiming Ouyang, Jian Da, Xiumin Wang, Qianqian Han, Huaguo Liang, Gaoming Du
2017 J jnl
A highly reliable butterfly PUF in SRAM-based FPGAs.
IEICE Electron. Express
Xiumin Xu, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Yiming Ouyang, Xiangsheng Fang, Tianming Ni, Maoxiang Yi
2017 J jnl
A single event transient detector in SRAM-based FPGAs.
IEICE Electron. Express
Xiumin Xu, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Yingchun Lu, Aibin Yan, Tianming Ni, Maoxiang Yi
2017 J jnl
A transient pulse dually filterable and online self-recoverable latch.
IEICE Electron. Express
Aibin Yan, Huaguo Liang, Yingchun Lu, Zhengfeng Huang
2017 J jnl
Double-Node-Upset-Resilient Latch Design for Nanoscale CMOS Technology.
IEEE Trans. Very Large Scale Integr. Syst.
Aibin Yan, Zhengfeng Huang, Maoxiang Yi, Xiumin Xu, Yiming Ouyang, Huaguo Liang
2017 Misc conf
HLDTL: High-performance, low-cost, and double node upset tolerant latch design.
VTS
Aibin Yan, Zhengfeng Huang, Maoxiang Yi, Jie Cui, Huaguo Liang
2017 J jnl
Highly Robust Double Node Upset Resilient Hardened Latch Design.
IEICE Trans. Electron.
Huaguo Liang, Xin Li, Zhengfeng Huang, Aibin Yan, Xiumin Xu
2017 J jnl
Vernier ring based pre-bond through silicon vias test in 3D ICs.
IEICE Electron. Express
Tianming Ni, Mu Nie, Huaguo Liang, Jingchang Bian, Xiumin Xu, Xiangsheng Fang, Zhengfeng Huang, Xiaoqing Wen
2016 J jnl
AFTER: Asynchronous Fault-Tolerant Router Design in Network-on-Chip.
J. Circuits Syst. Comput.
Yiming Ouyang, Qi Chen, Xiumin Wang, Xiaoye Ouyang, Huaguo Liang, Gaoming Du
2016 J jnl
An SEU resilient, SET filterable and cost effective latch in presence of PVT variations.
Microelectron. Reliab.
Aibin Yan, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Yiming Ouyang, Xuejun Li
2016 — conf
Co-mitigating circuit PBTI and HCI aging considering NMOS transistor stacking effect.
ISIC
Maoxiang Yi, Yingxian Gan, Zhengfeng Huang, Huaguo Liang
2016 — conf
NBTI mitigation by M-IVC with input duty cycle and randomness constraints.
EWDTS
Maoxiang Yi, Xiaohong Liu, Qingwu Wu, Tianming Ni, Zhengfeng Huang, Huaguo Liang
2016 — conf
Novel Low Cost and Double Node Upset Tolerant Latch Design for Nanoscale CMOS Technology.
ATS
Aibin Yan, Zhengfeng Huang, Xiangsheng Fang, Xiaolin Xu, Huaguo Liang
2016 J jnl
Reseeding-Oriented Test Power Reduction for Linear-Decompression-Based Test Compression Architectures.
IEICE Trans. Inf. Syst.
Tian Chen, Dandan Shen, Xin Yi, Huaguo Liang, Xiaoqing Wen, Wei Wang
2015 J jnl
A High Performance SEU Tolerant Latch.
J. Electron. Test.
Zhengfeng Huang, Huaguo Liang, Sybille Hellebrand
2015 J jnl
A Self-Recoverable, Frequency-Aware and Cost-Effective Robust Latch Design for Nanoscale CMOS Technology.
IEICE Trans. Electron.
Aibin Yan, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Maoxiang Yi
2015 — conf
MTTF-Aware Reliability Task Scheduling for Heterogeneous Multicore System.
ICA3PP (2)
Huaguo Liang, Yangyang Dai, Maoxiang Yi, Dawen Xu, Zhengfeng Huang
2015 — conf
NBTI-induced circuit aging optimization by protectability-aware gate replacement technique.
LATS
Guimao Zhang, Maoxiang Yi, Yong Miao, Dawen Xu, Huaguo Liang
2015 Misc conf
Pulse shrinkage based pre-bond through silicon vias test in 3D IC.
VTS
Chang Hao, Huaguo Liang
2014 — conf
Design of a Radiation Hardened Latch for Low-Power Circuits.
ATS
Huaguo Liang, Zhi Wang, Zhengfeng Huang, Aibin Yan
2014 — conf
Optimized stacking order for 3D-stacked ICs considering the probability and cost of failed bonding.
VLSI-DAT
Chang Hao, Huaguo Liang, Li Yang, Yiming Ouyang
2013 A conf
A dynamic self-adaptive correction method for error resilient application.
DATE
Luming Yan, Huaguo Liang, Zhengfeng Huang
2010 J jnl
A Novel x -ploiting Strategy for Improving Performance of Test Data Compression.
IEEE Trans. Very Large Scale Integr. Syst.
Maoxiang Yi, Huaguo Liang, Lei Zhang, Wenfa Zhan
2010 J jnl
A scheme of test data compression based on coding of even bits marking and selective output inversion.
Comput. Electr. Eng.
Wenfa Zhan, Huaguo Liang, Cuiyun Jiang, Zhengfeng Huang, Aiman H. El-Maleh
2009 C conf
A Test Vector Compression/Decompression Scheme Based on Logic Operation between Adjacent Bits (LOBAB) Coding.
PRDC
Huaguo Liang, Wenfa Zhan, Qiang Luo, Cuiyun Jiang
2009 C conf
Impact of Hazards on Pattern Selection for Small Delay Defects.
PRDC
Jie Wang, Huawei Li, Yinghua Min, Xiaowei Li, Huaguo Liang
2009 — conf
Optimal LFSR-Coding Test Data Compression Based on Test Cube Dividing.
CSE (2)
Maoxiang Yi, Huaguo Liang, Kaihua Zhan, Cuiyun Jiang
2008 C conf
A New Radiation Hardened by Design Latch for Ultra-Deep-Sub-Micron Technologies.
IOLTS
Zhengfeng Huang, Huaguo Liang
2008 — conf
A Scheme of Test Pattern Generation Based on Reseeding of Segment-Fixing Counter.
ICYCS
Tian Chen, Huaguo Liang, Minsheng Zhang, Wei Wang
2008 — conf
Balancing wrapper chains of SoC core based on best interchange decreasing.
SoC
Maoxiang Yi, Huaguo Liang, Zhengfeng Huang
2007 C conf
A Novel Collaborative Scheme of Test Data Compression Based on Fixed-Plus-variable-Length Coding.
CSCWD
Wenfa Zhan, Huaguo Liang, Feng Shi, Zhengfeng Huang
2007 — conf
Block Marking and Updating Coding in Test Data Compression for SoC.
ATS
Lei Zhang, Huaguo Liang, Wenfa Zhan, Cuiyun Jiang
2007 J jnl
Test data compression scheme based on variable-to-fixed-plus-variable-length coding.
J. Syst. Archit.
Wenfa Zhan, Huaguo Liang, Feng Shi, Zhengfeng Huang
2005 — conf
A BIST Scheme Based on Selecting State Generation of Folding Counters.
Asian Test Symposium
Huaguo Liang, Maoxiang Yi, Xiangsheng Fang, Cuiyun Jiang
2003 — —
A new technique for deterministic scan based built in self test (BIST).
Huaguo Liang
2003 — conf
Sharing BIST with Multiple Cores for System-on-a-Chip.
Asian Test Symposium
Huaguo Liang, Cuiyun Jiang
2002 J jnl
A Mixed-Mode BIST Scheme Based on Folding Compression.
J. Comput. Sci. Technol.
Huaguo Liang, Sybille Hellebrand, Hans-Joachim Wunderlich
2002 J jnl
Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST.
J. Electron. Test.
Huaguo Liang, Sybille Hellebrand, Hans-Joachim Wunderlich
2001 J jnl
A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters.
J. Electron. Test.
Sybille Hellebrand, Huaguo Liang, Hans-Joachim Wunderlich
2001 A conf
Two-dimensional test data compression for scan-based deterministic BIST.
ITC
Huaguo Liang, Sybille Hellebrand, Hans-Joachim Wunderlich
2000 A conf
A mixed mode BIST scheme based on reseeding of folding counters.
ITC
Sybille Hellebrand, Hans-Joachim Wunderlich, Huaguo Liang