Hsin-I Wu

22 papers A* 2A 3Misc 2Journal 6Unranked 9
YearRankTypeTitle / Venue / Authors
2024 — conf
Accelerate Large Language Model Inference on Edge TPU with OpenVX framework.
AICAS
You-En Wu, Hsin-I Wu, Kuo-Cheng Chin, Yi-Chun Yang, Ren-Song Tsay
2022 — conf
An Adaptive High-Performance Quantization Approach for Resource-Constrained CNN Inference.
AICAS
Hsu-Hsun Chin, Ren-Song Tsay, Hsin-I Wu
2021 J jnl
A High-Performance Adaptive Quantization Approach for Edge CNN Applications.
CoRR
Hsu-Hsun Chin, Ren-Song Tsay, Hsin-I Wu
2021 J jnl
An Effective Parallel Program Debugging Approach Based on Timing Annotation.
CoRR
Yun Chang, Hsin-I Wu, Ren-Song Tsay
2021 J jnl
Automatic Timing-Coherent Transactor Generation for Mixed-level Simulations.
CoRR
Li-Chun Chen, Hsin-I Wu, Ren-Song Tsay
2020 — conf
A Heuristic Region-based Concurrency Bug Testing Approach.
ISPA/BDCloud/SocialCom/SustainCom
Kuo-Cheng Chin, Ren-Song Tsay, Hsin-I Wu
2020 — conf
A Pipeline-Based Scheduler for Optimizing Latency of Convolution Neural Network Inference over Heterogeneous Multicore Systems.
AICAS
Hsin-I Wu, Da-Yi Guo, Hsu-Hsun Chin, Ren-Song Tsay
2020 J jnl
A Very Compact Embedded CNN Processor Design Based on Logarithmic Computing.
CoRR
Tsung-Ying Lu, Hsu-Hsun Chin, Hsin-I Wu, Ren-Song Tsay
2020 J jnl
A Virtualization-Assisted Full-System Simulation Approach for the Verification of System Intercomponent Interactions.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hsin-I Wu, Da-Yi Guo, Ren-Song Tsay
2020 — conf
CORONA: A k-COnnected RObust Interconnection Network Generation Algorithm.
VLSI-DAT
Hsin-I Wu, Ren-Song Tsay, Fong-Yuan Chang
2020 — conf
Designing A Compact Convolutional Neural Network Processor on Embedded FPGAs.
GCAIoT
Yin-Chun Ling, Hsu-Hsun Chin, Hsin-I Wu, Ren-Song Tsay
2020 Misc conf
VIRA: a virtualization assisted deterministic system-level simulations.
SAC
Hsin-I Wu, Ren-Song Tsay, Hsu-Hsun Chin
2018 A conf
A highly efficient full-system virtual prototype based on virtualization-assisted approach.
DATE
Hsin-I Wu, Chi-Kang Chen, Tsung-Ying Lu, Ren-Song Tsay
2017 A* conf
LiCompass: Extracting orientation from polarized light.
INFOCOM
Yu-Lin Wei, Hsin-I Wu, Han-Chung Wang, Hsin-Mu Tsai, Kate Ching-Ju Lin, Rayana Boubezari, Hoa Le Minh, Zabih Ghassemlooy
2016 — conf
An Accurate Crowdsourcing-Based Adaptive Fall Detection Approach Using Smart Devices.
ICHI
Hsuan-Man Chen, Chi-Kang Chen, Hsin-I Wu, Ren-Song Tsay
2016 Misc conf
An accurate and flexible early memory system power evaluation approach using a microcomponent method.
CODES+ISSS
Chi-Kang Chen, Hsin-I Wu, Chi-Ting Hsiao, Ren-Song Tsay
2016 — conf
Poster Paper: An Accurate Crowdsourcing-Based Adaptive Fall Detection Approach Using Smart Devices.
ICHI
Hsuan-Man Chen, Chi-Kang Chen, Hsin-I Wu, Ren-Song Tsay
2015 — conf
Automatic timing-coherent transactor generation for mixed-level simulations.
ASP-DAC
Li-Chun Chen, Hsin-I Wu, Ren-Song Tsay
2015 J jnl
Highly Efficient and Effective Approach for Synchronization-Function-Level Parallel Multicore Instruction-Set Simulations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jyun-Hao Chang, Hsin-I Wu, Hsien-Lun Pai, Ren-Song Tsay, Wai-Kei Mak
2015 A conf
RollingLight: Enabling Line-of-Sight Light-to-Camera Communications.
MobiSys
Hui-Yu Lee, Hao-Min Lin, Yu-Lin Wei, Hsin-I Wu, Hsin-Mu Tsai, Kate Ching-Ju Lin
2013 A conf
A critical-section-level timing synchronization approach for deterministic multi-core instruction set simulations.
DATE
Fan-Wei Yu, Bo-Han Zeng, Yu-Hung Huang, Hsin-I Wu, Che-Rung Lee, Ren-Song Tsay
2012 A* conf
A non-intrusive timing synchronization interface for hardware-assisted HW/SW co-simulation.
DAC
Yu-Hung Huang, Yi-Shan Lu, Hsin-I Wu, Ren-Song Tsay