Hongzhong Zheng

60 papers A* 12A 2B 5Misc 1Journal 30Unranked 10
YearRankTypeTitle / Venue / Authors
2026 J jnl
A Flexible Zero-Shot Approach to Tone Mapping via Structure-Preserving Diffusion Models.
IEEE Trans. Circuits Syst. Video Technol.
Ruoxi Zhu, Shusong Xu, Peiye Liu, Jiaming Liu, Yanheng Lu, Dimin Niu, Hongzhong Zheng, Yen-Kuang Chen, Ming-e Jing, Yibo Fan
2026 J jnl
Closely-Coupled Reconstruction and Generation for Blind Face Restoration.
IEEE Trans. Multim.
Shichen Peng, Jiaming Liu, Zihao Liu, Hongzhong Zheng, Dimin Niu, Xiaoyang Zeng, Yibo Fan
2025 J jnl
A Tightly Coupled AI-ISP Vision Processor.
IEEE Trans. Circuits Syst. Video Technol.
Hao Zhang, Sicheng Li, Yupeng Gui, Zhiyong Li, Shusong Xu, Yanheng Lu, Dimin Niu, Hongzhong Zheng, Yen-Kuang Chen, Yuan Xie, Yibo Fan
2025 A conf
HD-MoE: Hybrid and Dynamic Parallelism for Mixture-of-Expert LLMs with 3D Near-Memory Processing.
ICCAD
Haochen Huang, Shuzhang Zhong, Zhe Zhang, Shuangchen Li, Dimin Niu, Hongzhong Zheng, Runsheng Wang, Meng Li
2025 J jnl
HD-MoE: Hybrid and Dynamic Parallelism for Mixture-of-Expert LLMs with 3D Near-Memory Processing.
CoRR
Haochen Huang, Shuzhang Zhong, Zhe Zhang, Shuangchen Li, Dimin Niu, Hongzhong Zheng, Runsheng Wang, Meng Li
2025 J jnl
Klotski v2: Improved DNN Model Orchestration Framework for Dataflow Architecture Accelerators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chen Bai, Xuechao Wei, Youwei Zhuo, Yi Cai, Hongzhong Zheng, Bei Yu, Yuan Xie
2025 J jnl
LaMoSys3.5D: Enabling 3.5D-IC-Based Large Language Model Inference Serving Systems via Hardware/Software Co-Design.
CoRR
Qipan Wang, Zhe Zhang, Shuangchen Li, Hongzhong Zheng, Zheng Liang, Yibo Lin, Runsheng Wang, Ru Huang
2025 J jnl
Matrix: Multi-Cipher Structures Dataflow for Parallel and Pipelined TFHE Accelerator.
ACM Trans. Archit. Code Optim.
Ling Liang, Zhen Gu, Fahong Zhang, Zhaohui Chen, Zhirui Li, Xin Fan, Dimin Niu, Meng Li, Zhiyong Li, Zongwei Wang, Hongzhong Zheng, Yimao Cai, Yuan Xie
2025 J jnl
MemTunnel: A CXL-Based Rack-Scale Host Memory Pooling Architecture for Cloud Service.
IEEE Trans. Parallel Distributed Syst.
Tianchan Guan, Yijin Guan, Zhaoyang Du, Jiacheng Ma, Boyu Tian, Zhao Wang, Teng Ma, Zheng Liu, Yang Kong, Yuan Xie, Mingyu Gao, Guangyu Sun, Hongzhong Zheng, Dimin Niu
2023 J jnl
Accelerating Distributed GNN Training by Codes.
IEEE Trans. Parallel Distributed Syst.
Yanhong Wang, Tianchan Guan, Dimin Niu, Qiaosha Zou, Hongzhong Zheng, Chuanjin Richard Shi, Yuan Xie
2023 A* conf
ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis.
MICRO
Chen Bai, Jiayi Huang, Xuechao Wei, Yuzhe Ma, Sicheng Li, Hongzhong Zheng, Bei Yu, Yuan Xie
2023 J jnl
Efficient Super-Resolution System With Block-Wise Hybridization and Quantized Winograd on FPGA.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Bizhao Shi, Jiaxi Zhang, Zhuolun He, Xuechao Wei, Sicheng Li, Guojie Luo, Hongzhong Zheng, Yuan Xie
2023 A conf
Klotski: DNN Model Orchestration Framework for Dataflow Architecture Accelerators.
ICCAD
Chen Bai, Xuechao Wei, Youwei Zhuo, Yi Cai, Hongzhong Zheng, Bei Yu, Yuan Xie
2023 J jnl
MPU: Memory-centric SIMT Processor via In-DRAM Near-bank Computing.
ACM Trans. Archit. Code Optim.
Xinfeng Xie, Peng Gu, Yufei Ding, Dimin Niu, Hongzhong Zheng, Yuan Xie
2023 J jnl
NPS: A Framework for Accurate Program Sampling Using Graph Neural Network.
CoRR
Yuanwei Fang, Zihao Liu, Yanheng Lu, Jiawei Liu, Jiajie Li, Yi Jin, Jian Chen, Yen-Kuang Chen, Hongzhong Zheng, Yuan Xie
2023 — conf
Spada: Accelerating Sparse Matrix Multiplication with Adaptive Dataflow.
ASPLOS (2)
Zhiyao Li, Jiaxiang Li, Taijie Chen, Dimin Niu, Hongzhong Zheng, Yuan Xie, Mingyu Gao
2023 A* conf
TT-GNN: Efficient On-Chip Graph Neural Network Training via Embedding Reformation and Hardware Optimization.
MICRO
Zheng Qu, Dimin Niu, Shuangchen Li, Hongzhong Zheng, Yuan Xie
2022 — conf
184QPS/W 64Mb/mm
ISSCC
Dimin Niu, Shuangchen Li, Yuhao Wang, Wei Han, Zhe Zhang, Yijin Guan, Tianchan Guan, Fei Sun, Fei Xue, Lide Duan, Yuanwei Fang, Hongzhong Zheng, Xiping Jiang, Song Wang, Fengguo Zuo, Yubing Wang, Bing Yu, Qiwei Ren, Yuan Xie
2022 J jnl
Accelerating CPU-Based Sparse General Matrix Multiplication With Binary Row Merging.
IEEE Access
Zhaoyang Du, Yijin Guan, Tianchan Guan, Dimin Niu, Hongzhong Zheng, Yuan Xie
2022 J jnl
Accelerating CPU-based Sparse General Matrix Multiplication with Binary Row Merging.
CoRR
Zhaoyang Du, Yijin Guan, Tianchan Guan, Dimin Niu, Hongzhong Zheng, Yuan Xie
2022 — conf
COMB-MCM: Computing-on-Memory-Boundary NN Processor with Bipolar Bitwise Sparsity Optimization for Scalable Multi-Chiplet-Module Edge Machine Learning.
ISSCC
Haozhe Zhu, Bo Jiao, Jinshan Zhang, Xinru Jia, Yunzhengmao Wang, Tianchan Guan, Shengcheng Wang, Dimin Niu, Hongzhong Zheng, Chixiao Chen, Mingyu Wang, Lihua Zhang, Xiaoyang Zeng, Qi Liu, Yuan Xie, Ming Liu
2022 J jnl
EPQuant: A Graph Neural Network compression approach based on product quantization.
Neurocomputing
Linyong Huang, Zhe Zhang, Zhaoyang Du, Shuangchen Li, Hongzhong Zheng, Yuan Xie, Nianxiong Tan
2022 A* conf
Enabling High-Quality Uncertainty Quantification in a PIM Designed for Bayesian Neural Network.
HPCA
Xingchen Li, Bingzhe Wu, Guangyu Sun, Zhe Zhang, Zhihang Yuan, Runsheng Wang, Ru Huang, Dimin Niu, Hongzhong Zheng, Zhichao Lu, Liang Zhao, Meng-Fan Marvin Chang, Tianchan Guan, Xin Si
2022 A* conf
Hyperscale FPGA-as-a-service architecture for large-scale distributed graph neural network.
ISCA
Shuangchen Li, Dimin Niu, Yuhao Wang, Wei Han, Zhe Zhang, Tianchan Guan, Yijin Guan, Heng Liu, Linyong Huang, Zhaoyang Du, Fei Xue, Yuanwei Fang, Hongzhong Zheng, Yuan Xie
2022 J jnl
OpSparse: A Highly Optimized Framework for Sparse General Matrix Multiplication on GPUs.
IEEE Access
Zhaoyang Du, Yijin Guan, Tianchan Guan, Dimin Niu, Linyong Huang, Hongzhong Zheng, Yuan Xie
2022 J jnl
OpSparse: a Highly Optimized Framework for Sparse General Matrix Multiplication on GPUs.
CoRR
Zhaoyang Du, Yijin Guan, Tianchan Guan, Dimin Niu, Linyong Huang, Hongzhong Zheng, Yuan Xie
2022 J jnl
Practical Near-Data-Processing Architecture for Large-Scale Distributed Graph Neural Network.
IEEE Access
Linyong Huang, Zhe Zhang, Shuangchen Li, Dimin Niu, Yijin Guan, Hongzhong Zheng, Yuan Xie
2022 B conf
Predicting the Output Structure of Sparse Matrix Multiplication with Sampled Compression Ratio.
ICPADS
Zhaoyang Du, Yijin Guan, Tianchan Guan, Dimin Niu, Nianxiong Tan, Xiaopeng Yu, Hongzhong Zheng, Jianyi Meng, Xiaolang Yan, Yuan Xie
2022 J jnl
Predicting the Output Structure of Sparse Matrix Multiplication with Sampled Compression Ratio.
CoRR
Zhaoyang Du, Yijin Guan, Tianchan Guan, Dimin Niu, Nianxiong Tan, Xiaopeng Yu, Hongzhong Zheng, Jianyi Meng, Xiaolang Yan, Yuan Xie
2021 J jnl
Area Efficient Pattern Representation of Binary Neural Networks on RRAM.
J. Comput. Sci. Technol.
Feng Wang, Guojie Luo, Guang-Yu Sun, Yuhao Wang, Dimin Niu, Hongzhong Zheng
2021 J jnl
DLUX: A LUT-Based Near-Bank Accelerator for Data Center Deep Learning Training Workloads.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Peng Gu, Xinfeng Xie, Shuangchen Li, Dimin Niu, Hongzhong Zheng, Krishna T. Malladi, Yuan Xie
2021 J jnl
MPU: Towards Bandwidth-abundant SIMT Processor via Near-bank Computing.
CoRR
Xinfeng Xie, Peng Gu, Yufei Ding, Dimin Niu, Hongzhong Zheng, Yuan Xie
2021 J jnl
STAR: Synthesis of Stateful Logic in RRAM Targeting High Area Utilization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Feng Wang, Guojie Luo, Guangyu Sun, Jiaxi Zhang, Jinfeng Kang, Yuhao Wang, Dimin Niu, Hongzhong Zheng
2020 — conf
GNN-PIM: A Processing-in-Memory Architecture for Graph Neural Networks.
ACA
Zhao Wang, Yijin Guan, Guangyu Sun, Dimin Niu, Yuhao Wang, Hongzhong Zheng, Yinhe Han
2019 A* conf
CoNDA: efficient cache coherence support for near-data accelerators.
ISCA
Amirali Boroumand, Saugata Ghose, Minesh Patel, Hasan Hassan, Brandon Lucia, Rachata Ausavarungnirun, Kevin Hsieh, Nastaran Hajinazar, Krishna T. Malladi, Hongzhong Zheng, Onur Mutlu
2018 — conf
Performance Impact of Emerging Memory Technologies on Big Data Applications: A Latency-Programmable System Emulation Approach.
ACM Great Lakes Symposium on VLSI
Mu-Tien Chang, I. Stephen Choi, Dimin Niu, Hongzhong Zheng
2018 A* conf
SCOPE: A Stochastic Computing Engine for DRAM-Based In-Situ Accelerator.
MICRO
Shuangchen Li, Alvin Oliver Glova, Xing Hu, Peng Gu, Dimin Niu, Krishna T. Malladi, Hongzhong Zheng, Bob Brennan, Yuan Xie
2017 — conf
Architecting HBM as a high bandwidth, high capacity, self-managed last-level cache.
PDSW-DISCS@SC
Tyler Stocksdale, Mu-Tien Chang, Hongzhong Zheng, Frank Mueller
2017 J jnl
DRAF: A Low-Power DRAM-Based Reconfigurable Acceleration Fabric.
IEEE Micro
Mingyu Gao, Christina Delimitrou, Dimin Niu, Krishna T. Malladi, Hongzhong Zheng, Bob Brennan, Christos Kozyrakis
2017 A* conf
DRISA: a DRAM-based reconfigurable in-situ accelerator.
MICRO
Shuangchen Li, Dimin Niu, Krishna T. Malladi, Hongzhong Zheng, Bob Brennan, Yuan Xie
2017 — conf
FlashStorageSim: Performance Modeling for SSD Architectures.
NAS
Krishna T. Malladi, Mu-Tien Chang, Dimin Niu, Hongzhong Zheng
2017 J jnl
LazyPIM: An Efficient Cache Coherence Mechanism for Processing-in-Memory.
IEEE Comput. Archit. Lett.
Amirali Boroumand, Saugata Ghose, Minesh Patel, Hasan Hassan, Brandon Lucia, Kevin Hsieh, Krishna T. Malladi, Hongzhong Zheng, Onur Mutlu
2017 J jnl
LazyPIM: Efficient Support for Cache Coherence in Processing-in-Memory Architectures.
CoRR
Amirali Boroumand, Saugata Ghose, Minesh Patel, Hasan Hassan, Brandon Lucia, Nastaran Hajinazar, Kevin Hsieh, Krishna T. Malladi, Hongzhong Zheng, Onur Mutlu
2016 A* conf
DRAF: A Low-Power DRAM-Based Reconfigurable Acceleration Fabric.
ISCA
Mingyu Gao, Christina Delimitrou, Dimin Niu, Krishna T. Malladi, Hongzhong Zheng, Bob Brennan, Christos Kozyrakis
2016 — conf
DRAMPersist: Making DRAM Systems Persistent.
MEMSYS
Krishna T. Malladi, Manu Awasthi, Hongzhong Zheng
2016 — conf
DRAMScale: Mechanisms to Increase DRAM Capacity.
MEMSYS
Krishna T. Malladi, Uksong Kang, Manu Awasthi, Hongzhong Zheng
2016 — conf
FlexDrive: A Framework to Explore NVMe Storage Solutions.
HPCC/SmartCity/DSS
Krishna T. Malladi, Manu Awasthi, Hongzhong Zheng
2016 J jnl
MEMRES: A Fast Memory System Reliability Simulator.
IEEE Trans. Reliab.
Shaodi Wang, Henry Chaohong Hu, Hongzhong Zheng, Puneet Gupta
2016 Misc conf
Software-Defined Emulation Infrastructure for High Speed Storage.
SYSTOR
Krishna T. Malladi, Manu Awasthi, Hongzhong Zheng
2015 B conf
FAME: A Fast and Accurate Memory Emulator for New Memory System Architecture Exploration.
MASCOTS
Krishna T. Malladi, Mu-Tien Chang, John Ping, Hongzhong Zheng
2014 J jnl
Mini-Rank: A Power-EfficientDDRx DRAM Memory Architecture.
IEEE Trans. Computers
Kun Fang, Hongzhong Zheng, Jiang Lin, Zhao Zhang, Zhichun Zhu
2013 J jnl
Thermal Modeling and Management of DRAM Systems.
IEEE Trans. Computers
Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Zhao Zhang
2010 B conf
Heterogeneous Mini-rank: Adaptive, Power-Efficient Memory Architecture.
ICPP
Kun Fang, Hongzhong Zheng, Zhichun Zhu
2010 J jnl
Power and Performance Trade-Offs in Contemporary DRAM System Designs for Multicore Processors.
IEEE Trans. Computers
Hongzhong Zheng, Zhichun Zhu
2009 A* conf
Decoupled DIMM: building high-bandwidth memory system using low-speed DRAM devices.
ISCA
Hongzhong Zheng, Jiang Lin, Zhao Zhang, Zhichun Zhu
2008 B conf
Memory Access Scheduling Schemes for Systems with Multi-Core Processors.
ICPP
Hongzhong Zheng, Jiang Lin, Zhao Zhang, Zhichun Zhu
2008 A* conf
Mini-rank: Adaptive DRAM architecture for improving memory power efficiency.
MICRO
Hongzhong Zheng, Jiang Lin, Zhao Zhang, Eugene Gorbatov, Howard David, Zhichun Zhu
2008 A* conf
Software thermal management of dram memory for multicore systems.
SIGMETRICS
Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Eugene Gorbatov, Howard David, Zhao Zhang
2007 B conf
DRAM-Level Prefetching for Fully-Buffered DIMM: Design, Performance and Power Saving.
ISPASS
Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Zhao Zhang, Howard David
2007 A* conf
Thermal modeling and management of DRAM memory systems.
ISCA
Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Howard David, Zhao Zhang