Hongzhi Liang

41 papers A 1B 1Journal 27Unranked 11
YearRankTypeTitle / Venue / Authors
2026 J jnl
A full-rate 8.2-to-15.1-Gb/s reference-less CDR using low-cost SAR-based frequency acquisition technique achieving 265ns acquisition time.
Microelectron. J.
Yilong Dong, Xiaoteng Zhao, Yuhao Zhang, Hao Chang, Yuxing Qi, Zekai Yang, Chenxi Han, Hongzhi Liang, Yukui Yu, Shubin Liu
2026 J jnl
Artificial intelligence and machine learning for green and intelligent shipping: Methods, applications and challenges.
Comput. Ind. Eng.
Kai Wang, Longhao Cong, Zesheng Jing, Zhongwei Li, Yapeng Wang, Yanpo Chi, Hongzhi Liang
2025 — conf
24.2 A 14b 1GS/s Single-Channel Pipelined ADC with A Parallel-Operation SAR Sub-Quantizer and A Dynamic-Deadzone Ring Amplifier.
ISSCC
Yue Cao, Yi Shen, Shubin Liu, Haolin Han, Hongzhi Liang, Li Dang, Dengquan Li, Ruixue Ding, Zhangming Zhu
2025 J jnl
A 0.0013-mm2 7-bit 2-GS/s time-domain 4-bit/cycle SAR ADC with the input-recoverable constant-current VTC.
Microelectron. J.
Zhe Li, Jun Chang, Weimin Zhou, Li Dang, Hongzhi Liang, Shubin Liu
2025 — conf
A 0.7-V 26.2-28.5 GHz Dual-Loop Double-Sampling PLL with Floating Capacitor OTA Based Gm-CP Achieving a 45.4-fsRMS Jitter.
CICC
Jun Chang, Hongzhi Liang, Yixiao Luo, Zeyu Peng, Zhe Li, Yi Shen, Shubin Liu, Zhangming Zhu
2025 J jnl
A 10-bit 4 GS/s Pipelined-SAR ADC based on loop-unrolled and partial-interleaving.
Microelectron. J.
Weimin Zhou, Zhe Li, Hongzhi Liang, Li Dang, Ruixue Ding, Shubin Liu, Zhangming Zhu
2025 — conf
A 100Gb/s Transmitter with Digital Pre-Distortion and MUX-Merged Voltage-Mode Driver Achieving 3-Times INLPP Improvement in 28nm CMOS.
CICC
Chenxi Han, Xiaoteng Zhao, Qi Zhang, Yuan Liu, Yuhao Zhang, Hongzhi Liang, Yukui Yu, Shubin Liu, Zhangming Zhu
2025 J jnl
A 12-bit 1.5-GS/s Single-Channel Pipelined SAR ADC With a Pipelined Residue Amplification Stage.
IEEE J. Solid State Circuits
Yi Shen, Shubin Liu, Yue Cao, Haolin Han, Hongzhi Liang, Zhicheng Dong, Dengquan Li, Ruixue Ding, Zhangming Zhu
2025 — conf
A 13b 2GS/s Time-Domain Pipelined ADC with Split-CDAC Ping-Pong Residue Transfer and PVT-Robust Self-Tracked Time Amplifier.
CICC
Xin Zhao, Dengquan Li, Feida Wang, Depan Li, Yi Shen, Hongzhi Liang, Zhangming Zhu
2025 J jnl
A 2.6-GS/s 8-bit Time-Interleaved ADC With Fully Dynamic Current Integrating Sampler.
IEEE Solid State Circuits Lett.
Dengquan Li, Maowen Qian, Depan Li, Hongzhi Liang, Zhangming Zhu
2025 — conf
A 32GS/s 8b 16× Time-Interleaved Hybrid ADC with Self-Detection Offset Calibration, DLL-Based TLSB PVT Variation Calibration and VTC Gain Self-Tracking.
CICC
Hongzhi Liang, Jun Chang, Yixiao Luo, Zeyu Peng, Weimin Zhou, Li Dang, Yue Cao, Haolin Han, Yi Shen, Shubin Liu, Ruixue Ding, Zhangming Zhu
2025 J jnl
A 56 Gb/s PAM4 slope-sampling CDR with simultaneous four-output phase interpolator.
Microelectron. J.
Zekai Yang, Xiaoteng Zhao, Huajin Sun, Xianting Su, Zhicheng Dong, Yilong Dong, Yukui Yu, Hongzhi Liang, Shubin Liu
2025 J jnl
A 56 Gb/s PAM4 slope-sampling CDR with simultaneous four-output phase interpolator.
Microelectron. J.
Zekai Yang, Xiaoteng Zhao, Huajin Sun, Xianting Su, Zhicheng Dong, Yilong Dong, Yukui Yu, Hongzhi Liang, Shubin Liu
2025 J jnl
A Real-Time Rotation Calibration for Interchannel Offset Mismatch in Time-Interleaved SAR ADCs.
IEEE Trans. Very Large Scale Integr. Syst.
Yixiao Luo, Hongzhi Liang, Zeyu Peng, Yukui Yu, Shubin Liu, Ruixue Ding, Zhangming Zhu
2025 J jnl
A design of 96 GS/s 7-bit DAC for high-speed wireline transmitter in 28-nm CMOS.
Microelectron. J.
Junfei Deng, Huolian Liu, Chenxi Han, Li Dang, Hongzhi Liang, Shubin Liu
2025 J jnl
A reference-free and derivative-insensitive all-digital calibration technique for timing-skew in TI-ADCs.
Sci. China Inf. Sci.
Li Dang, Shubin Liu, Ruixue Ding, Chengyuan Liu, Hongzhi Liang, Haolin Han, Yue Cao, Zhangming Zhu
2025 J jnl
An 8-bit 5-GS/s Single-Channel Hybrid ADC With a λ/4 Transmission Line Based Time Quantizer.
IEEE Trans. Circuits Syst. I Regul. Pap.
Hongzhi Liang, Yi Shen, Jun Chang, Shubin Liu, Ruixue Ding, Zhangming Zhu
2025 J jnl
FR-CNN: Frequency Recognition Convolutional Neural Network-Based Calibration for Timing Skew in TI-ADCs.
IEEE Trans. Circuits Syst. II Express Briefs
Dengquan Li, Tianqi Yang, Longsheng Wang, Shuai Lang, Hongzhi Liang, Zhangming Zhu
2025 J jnl
Load-driven inductive peaking design for broad band continuous-time linear equalizer.
Microelectron. J.
Miao Zhang, Ruidong Li, Xiaoteng Zhao, Xianting Su, Zhicheng Dong, Zekai Yang, Hongyu Su, Hongzhi Liang, Yukui Yu, Shubin Liu
2025 J jnl
Withdrawal notice to "A 56 Gb/s PAM4 slope-sampling CDR with simultaneous four-output phase interpolator" [Microelectron. J. 166 (2025) 106872].
Microelectron. J.
Zekai Yang, Xiaoteng Zhao, Huajin Sun, Xianting Su, Zhicheng Dong, Yilong Dong, Yukui Yu, Hongzhi Liang, Shubin Liu
2024 J jnl
A 0.08%/V 32.3-ppm/°C 36.6-kHz Unregulated Current-Reuse Ring Oscillator With VGS-Ratio-Based Compensation Using One-Type-Only Resistor.
IEEE J. Solid State Circuits
Zhicheng Dong, Shubin Liu, Xiaoteng Zhao, Baotian Hao, Xianting Su, Hongzhi Liang, Menghao Wang, Zhangming Zhu
2024 J jnl
A 10-GS/s 8-bit 2× time interleaved hybrid ADC with λ/4 reference T-Line sharing technique.
Sci. China Inf. Sci.
Zhangming Zhu, Jun Chang, Hongzhi Liang, Ruixue Ding, Shubin Liu
2024 J jnl
A 4-GS/s 6-Bit Single-Channel TDC-Assisted Hybrid ADC Featuring Power Supply Variation Adaptation for Inter-Stage Gain Error.
IEEE Trans. Circuits Syst. II Express Briefs
Hongzhi Liang, Shubin Liu, Ruixue Ding, Yi Shen, Dengquan Li, Zhangming Zhu
2024 J jnl
A 56 Gb/s DAC-DSP-based transmitter with adaptive retiming clock optimization using inverse-PR-based PD achieving 8-UI converge time in 28-nm CMOS.
Sci. China Inf. Sci.
Shubin Liu, Chenxi Han, Xiaoteng Zhao, Yuhao Zhang, Shixin Li, Hongzhi Liang, Lihong Yang, Zhangming Zhu
2024 J jnl
A 68.5 dB-SNDR, 12.4-fJ/conv.-step, 100-MS/s pipelined-SAR ADC with PVT-enhanced circuitry.
Microelectron. J.
Haolin Han, Ruili Ren, Yi Shen, Ruixue Ding, Shubin Liu, Hongzhi Liang
2024 J jnl
A Power-Efficient Clock Circuit and Output Serializing Technique Integrated in a 12-bit 10-GS/s ADC.
IEEE Trans. Circuits Syst. I Regul. Pap.
Haolin Han, Shubin Liu, Hongzhi Liang, Yi Shen, Jianyu Guo, Ruili Ren, Zhangming Zhu
2024 J jnl
A wide load-range OTA using a digitally assisted compensating technique.
Sci. China Inf. Sci.
Haolin Han, Shubin Liu, Yi Shen, Hongzhi Liang, Yue Cao, Longjie Zhong, Zhangming Zhu
2023 — conf
A 0.012mm
CICC
Zhicheng Dong, Shubin Liu, Xiaoteng Zhao, Baotian Hao, Hongzhi Liang, Haolin Han, Menghao Wang, Weijie Han, Zhangming Zhu
2023 — conf
A 12b 1.5GS/s Single-Channel Pipelined SAR ADC with a Pipelined Residue Amplification Stage.
CICC
Yi Shen, Shubin Liu, Yue Cao, Haolin Han, Hongzhi Liang, Zhicheng Dong, Dengquan Li, Ruixue Ding, Zhangming Zhu
2023 — conf
A 5GS/s 38.04dB SNDR Single-Channel TDC-Assisted Hybrid ADC with $\lambda/4$ Transmission Line Based Time Quantizer Achieving a PVT Robustness 416.6fs Time Step.
A-SSCC
Hongzhi Liang, Yi Shen, Jun Chang, Shubin Liu, Ruixue Ding, Zhangming Zhu
2023 J jnl
An All-Digital Background Calibration Technique for M-Channel Downsampling Time-Interleaved ADCs Based on Interpolation.
IEEE Trans. Circuits Syst. II Express Briefs
Chenxi Han, Shubin Liu, Yuhao Zhang, Lichen Feng, Hongzhi Liang, Zhangming Zhu
2022 J jnl
A 0.8-V, 2.55-GHz, 2.62-mW Charge-Pump PLL With High Spectrum Purity.
IEEE Trans. Very Large Scale Integr. Syst.
Lianxi Liu, Yaling Ji, Xufeng Liao, Zhenghe Qin, Hongzhi Liang
2022 J jnl
A Power-Efficient TVC-Based Fast Auto-Frequency Calibration for PLLs.
IEEE Trans. Circuits Syst. II Express Briefs
Depeng Sun, Ruixue Ding, Feng Bu, Hongzhi Liang, Dengquan Li, Yuhua Liang, Shubin Liu
2018 J jnl
Energy-Efficient and Area-Saving Asymmetric Capacitor Switching Scheme for SAR ADCs.
J. Circuits Syst. Comput.
Hongzhi Liang, Ruixue Ding, Shubin Liu, Zhangming Zhu
2017 J jnl
Analysis and optimal distribution scheme for SAR-VCO ADCs.
Microelectron. J.
Ruixue Ding, Hongzhi Liang, Shubin Liu, Zhangming Zhu
2009 — —
Sequence Diagrams Integration via Typed Graphs: Theory and Implementation.
Hongzhi Liang
2008 A conf
A General Approach for Scenario Integration.
MoDELS
Hongzhi Liang, Zinovy Diskin, Jürgen Dingel, Ernesto Posse
2008 B conf
A Practical Evaluation of Using TXL for Model Transformation.
SLE
Hongzhi Liang, Jürgen Dingel
2007 — conf
Scenario Integration via the Transformation and Manipulation of Higher-order Graphs.
MoDELS (Doctoral Symposium)
Hongzhi Liang
2006 — conf
A comparative survey of scenario-based to state-based model synthesis approaches.
SCESM
Hongzhi Liang, Jürgen Dingel, Zinovy Diskin
2004 — conf
Automating comprehensive safety analysis of concurrent programs using verisoft and TXL.
SIGSOFT FSE
Jürgen Dingel, Hongzhi Liang