Hoai Luan Pham

47 papers Journal 25Unranked 22
YearRankTypeTitle / Venue / Authors
2026 J jnl
An innovative HLS framework for all network architectures: From Python to SoC.
Integr.
Thi Diem Tran, Minh Tan Ha, Xuan Thao Tran, Ngoc Quoc Tran, Vu Trung Duong Le, Hoai Luan Pham, Van Tinh Nguyen
2026 J jnl
Crypto-RV: High-Efficiency FPGA-Based RISC-V Cryptographic Co-Processor for IoT Security.
CoRR
Anh Kiet Pham, Van Truong Vo, Vu Trung Duong Le, Tuan Hai Vu, Hoai Luan Pham, Van Tinh Nguyen, Yasuhiko Nakashima
2025 J jnl
AES-RV: Hardware-Efficient RISC-V Accelerator with Low-Latency AES Instruction Extension for IoT Security.
CoRR
Van Tinh Nguyen, Phuc Hung Pham, Vu Trung Duong Le, Hoai Luan Pham, Tuan Hai Vu, Thi Diem Tran
2025 J jnl
AES-RV: Hardware-efficient RISC-V accelerator with low-latency AES instruction extension for IoT security.
IEICE Electron. Express
Van Tinh Nguyen, Phuc Hung Pham, Vu Trung Duong Le, Hoai Luan Pham, Tuan Hai Vu, Thi Diem Tran
2025 J jnl
Benchmarking Variants of the Adam Optimizer for Quantum Machine Learning Applications.
IEEE Open J. Comput. Soc.
Tuan Hai Vu, Vu Trung Duong Le, Hoai Luan Pham, Yasuhiko Nakashima
2025 J jnl
CTFE: A High-Efficient Heterogeneous Cryptographic CGRA for Diverse Security Applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Vu Trung Duong Le, Hoai Luan Pham, Thi Hong Tran, Van Duy Tran, Tuan Hai Vu, Yasuhiko Nakashima
2025 J jnl
FQsun: A Configurable Wave Function-Based Quantum Emulator for Power-Efficient Quantum Simulations.
IEEE Access
Tuan Hai Vu, Vu Trung Duong Le, Hoai Luan Pham, Quoc Chuong Nguyen, Yasuhiko Nakashima
2025 — conf
HPQEA: A Scalable and High-Performance Quantum Emulator with High-Bandwidth Memory for Diverse Algorithms Support.
CANDAR
Van Duy Tran, Tuan Hai Vu, Vu Trung Duong Le, Hoai Luan Pham, Yasuhiko Nakashima
2025 J jnl
Lifelong Whole Slide Image Analysis: Online Vision-Language Adaptation and Past-to-Present Gradient Distillation.
IEEE Access
Doanh C. Bui, Hoai Luan Pham, Vu Trung Duong Le, Tuan Hai Vu, Van Duy Tran, Khang Nguyen, Yasuhiko Nakashima
2025 J jnl
Lifelong Whole Slide Image Analysis: Online Vision-Language Adaptation and Past-to-Present Gradient Distillation.
CoRR
Doanh C. Bui, Hoai Luan Pham, Vu Trung Duong Le, Tuan Hai Vu, Van Duy Tran, Khang Nguyen, Yasuhiko Nakashima
2025 J jnl
MINA: A Hardware-Efficient and Flexible Mini-InceptionNet Accelerator for ECG Classification in Wearable Devices.
IEEE Trans. Circuits Syst. I Regul. Pap.
Hoai Luan Pham, Thi Diem Tran, Vu Trung Duong Le, Yasuhiko Nakashima
2025 — conf
MMzk: 384-bit Low-Resource Montgomery Multiplier on FPGA for zk-SNARK.
CANDAR
Hikaru Okamoto, Vu Trung Duong Le, Hoai Luan Pham, Van Tinh Nguyen, Yasuhiko Nakashima
2025 J jnl
MRCA 2.0: An Area-Optimized Multigrained Reconfigurable Cryptographic Accelerator for Securing Blockchain-Based Internet of Things Systems.
IEEE Micro
Hoai Luan Pham, Vu Trung Duong Le, Tuan Hai Vu, Van Duy Tran, Van Tinh Nguyen, Thi Diem Tran, Yasuhiko Nakashima
2025 J jnl
MergeSlide: Continual Model Merging and Task-to-Class Prompt-Aligned Inference for Lifelong Learning on Whole Slide Images.
CoRR
Doanh C. Bui, Ba Hung Ngo, Hoai Luan Pham, Khang Nguyen, Maï K. Nguyen, Yasuhiko Nakashima
2025 — conf
UniCrypt: Universal Crypto Engine with Optimized Resource Sharing for Security Applications.
COOL CHIPS
Vu Trung Duong Le, Hoai Luan Pham, Tuan Hai Vu, Van Duy Tran, Yasuhiko Nakashima
2025 J jnl
ZeroSlide: Is Zero-Shot Classification Adequate for Lifelong Learning in Whole-Slide Image Analysis in the Era of Pathology Vision-Language Foundation Models?
CoRR
Doanh C. Bui, Hoai Luan Pham, Vu Trung Duong Le, Tuan Hai Vu, Van Duy Tran, Yasuhiko Nakashima
2025 — conf
zk-STARKs in Action: Real-Time and Post-Quantum Verification for Banking Transactions.
CANDARW
Thanh Hai To, Vu-Trung Duong Le, Van Tinh Nguyen, Van-Tuan Luu, Hoai Luan Pham, Yasuhiko Nakashima
2024 — conf
A High-Performance FPGA Based on Convolutional Neural Network for QRS Complex Detection.
ICCCNT
Binh Tan Ngo, Nghi Hoang Huu Thai, Hoai Luan Pham, Thi Diem Tran
2024 — conf
Exploring the Limitations of Kolmogorov-Arnold Networks in Classification: Insights to Software Training and Hardware Implementation.
CANDARW
Van Duy Tran, Tran Xuan Hieu Le, Thi Diem Tran, Hoai Luan Pham, Vu Trung Duong Le, Tuan Hai Vu, Van Tinh Nguyen, Yasuhiko Nakashima
2024 J jnl
Exploring the Limitations of Kolmogorov-Arnold Networks in Classification: Insights to Software Training and Hardware Implementation.
CoRR
Van Duy Tran, Tran Xuan Hieu Le, Thi Diem Tran, Hoai Luan Pham, Vu Trung Duong Le, Tuan Hai Vu, Van Tinh Nguyen, Yasuhiko Nakashima
2024 J jnl
FQsun: A Configurable Wave Function-Based Quantum Emulator for Power-Efficient Quantum Simulations.
CoRR
Tuan Hai Vu, Vu Trung Duong Le, Hoai Luan Pham, Quoc Chuong Nguyen, Yasuhiko Nakashima
2024 — conf
High-Efficiency RISC-V-Based Cryptographic Coprocessor for Security Applications.
ISOCC
Duc Hong An Le, Vu Trung Duong Le, Viet Anh Ho, Van Tinh Nguyen, Hoai Luan Pham, Van Duy Tran, Tuan Hai Vu, Yasuhiko Nakashima
2024 — conf
Kyberator: A High-Efficiency FPGA-Based Multi-Mode CRYSTALS-Kyber Accelerator for Quantum-Resistant Security Applications.
ISOCC
Nhat Nguyen Dinh, Hoai Luan Pham, Vu Trung Duong Le, Tuan Hai Vu, Van Duy Tran, Yasuhiko Nakashima
2024 — conf
LI-RV: A Fast and Efficient RISC-V based Coprocessor for Lightweight Cryptography.
ISOCC
Ngoc Hung Nguyen, Duc Hong An Le, Vu Trung Duong Le, Van Tinh Nguyen, Tuan Hai Vu, Hoai Luan Pham, Yasuhiko Nakashima
2024 J jnl
LiCryptor: High-Speed and Compact Multi-Grained Reconfigurable Accelerator for Lightweight Cryptography.
IEEE Trans. Circuits Syst. I Regul. Pap.
Hoai Luan Pham, Vu Trung Duong Le, Van Duy Tran, Tuan Hai Vu, Yasuhiko Nakashima
2024 — conf
PESA: Power-Efficient SPHINCS+ Accelerator for Multi-Domain Security Applications on FPGA SoC.
CANDAR
Vu Trung Duong Le, Anh Kiet Pham, Hoai Luan Pham, Tuan Hai Vu, Yasuhiko Nakashima
2024 J jnl
Theoretical Analysis of the Efficient-Memory Matrix Storage Method for Quantum Emulation Accelerators with Gate Fusion on FPGAs.
CoRR
Tran Xuan Hieu Le, Hoai Luan Pham, Tuan Hai Vu, Vu Trung Duong Le, Yasuhiko Nakashima
2024 — conf
UCP: A Unified Cryptographic Processor for High Performance and Low Power Security Applications.
ISOCC
Vu Trung Duong Le, Hoai Luan Pham, Tuan Hai Vu, Van Duy Tran, Thi Diem Tran, Yasuhiko Nakashima
2023 — conf
Efficient and High-Speed CGRA Accelerator for Cryptographic Applications.
candar
Vu Trung Duong Le, Hoai Luan Pham, Thi Hong Tran, Thi Sang Duong, Yasuhiko Nakashima
2023 — conf
Energy-Efficient 3D Convolution Using Interposed Memory Accelerator eXtension 2 for Medical Image Processing.
MICAD
Ren Imamura, Guangxian Zhu, Thi Sang Duong, Hoai Luan Pham, Renyuan Zhang, Yasuhiko Nakashima
2023 J jnl
Flexible and Scalable BLAKE/BLAKE2 Coprocessor for Blockchain-Based IoT Applications.
IEEE Des. Test
Hoai Luan Pham, Thi Hong Tran, Vu Trung Duong Le, Yasuhiko Nakashima
2023 — conf
High-efficiency Reconfigurable Crypto Accelerator Utilizing Innovative Resource Sharing and Parallel Processing.
MCSoC
Vu Trung Duong Le, Hoai Luan Pham, Thi Hong Tran, Thi Sang Duong, Yasuhiko Nakashima
2023 — conf
Power-Efficient and Programmable Hashing Accelerator for Massive Message Processing.
SOCC
Thi Sang Duong, Hoai Luan Pham, Vu Trung Duong Le, Thi Hong Tran, Yasuhiko Nakashima
2023 J jnl
QuantLaneNet: A 640-FPS and 34-GOPS/W FPGA-Based CNN Accelerator for Lane Detection.
Sensors
Duc Khai Lam, Cam Vinh Du, Hoai Luan Pham
2023 — conf
RHCP: A Reconfigurable High-efficient Cryptographic Processor for Decentralized IoT Platforms.
KSE
Vu Trung Duong Le, Hoai Luan Pham, Thi Sang Duong, Thi Hong Tran, Quoc Duy Nam Nguyen, Yasuhiko Nakashima
2023 — conf
Small-Footprint Reconfigurable Heterogeneous Cryptographic Accelerator for Fog Computing.
RIVF
Thi Sang Duong, Hoai Luan Pham, Vu Trung Duong Le, Ren Imamura, Thi Hong Tran, Yasuhiko Nakashima
2023 — conf
Universal 32/64-bit CGRA for Lightweight Cryptography in Securing IoT Data Transmission.
MCSoC
Thi Sang Duong, Hoai Luan Pham, Vu Trung Duong Le, Thi Diem Tran, Ren Imamura, Quoc Duy Nam Nguyen, Thi Hong Tran, Yasuhiko Nakashima
2023 — conf
Versatile Resource-shared Cryptographic Accelerator for Multi-Domain Applications.
ICICDT
Vu Trung Duong Le, Hoai Luan Pham, Thi Hong Tran, Quoc Duy Nam Nguyen, Thi Sang Duong, Yasuhiko Nakashima
2022 — conf
A Coarse Grained Reconfigurable Architecture for SHA-2 Acceleration.
IPDPS Workshops
Hoai Luan Pham, Thi Hong Tran, Vu Trung Duong Le, Yasuhiko Nakashima
2022 J jnl
A High-Efficiency FPGA-Based Multimode SHA-2 Accelerator.
IEEE Access
Hoai Luan Pham, Thi Hong Tran, Vu Trung Duong Le, Yasuhiko Nakashima
2022 J jnl
Compact Message Permutation for a Fully Pipelined BLAKE-256/512 Accelerator.
IEEE Access
Hoai Luan Pham, Thi Hong Tran, Vu Trung Duong Le, Yasuhiko Nakashima
2021 J jnl
A High-Performance Multimem SHA-256 Accelerator for Society 5.0.
IEEE Access
Thi Hong Tran, Hoai Luan Pham, Yasuhiko Nakashima
2021 J jnl
BCA: A 530-mW Multicore Blockchain Accelerator for Power-Constrained Devices in Securing Decentralized Networks.
IEEE Trans. Circuits Syst. I Regul. Pap.
Thi Hong Tran, Hoai Luan Pham, Tri Dung Phan, Yasuhiko Nakashima
2021 — conf
High Performance Multicore SHA-256 Accelerator using Fully Parallel Computation and Local Memory.
COOL CHIPS
Van Dai Phan, Hoai Luan Pham, Thi Hong Tran, Yasuhiko Nakashima
2021 J jnl
MRSA: A High-Efficiency Multi ROMix Scrypt Accelerator for Cryptocurrency Mining and Data Security.
IEEE Access
Vu Trung Duong Le, Thi Hong Tran, Hoai Luan Pham, Duc Khai Lam, Yasuhiko Nakashima
2020 J jnl
Double SHA-256 Hardware Architecture With Compact Message Expander for Bitcoin Mining.
IEEE Access
Hoai Luan Pham, Thi Hong Tran, Tri Dung Phan, Vu Trung Duong Le, Duc Khai Lam, Yasuhiko Nakashima
2018 — conf
A Secure Remote Healthcare System for Hospital Using Blockchain Smart Contract.
GLOBECOM Workshops
Hoai Luan Pham, Thi Hong Tran, Yasuhiko Nakashima