Ho-Jin Kim

24 papers C 1Journal 10Unranked 13
YearRankTypeTitle / Venue / Authors
2026 J jnl
A 12-Bit 600-MS/s Pipelined ADC With Two-Stage High-Gain Dynamic Amplifier in 28-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Bo Gao, Raymond Mabilangan, Chang-Un Park, Kent Edrian Lozada, Ho-Jin Kim, Youngjae Cho, Michael Choi, Seung-Tak Ryu
2025 J jnl
A 0.38-mW 200-kHz-BW Digital-Intensive Single-Opamp Fourth-Order Continuous-Time Delta-Sigma Modulator With Third-Order Digital Noise Coupling in 28-nm CMOS.
IEEE J. Solid State Circuits
Kent Edrian Lozada, Ye-Dam Kim, Ho-Jin Kim, Youngjae Cho, Michael Choi, Seung-Tak Ryu
2024 — conf
A 0.38mW 200kHz-BW 92.1dB-DR Single-Opamp 4th-Order Continuous-Time Delta-Sigma Modulator with 3
VLSI Technology and Circuits
Kent Edrian Lozada, Ye-Dam Kim, Ho-Jin Kim, Youngjae Cho, Michael Choi, Seung-Tak Ryu
2024 J jnl
A 25-kHz-BW 97.4-dB-SNDR SAR-Assisted Continuous-Time 1-0 MASH Delta-Sigma Modulator With Digital Noise Coupling.
IEEE J. Solid State Circuits
Dong-Hun Lee, Kent Edrian Lozada, Ye-Dam Kim, Ho-Jin Kim, Youngjae Cho, Michael Choi, Seung-Tak Ryu
2024 — conf
A 28nm CMOS 12-bit-600-MS/s 15.6mW Pipelined ADC with Two-Stage Gainboosting FIA-based RA.
A-SSCC
Bo Gao, Lizhen Zhang, Raymond Mabilangan, Chang-Un Park, Kent Edrian Lozada, Ho-Jin Kim, Youngjae Cho, Michael Choi, Seung-Tak Ryu
2023 — conf
A 25kHz-BW 97.4dB-SNDR 100.2dB-DR 3
A-SSCC
Kent Edrian Lozada, Dong-Hun Lee, Ye-Dam Kim, Ho-Jin Kim, Youngjae Cho, Michael Choi, Seung-Tak Ryu
2023 J jnl
A Single-Loop Third-Order 10-MHz BW Source-Follower-Integrator Based Discrete-Time Delta-Sigma ADC.
IEEE Trans. Circuits Syst. II Express Briefs
Ho-Jin Kim, Jun-Ho Boo, Kang-Il Cho, Yong-Sik Kwak, Gil-Cho Ahn
2022 — conf
A 430-MS/s 7-b Asynchronous SAR ADC With a 40 fF Input Sampling Capacitor.
ISOCC
Hyoung-Jung Kim, Jae-Hyuk Lee, Jae-Geun Lim, Jun-Ho Boo, Ho-Jin Kim, Seong-Bo Park, Youngdon Choi, Jung-Hwan Choi, Gil-Cho Ahn
2021 — conf
A 0.9V 0.022mm
A-SSCC
Yong-Sik Kwak, Ho-Jin Kim, Kang-Il Cho, Jun-Ho Boo, Gil-Cho Ahn
2021 J jnl
A 96dB Dynamic Range 2kHz Bandwidth 2nd Order Delta-Sigma Modulator Using Modified Feed-Forward Architecture With Delayed Feedback.
IEEE Trans. Circuits Syst. II Express Briefs
Ju-Hye Han, Kang-Il Cho, Ho-Jin Kim, Jun-Ho Boo, Jae Sang Kim, Gil-Cho Ahn
2021 J jnl
A Single-Trim Switched Capacitor CMOS Bandgap Reference With a 3σ Inaccuracy of +0.02%, -0.12% for Battery-Monitoring Applications.
IEEE J. Solid State Circuits
Jun-Ho Boo, Kang-Il Cho, Ho-Jin Kim, Jae-Geun Lim, Yong-Sik Kwak, Seung-Hoon Lee, Gil-Cho Ahn
2020 — conf
A 10-b 900-MS/s Single-Channel Pipelined-SAR ADC Using Current-Mode Reference Scaling.
A-SSCC
Kang-Il Cho, Ho-Jin Kim, Jun-Ho Boo, Yong-Sik Kwak, Jun-Sang Park, Seung-Hoon Lee, Gil-Cho Ahn
2020 — conf
A 2.2mW 12-bit 200MS/s 28nm CMOS Pipelined SAR ADC with Dynamic Register-Based High-Speed SAR Logic.
A-SSCC
Jun-Sang Park, Je-Min Jeon, Jun-Ho Boo, Jae-Hyuk Lee, Kang-Il Cho, Ho-Jin Kim, Gil-Cho Ahn, Seung-Hoon Lee
2020 — conf
A Single-Trim Switched Capacitor CMOS Bandgap Reference with a 3σ Inaccuracy of +0.02%, -0.12% for Battery Monitoring Applications.
VLSI Circuits
Jun-Ho Boo, Kang-Il Cho, Ho-Jin Kim, Jae-Geun Lim, Yong-Sik Kwak, Seung-Hoon Lee, Gil-Cho Ahn
2020 — conf
A Third-Order DT Delta-Sigma Modulator With Noise-Coupling Technique.
ISOCC
Tae-Gwan Kim, Kang-Il Cho, Ho-Jin Kim, Jun-Ho Boo, Yong-Sik Kwak, Gil-Cho Ahn
2019 — conf
A 10-b 320-MS/s Dual-Residue Pipelined SAR ADC with Binary Search Current Interpolator.
CICC
Kang-Il Cho, Yong-Sik Kwak, Ho-Jin Kim, Jun-Ho Boo, Seung-Hoon Lee, Gil-Cho Ahn
2019 — conf
A 101 dB Dynamic Range Delta-Sigma Modulator Using Modified Feed-Forward Architecture for Audio Application.
ISOCC
Jun-Young Kil, Kang-Il Cho, Ho-Jin Kim, Jun-Ho Boo, Yong-Sik Kwak, Gil-Cho Ahn
2018 J jnl
A 101 dB dynamic range, 2 kHz bandwidth delta-sigma modulator with a modified feed-forward architecture.
IEICE Electron. Express
Kang-Il Cho, Yong-Sik Kwak, Ho-Jin Kim, Gil-Cho Ahn
2018 J jnl
A 72.9-dB SNDR 20-MHz BW 2-2 Discrete-Time Resolution-Enhanced Sturdy MASH Delta-Sigma Modulator Using Source-Follower-Based Integrators.
IEEE J. Solid State Circuits
Yong-Sik Kwak, Kang-Il Cho, Ho-Jin Kim, Seung-Hoon Lee, Gil-Cho Ahn
2017 J jnl
A 1.8 V 89.2 dB dynamic range delta-sigma modulator using an op-amp dynamic current biasing technique.
IEICE Electron. Express
Yong-Sik Kwak, Kang-Il Cho, Ho-Jin Kim, Gil-Cho Ahn
2017 — conf
A 72.9-dB SNDR 20-MHz BW 2-2 discrete-time sturdy MASH delta-sigma modulator using source-follower-based integrators.
A-SSCC
Yong-Sik Kwak, Kang-Il Cho, Ho-Jin Kim, Seung-Hoon Lee, Gil-Cho Ahn
2017 — conf
Analog front-end for EMG acquisition system.
ISOCC
Bum-Sik Chung, Hyeong-Kyu Kim, Kang-Il Cho, Ho-Jin Kim, Gil-Cho Ahn
2015 J jnl
Shape memory alloy (SMA)-based head and neck immobilizer for radiotherapy.
J. Comput. Des. Eng.
Hyun-Taek Lee, Sung-In Kim, Jong Min Park, Ho-Jin Kim, Dae-Seob Song, Hyung-Il Kim, Hong-Gyun Wu, Sung-Hoon Ahn
2002 C conf
An application of airborne hyperspectral and EO-1 Hyperion data for inter-sensor calibration of vegetation indices for regional-scale monitoring.
IGARSS
Tomoaki Miura, Alfredo Huete, Hiroki Yoshioka, Ho-Jin Kim