Ho-Cheung Ng - RankMe

30 papers A 2B 3C 1Misc 1Journal 11Unranked 11

Year	Rank	Type	Title / Venue / Authors
2024	J	`jnl`	Honeycomb: Ordered Key-Value Store Acceleration on an FPGA-Based SmartNIC. IEEE Trans. Computers Junyi Liu, Aleksandar Dragojevic, Shane T. Fleming, Antonios Katsarakis, Dario Korolija, Igor Zablotchi, Ho-Cheung Ng, Anuj Kalia, Miguel Castro
2023	J	`jnl`	Honeycomb: ordered key-value store acceleration on an FPGA-based SmartNIC. CoRR Junyi Liu, Aleksandar Dragojevic, Shane Flemming, Antonios Katsarakis, Dario Korolija, Igor Zablotchi, Ho-Cheung Ng, Anuj Kalia, Miguel Castro
2022	J	`jnl`	Low-Latency In Situ Image Analytics With FPGA-Based Quantized Convolutional Neural Network. IEEE Trans. Neural Networks Learn. Syst. Maolin Wang, Kelvin C. M. Lee, Bob M. F. Chung, Sharatchandra Varma Bogaraju, Ho-Cheung Ng, Justin S. J. Wong, Ho Cheung Shum, Kevin K. Tsia, Hayden Kwok-Hay So
2021	A	`conf`	Reconfigurable Acceleration of Short Read Mapping with Biological Consideration. FPGA Ho-Cheung Ng, Izaak Coleman, Shuanglong Liu, Wayne Luk
2020	—	`conf`	Acceleration of Short Read Alignment with Runtime Reconfiguration. FPT Ho-Cheung Ng, Shuanglong Liu, Izaak Coleman, Ringo S. W. Chu, Man-Chung Yue, Wayne Luk
2020	J	`jnl`	GeDi: applying suffix arrays to increase the repertoire of detectable SNVs in tumour genomes. BMC Bioinform. Izaak Coleman, Giacomo Corleone, James Arram, Ho-Cheung Ng, Luca Magnani, Wayne Luk
2019	C	`conf`	Convolution Based Spectral Partitioning Architecture for Hyperspectral Image Classification. IGARSS Ringo S. W. Chu, Ho-Cheung Ng, Xiwei Wang, Wayne Luk
2019	J	`jnl`	Convolution Based Spectral Partitioning Architecture for Hyperspectral Image Classification. CoRR Ringo S. W. Chu, Ho-Cheung Ng, Xiwei Wang, Wayne Luk
2019	J	`jnl`	Deep Neural Network Approximation for Custom Hardware: Where We've Been, Where We're Going. CoRR Erwei Wang, James J. Davis, Ruizhe Zhao, Ho-Cheung Ng, Xinyu Niu, Wayne Luk, Peter Y. K. Cheung, George A. Constantinides
2019	J	`jnl`	Deep Neural Network Approximation for Custom Hardware: Where We've Been, Where We're Going. ACM Comput. Surv. Erwei Wang, James J. Davis, Ruizhe Zhao, Ho-Cheung Ng, Xinyu Niu, Wayne Luk, Peter Y. K. Cheung, George A. Constantinides
2019	—	`conf`	Investigating the Feasibility of FPGA-based Network Switches. ASAP Jiuxi Meng, Nadeen Gebara, Ho-Cheung Ng, Paolo Costa, Wayne Luk
2018	—	`conf`	A Real-Time Object Detection Accelerator with Compressed SSDLite on FPGA. FPT Hongxiang Fan, Shuanglong Liu, Martin Ferianc, Ho-Cheung Ng, Zhiqiang Que, Shen Liu, Xinyu Niu, Wayne Luk
2018	A	`conf`	ADAM: Automated Design Analysis and Merging for Speeding up FPGA Development. FPGA Ho-Cheung Ng, Shuanglong Liu, Wayne Luk
2018	—	`conf`	Hardware Compilation of Deep Neural Networks: An Overview. ASAP Ruizhe Zhao, Shuanglong Liu, Ho-Cheung Ng, Erwei Wang, James J. Davis, Xinyu Niu, Xiwei Wang, Huifeng Shi, George A. Constantinides, Peter Y. K. Cheung, Wayne Luk
2018	—	`conf`	Memory-Efficient Architecture for Accelerating Generative Networks on FPGA. FPT Shuanglong Liu, Chenglong Zeng, Hongxiang Fan, Ho-Cheung Ng, Jiuxi Meng, Zhiqiang Que, Xinyu Niu, Wayne Luk
2018	J	`jnl`	Optimizing CNN-based Segmentation with Deeply Customized Convolutional and Deconvolutional Architectures on FPGA. ACM Trans. Reconfigurable Technol. Syst. Shuanglong Liu, Hongxiang Fan, Xinyu Niu, Ho-Cheung Ng, Yang Chu, Wayne Luk
2018	B	`conf`	Reconfigurable Acceleration of 3D-CNNs for Human Action Recognition with Block Floating-Point Representation. FPL Hongxiang Fan, Ho-Cheung Ng, Shuanglong Liu, Zhiqiang Que, Xinyu Niu, Wayne Luk
2018	B	`conf`	Towards Efficient Convolutional Neural Network for Domain-Specific Applications on FPGA. FPL Ruizhe Zhao, Ho-Cheung Ng, Wayne Luk, Xinyu Niu
2018	J	`jnl`	Towards Efficient Convolutional Neural Network for Domain-Specific Applications on FPGA. CoRR Ruizhe Zhao, Ho-Cheung Ng, Wayne Luk, Xinyu Niu
2017	Misc	`conf`	A Parameterizable Activation Function Generator for FPGA-Based Neural Network Applications. FCCM Sam M. H. Ho, C.-H. Dominic Hung, Ho-Cheung Ng, Maolin Wang, Hayden Kwok-Hay So
2017	B	`conf`	Reconfigurable acceleration of genetic sequence alignment: A survey of two decades of efforts. FPL Ho-Cheung Ng, Shuanglong Liu, Wayne Luk
2016	J	`jnl`	A Soft Processor Overlay with Tightly-coupled FPGA Accelerator. CoRR Ho-Cheung Ng, Cheng Liu, Hayden Kwok-Hay So
2016	—	`conf`	High-throughput cellular imaging with high-speed asymmetric-detection time-stretch optical microscopy under FPGA platform. ReConFig Ho-Cheung Ng, Maolin Wang, Bob M. F. Chung, B. Sharat Chandra Varma, Manish Kumar Jaiswal, Sam M. H. Ho, Kevin K. Tsia, Ho Cheung Shum, Hayden Kwok-Hay So
2016	—	`conf`	Real-time object detection and classification for high-speed asymmetric-detection time-stretch optical microscopy on FPGA. FPT Maolin Wang, Ho-Cheung Ng, Bob M. F. Chung, B. Sharat Chandra Varma, Manish Kumar Jaiswal, Kevin K. Tsia, Ho Cheung Shum, Hayden Kwok-Hay So
2016	—	`conf`	Towards FPGA-assisted spark: An SVM training acceleration case study. ReConFig Sam M. H. Ho, Maolin Wang, Ho-Cheung Ng, Hayden Kwok-Hay So
2015	—	`—`	A soft processor overlay with tightly-coupled FPGA accelerator. Ho-Cheung Ng
2015	J	`jnl`	Automatic Nested Loop Acceleration on FPGAs Using Soft CGRA Overlay. CoRR Cheng Liu, Ho-Cheung Ng, Hayden Kwok-Hay So
2015	—	`conf`	QuickDough: A rapid FPGA loop accelerator design framework using soft CGRA overlay. FPT Cheng Liu, Ho-Cheung Ng, Hayden Kwok-Hay So
2014	—	`conf`	WIJAM: A Mobile Collaborative Improvisation Platform under Master-players Paradigm. NIME Jun-qi Deng, Francis Chi-Moon Lau, Ho-Cheung Ng, Yu-Kwong Kwok, Hung-Kwan Chen, Yuheng Liu
2013	—	`conf`	Direct virtual memory access from FPGA for high-productivity heterogeneous computing. FPT Ho-Cheung Ng, Yuk-Ming Choi, Hayden Kwok-Hay So