Hitoshi Kitazawa

40 papers A* 2A 6C 3Misc 1Journal 17Unranked 11
YearRankTypeTitle / Venue / Authors
2017 J jnl
A Theoretical Framework for Estimating False Acceptance Rate of PRNU-Based Camera Identification.
IEEE Trans. Inf. Forensics Secur.
Shota Saito, Yoichi Tomioka, Hitoshi Kitazawa
2016 — conf
A multistage dataflow implementation of a Deep Convolutional Neural Network based on FPGA for high-speed object recognition.
SSIAI
Ning Li, Shunpei Takaki, Yoichi Tomioka, Hitoshi Kitazawa
2015 A conf
An FPGA Implementation of Multi-stream Tracking Hardware using 2D SIMD Array (Abstract Only).
FPGA
Ryota Takasu, Yoichi Tomioka, Takashi Aoki, Hitoshi Kitazawa
2015 C conf
An FPGA implementation of 3D numerical simulations on a 2D SIMD array processor.
ISCAS
Yutaro Ishigaki, Yoichi Tomioka, Tsugumichi Shibata, Hitoshi Kitazawa
2015 A conf
An FPGA-Based Accelerator for the 2D Implicit FDM and Its Application to Heat Conduction Simulations (Abstract Only).
FPGA
Yutaro Ishigaki, Ning Li, Yoichi Tomioka, Akihiko Miyazaki, Hitoshi Kitazawa
2015 J jnl
Robust Moving Object Extraction and Tracking Method Based on Matching Position Constraints.
IEICE Trans. Inf. Syst.
Tetsuya Okuda, Yoichi Tomioka, Hitoshi Kitazawa
2014 J jnl
An FPGA Implementation of the Two-Dimensional FDTD Method and Its Performance Comparison with GPGPU.
IEICE Trans. Electron.
Ryota Takasu, Yoichi Tomioka, Yutaro Ishigaki, Ning Li, Tsugumichi Shibata, Mamoru Nakanishi, Hitoshi Kitazawa
2014 J jnl
FPGA Implementation of Exclusive Block Matching for Robust Moving Object Extraction and Tracking.
IEICE Trans. Inf. Syst.
Yoichi Tomioka, Ryota Takasu, Takashi Aoki, Eiichi Hosoya, Hitoshi Kitazawa
2014 A conf
Patrol course planning and battery station placement for mobile surveillance cameras.
ICME
Sumitaka Ogino, Yoichi Tomioka, Hitoshi Kitazawa
2014 J jnl
Sunshine-Change-Tolerant Moving Object Masking for Realizing both Privacy Protection and Video Surveillance.
IEICE Trans. Inf. Syst.
Yoichi Tomioka, Hikaru Murakami, Hitoshi Kitazawa
2013 A conf
Collaborative patrol planning of mobile surveillance cameras for perfect observation of moving objects.
ICME
Yoichi Tomioka, Hitoshi Kitazawa
2013 J jnl
Extraction and Tracking Moving Objects in Detail Considering Visual Feature Constraint and Structure Constraint.
IEICE Trans. Inf. Syst.
Zhu Li, Yoichi Tomioka, Hitoshi Kitazawa
2013 J jnl
Robust Digital Camera Identification Based on Pairwise Magnitude Relations of Clustered Sensor Pattern Noise.
IEEE Trans. Inf. Forensics Secur.
Yoichi Tomioka, Yuya Ito, Hitoshi Kitazawa
2012 J jnl
Generation of an Optimum Patrol Course for Mobile Surveillance Camera.
IEEE Trans. Circuits Syst. Video Technol.
Yoichi Tomioka, Atsushi Takara, Hitoshi Kitazawa
2012 J jnl
Template Matching Method Based on Visual Feature Constraint and Structure Constraint.
IEICE Trans. Inf. Syst.
Zhu Li, Kojiro Tomotsune, Yoichi Tomioka, Hitoshi Kitazawa
2011 A conf
Digital camera identification based on the clustered pattern noise of image sensors.
ICME
Yoichi Tomioka, Hitoshi Kitazawa
2011 — conf
Enhanced patrol course planning method for multiple mobile surveillance cameras.
ICDSC
Yoichi Tomioka, Atsushi Takara, Hitoshi Kitazawa
2010 J jnl
Exclusive Block Matching for Moving Object Extraction and Tracking.
IEICE Trans. Inf. Syst.
Zhu Li, Kenichi Yabuta, Hitoshi Kitazawa
2010 — conf
Motion estimation based on iterative color matching and structure matching.
APCCAS
Zhu Li, Yoichi Tomioka, Hitoshi Kitazawa
2010 — conf
Travelling route of mobile surveillance camera.
APCCAS
Yoichi Tomioka, Atsushi Takara, Hitoshi Kitazawa
2009 C conf
A New Method for Moving Object Extraction and Tracking Based on the Exclusive Block Matching.
PSIVT
Zhu Li, Kenichi Yabuta, Hitoshi Kitazawa
2009 — conf
An improved camera identification method based on the texture complexity and the image restoration.
ICHIT
Kazuya Matsushita, Hitoshi Kitazawa
2009 J jnl
Privacy Protection by Masking Moving Objects for Security Cameras.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Kenichi Yabuta, Hitoshi Kitazawa, Toshihisa Tanaka
2008 — conf
A vision sensor with background subtraction processor using mixed analog-digital architecture.
APCCAS
Jun Umezawa, Hitoshi Kitazawa
2008 C conf
Optimum camera placement considering camera specification for security monitoring.
ISCAS
Kenichi Yabuta, Hitoshi Kitazawa
2006 — conf
A new concept of real-time security camera monitoring with privacy protection by masking moving objects.
Real-Time Image Processing
Kenichi Yabuta, Hitoshi Kitazawa, Toshihisa Tanaka
2006 J jnl
Image-Based Photorealistic 3D Reconstruction Using Hexagonal Representation.
Inf. Media Technol.
Hidenori Sato, Hiroto Matsuoka, Hitoshi Kitazawa, Akira Onozawa
2005 — conf
A New Concept of Security Camera Monitoring with Privacy Protection by Masking Moving Objects.
PCM (1)
Kenichi Yabuta, Hitoshi Kitazawa, Toshihisa Tanaka
2002 — conf
Hexagonal Image Representation for 3-D Photorealistic Reconstruction.
ICPR (2)
Hidenori Sato, Hiroto Matsuoka, Akira Onozawa, Hitoshi Kitazawa
2002 J jnl
Representation of Pseudo Inter-reflection and Transparency by Considering Characteristics of Human Vision.
Comput. Graph. Forum
Hiroto Matsuoka, Tatsuto Takeuchi, Hitoshi Kitazawa, Akira Onozawa
2000 Misc conf
Optimizing Network 3D Data Transmissions for Interactive Applications.
PG
Ikuo Harada, Hidenori Sato, Hitoshi Kitazawa
1997 — conf
An Efficient Paired-net Routing Algorithm for High-speed Bipolar LSIs.
Great Lakes Symposium on VLSI
Yuichiro Takei, Akira Onozawa, Kenji Kawai, Hitoshi Kitazawa
1995 — conf
Post-layout optimization of power and timing for ECL LSIs.
ED&TC
Akira Onozawa, Hitoshi Kitazawa, Kenji Kawai
1994 A* conf
A Global Router Optimizing Timing and Area for High-Speed Bipolar LSI's.
DAC
Ikuo Harada, Hitoshi Kitazawa
1990 A conf
A Routing System for Mixed A/D Standard Cell LSIs.
ICCAD
Ikuo Harada, Hitoshi Kitazawa, Takao Kaneko
1987 J jnl
A Parallel Adaptable Routing Algorithm and its Implementation on a Two-Dimensional Array Processor.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Takumi Watanabe, Hitoshi Kitazawa, Yoshi Sugiyama
1987 J jnl
Top-Down Layout for Hierarchical Custom Design.
IEEE Des. Test
Kazuhiro Ueda, Hitoshi Kitazawa, Tohru Adachi, Ikuo Harada
1985 J jnl
An Integrated Design Automation System for VLSI Circuits.
IEEE Des. Test
Osamu Karatsu, Tamio Hoshino, Makoto Endo, Hitoshi Kitazawa, Tohru Adachi, Kazuhiro Ueda
1985 J jnl
CHAMP: Chip Floor Plan for Hierarchical VLSI Layout Design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kazuhiro Ueda, Hitoshi Kitazawa, Ikuo Harada
1982 A* conf
Hierarchical top-down layout design method for VLSI chip.
DAC
Tohru Adachi, Hitoshi Kitazawa, Mitsuyoshi Nagatani, Tsuneta Sudo