Hisashi Iwamoto

15 papers A 1B 1C 1Journal 7Unranked 5
YearRankTypeTitle / Venue / Authors
2022 — conf
28-m W Fully Embedded AI Techniques with On-site Learning for Low-Power Handy Tactile Sensing System.
VLSI-DAT
Yuji Yano, Hisashi Iwamoto, Takuma Yoshimura, Yoshihiro Nishida, Tatsuya Mori, Kiyotaka Komoku, Hidekuni Takao, Kazutami Arimoto
2017 A conf
A Batch Normalization Free Binarized Convolutional Deep Neural Network on an FPGA (Abstract Only).
FPGA
Hiroki Nakahara, Haruyoshi Yonekawa, Hisashi Iwamoto, Masato Motomura
2016 — conf
A memory-based realization of a binarized deep convolutional neural network.
FPT
Hiroki Nakahara, Haruyoshi Yonekawa, Tsutomu Sasao, Hisashi Iwamoto, Masato Motomura
2016 J jnl
An Update Method for a Low Power Cam Emulator Using an LUT Cascade Based on an EVMDD (
J. Multiple Valued Log. Soft Comput.
Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura, Hisashi Iwamoto
2016 — conf
Energy-efficient high-speed search engine using a multi-dimensional TCAM architecture with parallel pipelined subdivided structure.
CCNC
Masami Nawa, Kenzo Okuda, Shingo Ata, Yasuto Kuroda, Yuji Yano, Hisashi Iwamoto, Kazunari Inoue, Ikuo Oka
2016 J jnl
LUT Cascades Based on Edge-Valued Multi-Valued Decision Diagrams: Application to Packet Classification.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Hiroki Nakahara, Tsutomu Sasao, Hisashi Iwamoto, Munehiro Matsuura
2015 J jnl
A Memory-Based IPv6 Lookup Architecture Using Parallel Index Generation Units.
IEICE Trans. Inf. Syst.
Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura, Hisashi Iwamoto, Yasuhiro Terao
2013 — conf
2D Sliced Packet Buffer with traffic volume and buffer occupancy adaptation for power saving.
CCNC
Kenzo Okuda, Shingo Ata, Yasuto Kuroda, Yuji Yano, Hisashi Iwamoto, Kazunari Inoue, Ikuo Oka
2013 J jnl
A 250 Msps, 0.5 W eDRAM-Based Search Engine Dedicated Low Power FIB Application.
IEICE Trans. Electron.
Hisashi Iwamoto, Yuji Yano, Yasuto Kuroda, Koji Yamamoto, Kazunari Inoue, Ikuo Oka
2013 J jnl
A study on micro level traffic prediction for energy-aware routers.
ACM SIGOPS Oper. Syst. Rev.
Sou Koyano, Shingo Ata, Hisashi Iwamoto, Yuji Yano, Yasuto Kuroda, Kazunari Inoue, Ikuo Oka
2013 J jnl
Deterministic Packet Buffer System with Multi FIFO Queues for the Advanced QoS.
IEICE Trans. Commun.
Hisashi Iwamoto, Yuji Yano, Yasuto Kuroda, Koji Yamamoto, Shingo Ata, Kazunari Inoue
2012 — conf
A 200Msps, 0.6W eDRAM-based search engine applying full-route capacity dedicated FIB application.
CICC
Yasuto Kuroda, Yuji Yano, Hisashi Iwamoto, Koji Yamamoto, Kazunari Inoue, Masahiro Suzuki
2012 C conf
A slice structure using the management of network traffic prediction for green IT.
HPSR
Yuji Yano, Hisashi Iwamoto, Yasuto Kuroda, Shiro Ohtani, Shingo Ata, Kazunari Inoue
2012 B conf
Deterministic High Density Packet-Buffer System for Low Cost Network Systems.
AINA
Hisashi Iwamoto, Yuji Yano, Yasuto Kuroda, Koji Yamamoto, Shingo Ata, Kazunari Inoue
1992 J jnl
A 100-MHz 4-Mb cache DRAM with fast copy-back scheme.
IEEE J. Solid State Circuits
Katsumi Dosaka, Yasuhiro Konishi, Kouji Hayano, Katsumitsu Himukashi, Akira Yamazaki, Hisashi Iwamoto, Masaki Kumanoya, Hisanori Hamano, Tsutomu Yoshihara