Hiroyuki Tomiyama

218 papers A* 1A 6B 9C 12Misc 9Journal 78Unranked 103

Year	Rank	Type	Title / Venue / Authors
2026	Misc	`conf`	A Polynomial Time Routing Algorithm for Meda Biochips Based on Dijkstra's Algorithm. VLSID Issei Nakamura, Shigeru Yamashita, Hiroyuki Tomiyama, Ankur Guputa
2025	J	`jnl`	Interval-Aware Scheduling of Surveillance Drones: Exact and Heuristic Approaches. IEEE Access Kaito Mori, Hiroki Nishikawa, Hiroyuki Tomiyama
2025	B	`conf`	Poster: A Comparative Analysis of Machine Learning Models for SAT Runtime Prediction. RTCSA Tomohisa Kawakami, Tomoyasu Shimada, Xiangbo Kong, Hiroyuki Tomiyama, Shigeru Yamashita
2025	—	`conf`	Real-Time Performance Analysis for Multiple Neural Networks on Edge Devices. ICEIC Takumi Hikino, Hiroyuki Tomiyama
2025	J	`jnl`	TOE-YOLO: accurate and efficient detection of tiny objects in UAV imagery. J. Real Time Image Process. Haimin Yan, Xiangbo Kong, Tomoyasu Shimada, Hiroyuki Tomiyama
2025	B	`conf`	YOLO-EMR: Efficient Multi-Scale and Rotated Object Detection in UAV Aerial Imagery. SMC Haimin Yan, Xiangbo Kong, Tomoyasu Shimada, Juncheng Wang, Hiroyuki Tomiyama
2024	—	`conf`	A Non-Work Conserving Algorithm for Dynamic Scheduling of Moldable Gang Tasks on Multicore Systems. ICEIC Tomoki Shimizu, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2024	—	`conf`	An Approximate Multiplier Design Based on Mitchell's Algorithm. ISOCC Xiangyu Li, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2024	J	`jnl`	Dynamic Point-Pixel Feature Alignment for Multimodal 3-D Object Detection. IEEE Internet Things J. Juncheng Wang, Xiangbo Kong, Hiroki Nishikawa, Qiuyou Lian, Hiroyuki Tomiyama
2024	—	`conf`	Evaluation of Self-localization Estimation in Indoor Environments Using Cameras for Small Drones. ATAIT Genki Higashiuchi, Tomoyasu Shimada, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2024	—	`conf`	FPGA Design of a Masked AES Circuit with PPRM-based S-Box. ISOCC Yuhui Liu, Taosong Zhao, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2024	—	`conf`	Fast 32-bit and 48-bit Multipliers for FPGA. ICEIC Wakana Ohashi, Aoi Yamaguch, Hiroki Nishikawa, Hiroyuki Tomiyama
2024	—	`conf`	Impacts of Clock Frequency and Sampling Intervals on Power Side-Channel Leakage of AES Circuits. ICEIC Yuto Miura, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2024	—	`conf`	Interval-Aware Scheduling of a Surveillance Drone. GCCE Kaito Mori, Hiroki Nishikawa, Hiroyuki Tomiyama
2024	—	`conf`	Multi-Trip Routing of Delivery Drones with Load-Dependent Flight Speed. ICEIC Mao Nishira, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2024	—	`conf`	Simultaneous Routing with Washing Droplets in MEDA Biochips. ATAIT Chiharu Shiro, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Shigeru Yamashita
2024	—	`conf`	Spin Estimation for Back Spin Serves in Table Tennis Using Racket Speed and Angle. ICEIC Hiroki Matsumiya, Xiangbo Kong, Ami Tanaka, Hiroki Nishikawa, Hiroyuki Tomiyama
2024	C	`conf`	Table Tennis Stroke Classification from Game Videos Using 3D Human Keypoints. VCIP Yuta Fujihara, Xiangbo Kong, Ami Tanaka, Hiroki Nishikawa, Hiroyuki Tomiyama
2024	B	`conf`	YOLO-ELD: Efficient and Lightweight Detection for UAV Aerial Imagery. SMC Haimin Yan, Juncheng Wang, Xiangbo Kong, Hiroyuki Tomiyama
2024	B	`conf`	YOLO-UTS: Lightweight YOLOv5 for UAV Traffic Monitoring and Surveillance. SMC Haimin Yan, Juncheng Wang, Xiangbo Kong, Hiroyuki Tomiyama
2023	J	`jnl`	A Deep Reinforcement Learning Approach to Droplet Routing for Erroneous Digital Microfluidic Biochips. Sensors Tomohisa Kawakami, Chiharu Shiro, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Shigeru Yamashita
2023	—	`conf`	A Deep Reinforcement Learning-based Routing Algorithm for Unknown Erroneous Cells in DMFBs. NEWCAS Tomohisa Kawakami, Chiharu Shiro, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Shigeru Yamashita
2023	—	`conf`	A Fast Approach to Droplet Routing with Shape-Dependent Velocity on MEDA Biochips. NEWCAS Kaito Mori, Chiharu Shiro, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Shigeru Yamashita
2023	J	`jnl`	An architecture-level analysis on deep learning models for low-impact computations. Artif. Intell. Rev. Hengyi Li, Zhichen Wang, Xuebin Yue, Wenwen Wang, Hiroyuki Tomiyama, Lin Meng
2023	—	`conf`	Ball Touching Net Detection Using Piezoelectric Element in Table Tennis. ATAIT Ruisheng Xu, Ami Tanaka, Xiangbo Kong, Hiroyuki Tomiyama
2023	—	`conf`	Design and Evaluation of AES Encryption Circuits with Various S-Box Implementation. ATAIT Taosong Zhao, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2023	—	`conf`	Drone path planning method to reduce energy consumption. ATAIT Takuto Maejima, Xiangbo Kong, Tomoyasu Shimada, Hiroki Nishikawa, Hiroyuki Tomiyama
2023	—	`conf`	Empirical Analysis of Side-Channel Attack Resistance of HLS-designed AES Circuits. ICEIC Takumi Mizuno, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2023	—	`conf`	Faster Depth Estimation for Autonomous Flying Drones. ATAIT Takuya Kosaka, Xiangbo Kong, Tomoyasu Shimada, Hiroki Nishikawa, Hiroyuki Tomiyama
2023	—	`conf`	Impacts of Clock Constraints on Side-Channel Leakage of HLS-designed AES Circuits. ICEIC Yuto Miura, Takumi Mizuno, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2023	—	`conf`	In/Out Judgement by Ball Tracking in Table Tennis. ATAIT Yuta Fujihara, Xiangbo Kong, Ami Tanaka, Hiroki Nishikawa, Hiroyuki Tomiyama
2023	B	`conf`	Message from the Chairs: RTCSA 2023. RTCSA Hiroshi Yamada, Ting He, Hiroyuki Tomiyama, Nan Guan, Sebastian Steinhorst
2023	—	`conf`	Multi-Droplet Routing based on a Shape-Dependent Velocity Model on MEDA Biochips. ICEIC Chiharu Shiro, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Shigeru Yamashita
2023	J	`jnl`	Rice Yield Prediction in Different Growth Environments Using Unmanned Aerial Vehicle-Based Hyperspectral Imaging. Remote. Sens. Junichi Kurihara, Toru Nagata, Hiroyuki Tomiyama
2023	—	`conf`	Simulation-based Analysis of Power Side-Channel Leakage at Different Sampling Intervals. CANDARW Yuto Miura, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2023	—	`conf`	Surveillance Routing with a Minimum Number of Drones. CANDARW Kaito Mori, Mao Nishira, Hiroki Nishikawa, Hiroyuki Tomiyama
2023	Misc	`conf`	Transport-Free Placement of Mixers for Realizing Bioprotocol on Programmable Microfluidic Devices. VLSID Masataka Hirai, Debraj Kundu, Shigeru Yamashita, Sudip Roy, Hiroyuki Tomiyama
2022	—	`conf`	A Case Study on Forehand Footwork Mistake Detection in Table Tennis. ATAIT Hiroki Matsumiya, Xiangbo Kong, Ami Tanaka, Hiroki Nishikawa, Hiroyuki Tomiyama
2022	—	`conf`	A Fair-Policy Dynamic Scheduling Algorithm for Moldable Gang Tasks on Multicores. MECO Tomoki Shimizu, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2022	—	`conf`	A Heuristic Scheduling Algorithm with Variable-Cycle Approximate Functional Units in High-Level Synthesis. ATAIT Koyu Ohata, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2022	—	`conf`	An Accuracy-Controllable Approximate Adder for FPGAs. ATAIT Masaki Sano, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Tongxin Yang, Tomoaki Ukezono, Toshinori Sato
2022	—	`conf`	An ILP-based Approach to Delivery Drone Routing under Load-dependent Flight Speed. ICEIC Mao Nishira, Satoshi Ito, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2022	—	`conf`	Container-based Throughput Balancing for Multiple Streaming Applications: A Case Study. MECO Yuho Toku, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2022	—	`conf`	Delivery Drone Routing under Load-dependent Flight Speed based on Integer Quadratic Programming. ATAIT Mao Nishira, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2022	—	`conf`	Depth Estimation from Monocular Infrared Images for Autonomous Flight of Drones. ICEIC Tomoyasu Shimada, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2022	—	`conf`	Energy Consumption Reduction through Resource Allocation Using Docker. CANDARW Eiji Sugahara, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2022	—	`conf`	Evaluation of Power Analysis Attack Resistance of Masked Adders on FPGA. ATAIT Yilin Zhao, Qidi Zhang, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2022	—	`conf`	Fusing Infrared and Visible Images for DNN-based Nighttime Human Detection. ISOCC Wanyin Shi, Hiroki Matsumiya, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2022	J	`jnl`	ILP-Based and Heuristic Scheduling Techniques for Variable-Cycle Approximate Functional Units in High-Level Synthesis. Comput. Koyu Ohata, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2022	—	`conf`	Monocular Depth Estimation with Optical Flow Attention for Autonomous Drones. ISOCC Tomoyasu Shimhada, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2022	—	`conf`	Monocular Thermal Camera Depth Estimation with Optical Flow for Autonomous Drones. ATAIT Tomoyasu Shimada, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2022	J	`jnl`	Mouldable fork-join task scheduling techniques with inter and intra-task communications. Int. J. Embed. Syst. Hiroki Nishikawa, Kana Shimada, Ittetsu Taniguchi, Hiroyuki Tomiyama
2022	J	`jnl`	Pix2Pix-Based Monocular Depth Estimation for Drones with Optical Flow on AirSim. Sensors Tomoyasu Shimada, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2022	—	`conf`	Priority-aware Static Task Mapping for Edge-Cloud Platforms. ICEIC Jo Yoshimoto, Ittetsu Taniguchi, Hiroyuki Tomiyama, Takao Onoye
2022	J	`jnl`	Shape-Dependent Velocity Based Droplet Routing on MEDA Biochips. IEEE Access Chiharu Shiro, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Shigeru Yamashita, Sudip Roy
2022	J	`jnl`	Simultaneous Scheduling and Core-Type Optimization for Moldable Fork-Join Tasks on Heterogeneous Multicores. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Hiroki Nishikawa, Kana Shimada, Ittetsu Taniguchi, Hiroyuki Tomiyama
2021	—	`conf`	A Comprehensive Analysis of Low-Impact Computations in Deep Learning Workloads. ACM Great Lakes Symposium on VLSI Hengyi Li, Zhichen Wang, Xuebin Yue, Wenwen Wang, Hiroyuki Tomiyama, Lin Meng
2021	—	`conf`	A Home Security Camera System with Container-based Resource Allocation on Raspberry Pi. ICEIC Takuya Egashira, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2021	—	`conf`	Design of a 32-bit Accuracy-Controllable Approximate Multiplier for FPGAs. ISOCC Masaki Sano, Kenta Shirane, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Tongxin Yang, Tomoaki Ukezono
2021	J	`jnl`	Energy-aware Routing of Delivery Drones under Windy Conditions. IPSJ Trans. Syst. LSI Des. Methodol. Satoshi Ito, Hiroki Nishikawa, Xiangbo Kong, Yusuke Funabashi, Atsuya Shibata, Shunsuke Negoro, Ittetsu Taniguchi, Hiroyuki Tomiyama
2021	—	`conf`	Frailty Classification Based on Artificial Intelligence. ATAIT Zelin Meng, Lin Meng, Kenshi Saho, Xiangbo Kong, Hiroyuki Tomiyama
2021	—	`conf`	High-Level Synthesis of Approximate Computing Circuits with Dual Accuracy Modes. ISOCC Kenta Shirane, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2021	—	`conf`	Impacts of HLS Optimizations on Side-Channel Leakage for AES Circuits. ISOCC Takumi Mizuno, Qidi Zhang, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2021	—	`conf`	Minimization of Routing Area in MEDA Biochips. BioCAS Chiharu Shiro, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Shigeru Yamashita
2021	—	`conf`	Pix2Pix-Based Depth Estimation from Monocular Images for Dynamic Path Planning of Multirotor on AirSim. ATAIT Tomoyasu Shimada, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2021	—	`conf`	Power Side-Channel Analysis for Different Adders on FPGA. ISOCC Yilin Zhao, Qidi Zhang, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2021	—	`conf`	Routing of Delivery Drones Considering Load and Wind Effects. ATAIT Satoshi Ito, Keishi Akaiwa, Yusuke Funabashi, Hiroki Nishikawa, Xiangbo Kong, Ittetsu Taniguchi, Hiroyuki Tomiyama
2021	—	`conf`	Scheduling with Variable-Cycle Approximate Functional Units in High-Level Synthesis. ISOCC Koyu Ohata, Kenta Shirane, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama
2020	—	`conf`	A Case Study on Rubbing Character Recognition Based on Deep Learning. ISOCC Zelin Meng, Zhiyu Zhang, Lin Meng, Hiroyuki Tomiyama
2020	J	`jnl`	A Dynamic Programming Algorithm for Energy-aware Routing of Delivery Drones. IPSJ Trans. Syst. LSI Des. Methodol. Yusuke Funabashi, Atsuya Shibata, Shunsuke Negoro, Ittetsu Taniguchi, Hiroyuki Tomiyama
2020	—	`conf`	A Quadcopters Flight Simulation Considering the Influence of Wind. ISOCC Mayu Ida, Hiroki Nishikawa, Xiangbo Kong, Ittetsu Taniguchi, Hiroyuki Tomiyama
2020	J	`jnl`	A branch-and-bound approach to scheduling of data-parallel tasks on multi-core architectures. Int. J. Embed. Syst. Yang Liu, Lin Meng, Ittetsu Taniguchi, Hiroyuki Tomiyama
2020	—	`conf`	An Evaluation of Edge Computing Platform for Reliable Automated Drones. ISOCC Jo Yoshimoto, Ittetsu Taniguchi, Hiroyuki Tomiyama, Takao Onoye
2020	C	`conf`	Frame Detection and Text Line Segmentation for Early Japanese Books Understanding. ICPRAM Bing Lyu, Hiroyuki Tomiyama, Lin Meng
2020	—	`conf`	Heuristic Algorithms for Dynamic Scheduling of Moldable Tasks. ISOCC Takuma Hikida, Hiroki Nishikawa, Hiroyuki Tomiyama
2020	—	`conf`	Scheduling of Rigid Tasks on Heterogeneous Multicores. ISOCC Takava Watanabe, Hiroki Nishikawa, Hiroyuki Tomiyama
2020	C	`conf`	Scheduling of moldable fork-join tasks with inter- and intra-task communications. SCOPES Hiroki Nishikawa, Kana Shimada, Ittetsu Taniguchi, Hiroyuki Tomiyama
2019	J	`jnl`	A Constraint Programming Approach to Scheduling of Malleable Tasks. Int. J. Netw. Comput. Hiroki Nishikawa, Kana Shimada, Ittetsu Taniguchi, Hiroyuki Tomiyama
2019	J	`jnl`	A Genetic Algorithm for Scheduling of Data-parallel Tasks on Multicore Architectures. IPSJ Trans. Syst. LSI Des. Methodol. Yang Liu, Lin Meng, Hiroyuki Tomiyama
2019	—	`conf`	A Web-Based Routing and Visualization Tool for Drone Delivery. CANDAR Workshops Takuma Hikida, Yusuke Funabashi, Hiroyuki Tomiyama
2019	J	`jnl`	An OpenCL-based Software Framework for a Heterogeneous Multicore Architecture on Zynq-7000 SoC. IPSJ Trans. Syst. LSI Des. Methodol. Takafumi Miyazaki, Shunsuke Takai, Ittetsu Taniguchi, Hiroyuki Tomiyama
2019	J	`jnl`	Communication-Aware Scheduling of Data-Parallel Tasks on Multicore Architectures. IPSJ Trans. Syst. LSI Des. Methodol. Kana Shimada, Ittetsu Taniguchi, Hiroyuki Tomiyama
2019	J	`jnl`	Design and Evaluation of Asymmetric and Symmetric 32-core Architectures on FPGA. IPSJ Trans. Syst. LSI Des. Methodol. Seiya Shirakuni, Ittetsu Taniguchi, Hiroyuki Tomiyama
2019	J	`jnl`	Energy-aware scheduling of malleable fork-join tasks under a deadline constraint on heterogeneous multicores. SIGBED Rev. Hiroki Nishikawa, Kana Shimada, Ittetsu Taniguchi, Hiroyuki Tomiyama
2019	—	`conf`	Function-Level Module Sharing in High-Level Synthesis. ISOCC Ryohei Nozaki, Hiroki Nishikawa, Ittetsu Taniguchi, Hiroyuki Tomiyama
2019	J	`jnl`	ILP-based scheduling for malleable fork-join tasks. SIGBED Rev. Kana Shimada, Ittetsu Taniguchi, Hiroyuki Tomiyama
2019	—	`conf`	Lucas-Kanade Optical Flow Based Camera Motion Estimation Approach. ISOCC Zelin Meng, Xiangbo Kong, Lin Meng, Hiroyuki Tomiyama
2019	—	`conf`	Maximum Error-Aware Design of Approximate Array Multipliers. ISOCC Kenta Shirane, Takahiro Yamamoto, Ittetsu Taniguchi, Yuko Hara-Azumi, Shigeru Yamashita, Hiroyuki Tomiyama
2019	J	`jnl`	QoE-Constrained Concurrent Request Optimization Through Collaboration of Edge Servers. IEEE Internet Things J. Yaqiang Zhang, Lin Meng, Xiao Xue, Zhangbing Zhou, Hiroyuki Tomiyama
2019	J	`jnl`	Robust Self-Adaptation Fall-Detection System Based on Camera Height. Sensors Xiangbo Kong, Lehan Chen, Zhichen Wang, Yuxi Chen, Lin Meng, Hiroyuki Tomiyama
2019	—	`conf`	Scheduling of Malleable Tasks with DMA-based Communication. ISOCC Kana Shimada, Takuma Hikida, Hiroki Nishikawa, Ittetsu Taniguchi, Hiroyuki Tomiyama
2019	J	`jnl`	Three-States-Transition Method for Fall Detection Algorithm Using Depth Image. J. Robotics Mechatronics Xiangbo Kong, Zelin Meng, Lin Meng, Hiroyuki Tomiyama
2019	A	`conf`	Work-in-Progress: Routing of Delivery Drones with Load-Dependent Flight Speed. RTSS Yusuke Funabashi, Ittetsu Taniguchi, Hiroyuki Tomiyama
2018	—	`conf`	A Case Study on Memory Architecture Exploration for Manycores on an FPGA. CANDAR Workshops Seiya Shirakuni, Ittetsu Taniguchi, Hiroyuki Tomiyama
2018	—	`conf`	A HOG-SVM Based Fall Detection IoT System for Elderly Persons Using Deep Sensor. IIKI Xiangbo Kong, Zelin Meng, Naoto Nojiri, Yuji Iwahori, Lin Meng, Hiroyuki Tomiyama
2018	Misc	`conf`	Communication-aware scheduling of data-parallel tasks: work-in-progress. CASES Kana Shimada, Ittetsu Taniguchi, Hiroyuki Tomiyama
2018	—	`conf`	Revisiting Thread Execution Methods for GPU-Oriented OpenCL Programs on Multicore Processors. CANDAR Workshops Takafumi Miyazaki, Hayato Hidari, Naohisa Hojo, Ittetsu Taniguchi, Hiroyuki Tomiyama
2018	—	`conf`	Scheduling of Malleable Fork-Join Tasks with Constraint Programming. CANDAR Hiroki Nishikawa, Kana Shimada, Ittetsu Taniguchi, Hiroyuki Tomiyama
2018	C	`conf`	Scheduling of Malleable Tasks Based on Constraint Programming. TENCON Hiroki Nishikawa, Kana Shimada, Ittetsu Taniguchi, Hiroyuki Tomiyama
2018	C	`conf`	Synthesis of Full Hardware Implementation of RTOS-Based Systems. RSP Yuuki Oosako, Nagisa Ishiura, Hiroyuki Tomiyama, Hiroyuki Kanbara
2017	J	`jnl`	A Systematic Methodology for Design and Worst-Case Error Analysis of Approximate Array Multipliers. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Takahiro Yamamoto, Ittetsu Taniguchi, Hiroyuki Tomiyama, Shigeru Yamashita, Yuko Hara-Azumi
2017	J	`jnl`	A dual-mode scheduling approach for task graphs with data parallelism. Int. J. Embed. Syst. Yang Liu, Lin Meng, Ittetsu Taniguchi, Hiroyuki Tomiyama
2017	C	`conf`	Binary synthesis implementing external interrupt handler as independent module. RSP Naoya Ito, Yuuki Oosako, Nagisa Ishiura, Hiroyuki Kanbara, Hiroyuki Tomiyama
2017	J	`jnl`	ILP-Based Scheduling for Parallelizable Tasks. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Kana Shimada, Shogo Kitano, Ittetsu Taniguchi, Hiroyuki Tomiyama
2017	—	`conf`	Power Measurement and Modeling of Quadcopters on Horizontal Flight. CANDAR Kotaro Maekawa, Shunsuke Negoro, Ittetsu Taniguchi, Hiroyuki Tomiyama
2017	J	`jnl`	Static Mapping of Parallelizable Tasks under Deadline Constraints. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Yining Xu, Ittetsu Taniguchi, Hiroyuki Tomiyama
2016	—	`conf`	A systematic methodology for design and analysis of approximate array multipliers. APCCAS Takahiro Yamamoto, Ittetsu Taniguchi, Hiroyuki Tomiyama, Shigeru Yamashita, Yuko Hara-Azumi
2016	J	`jnl`	Energy-aware task migration for multiprocessor real-time systems. Future Gener. Comput. Syst. Gang Zeng, Yutaka Matsubara, Hiroyuki Tomiyama, Hiroaki Takada
2016	J	`jnl`	Static Mapping of Multiple Parallel Applications on Non-Hierarchical Manycore Embedded Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Yining Xu, Yang Liu, Junya Kaida, Ittetsu Taniguchi, Hiroyuki Tomiyama
2015	—	`conf`	Comparison of Thread Execution Methods for GPU-oriented OpenCL Programs on Multicore Processors. EWiLi Naohisa Hojo, Ittetsu Taniguchi, Hiroyuki Tomiyama
2015	J	`jnl`	Function-level profiling for embedded software with QEMU. Int. J. Embed. Syst. Tran Van Dung, Ittetsu Taniguchi, Takuji Hieda, Hiroyuki Tomiyama
2015	J	`jnl`	Message from the Editor-in-Chief. IPSJ Trans. Syst. LSI Des. Methodol. Hiroyuki Tomiyama
2015	A	`conf`	Profiling-driven multi-cycling in FPGA high-level synthesis. DATE Stefan Hadjis, Andrew Canis, Ryoya Sobue, Yuko Hara-Azumi, Hiroyuki Tomiyama, Jason Helge Anderson
2014	—	`conf`	A dual-mode scheduling algorithm for task graphs with data parallelism. APCCAS Yang Liu, Lin Meng, Ittetsu Taniguchi, Hiroyuki Tomiyama
2014	J	`jnl`	An Integrated Framework for Energy Optimization of Embedded Real-Time Applications. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Hideki Takase, Gang Zeng, Lovic Gauthier, Hirotaka Kawashima, Noritoshi Atsumi, Tomohiro Tatematsu, Yoshitake Kobayashi, Takenori Koshiro, Tohru Ishihara, Hiroyuki Tomiyama, Hiroaki Takada
2014	C	`conf`	Cache Simulation for Instruction Set Simulator QEMU. DASC Tran Van Dung, Ittetsu Taniguchi, Hiroyuki Tomiyama
2014	Misc	`conf`	Fast Design-Space Exploration Method for SW/HW Codesign on FPGAs. FCCM Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada
2014	J	`jnl`	Fast and Accurate Architecture Exploration for High Performance and Low Energy VLIW Data-Path. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Ittetsu Taniguchi, Kohei Aoki, Hiroyuki Tomiyama, Praveen Raghavan, Francky Catthoor, Masahiro Fukui
2014	J	`jnl`	Impact of Resource Sharing and Register Retiming on Area and Performance of FPGA-based Designs. Inf. Media Technol. Yuko Hara-Azumi, Toshinobu Matsuba, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
2014	J	`jnl`	Impact of Resource Sharing and Register Retiming on Area and Performance of FPGA-based Designs. IPSJ Trans. Syst. LSI Des. Methodol. Yuko Hara-Azumi, Toshinobu Matsuba, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
2014	J	`jnl`	Message from the Editor-in-Chief. IPSJ Trans. Syst. LSI Des. Methodol. Hiroyuki Tomiyama
2014	J	`jnl`	Novel List Scheduling Strategies for Data Parallelism Task Graphs. Int. J. Netw. Comput. Yang Liu, Lin Meng, Ittetsu Taniguchi, Hiroyuki Tomiyama
2014	J	`jnl`	Static Mapping with Dynamic Switching of Multiple Data-Parallel Applications on Embedded Many-Core SoCs. IEICE Trans. Inf. Syst. Ittetsu Taniguchi, Junya Kaida, Takuji Hieda, Yuko Hara-Azumi, Hiroyuki Tomiyama
2014	—	`conf`	Task Migration for Energy Saving in Real-Time Multiprocessor Systems. HPCC/CSS/ICESS Gang Zeng, Yutaka Matsubara, Hiroyuki Tomiyama, Hiroaki Takada
2013	—	`conf`	Automated Identification of Performance Bottleneck on Embedded Systems for Design Space Exploration. IESS Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada
2013	—	`conf`	Cost-efficient scheduling in high-level synthesis for Soft-Error Vulnerability Mitigation. ISQED Yuko Hara-Azumi, Hiroyuki Tomiyama
2013	—	`conf`	Function profiling for embedded software by utilizing QEMU and analyzer tool. MWSCAS Tran Van Dung, Ittetsu Taniguchi, Takuji Hieda, Hiroyuki Tomiyama
2013	—	`conf`	List Scheduling Strategies for Task Graphs with Data Parallelism. CANDAR Yang Liu, Ittetsu Taniguchi, Hiroyuki Tomiyama, Lin Meng
2013	J	`jnl`	Message from the Editor-in-Chief. IPSJ Trans. Syst. LSI Des. Methodol. Hiroyuki Tomiyama
2013	J	`jnl`	Naxim: A Fast and Retargetable Network-on-Chip Simulator with QEMU and SystemC. Int. J. Netw. Comput. Keita Nakajima, Shuto Kurebayashi, Yusuke Fukutsuka, Takuji Hieda, Ittetsu Taniguchi, Hiroyuki Tomiyama, Hiroaki Takada
2013	J	`jnl`	Quantitative Evaluation of Resource Sharing in High-level Synthesis Using Realistic Benchmarks. Inf. Media Technol. Yuko Hara-Azumi, Toshinobu Matsuba, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
2013	J	`jnl`	Quantitative Evaluation of Resource Sharing in High-level Synthesis Using Realistic Benchmarks. IPSJ Trans. Syst. LSI Des. Methodol. Yuko Hara-Azumi, Toshinobu Matsuba, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
2013	J	`jnl`	Rainbow: An Operating System for Software-Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs. Int. J. Reconfigurable Comput. Krzysztof Jozwik, Shinya Honda, Masato Edahiro, Hiroyuki Tomiyama, Hiroaki Takada
2013	—	`conf`	SMYLE OpenCL: A programming framework for embedded many-core SoCs. ASP-DAC Hiroyuki Tomiyama, Takuji Hieda, Naoki Nishiyama, Noriko Etani, Ittetsu Taniguchi
2013	J	`jnl`	Static Mapping of Multiple Data-Parallel Applications on Embedded Many-Core SoCs. IEICE Trans. Inf. Syst. Junya Kaida, Yuko Hara-Azumi, Takuji Hieda, Ittetsu Taniguchi, Hiroyuki Tomiyama, Koji Inoue
2012	Misc	`conf`	A Fast Network-on-Chip Simulator with QEMU and SystemC. ICNC Keita Nakajima, Takuji Hieda, Ittetsu Taniguchi, Hiroyuki Tomiyama, Hiroaki Takada
2012	J	`jnl`	A Fast Performance Estimation Framework for System-Level Design Space Exploration. IPSJ Trans. Syst. LSI Des. Methodol. Seiya Shibata, Yuki Ando, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada
2012	J	`jnl`	A Novel Framework for Effective Preemptive Hardware Multitasking on FPGAs. IEICE Trans. Inf. Syst. Krzysztof Jozwik, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
2012	—	`conf`	Clock-constrained simultaneous allocation and binding for multiplexer optimization in high-level synthesis. ASP-DAC Yuko Hara, Hiroyuki Tomiyama
2012	J	`jnl`	Comparison of Preemption Schemes for Partially Reconfigurable FPGAs. IEEE Embed. Syst. Lett. Krzysztof Jozwik, Hiroyuki Tomiyama, Masato Edahiro, Shinya Honda, Hiroaki Takada
2012	—	`conf`	Energy-aware SA-based instruction scheduling for fine-grained power-gated VLIW processors. ISOCC Mitsuya Uchida, Ittetsu Taniguchi, Hiroyuki Tomiyama, Masahiro Fukui
2012	J	`jnl`	Message from the Editor-in-Chief. IPSJ Trans. Syst. LSI Des. Methodol. Hiroyuki Tomiyama
2012	—	`conf`	Selective Resource Sharing with RT-Level Retiming for Clock Enhancement in High-Level Synthesis. HPCC-ICESS Yuko Hara-Azumi, Toshinobu Matsuba, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
2012	—	`conf`	Task mapping techniques for embedded many-core SoCs. ISOCC Junya Kaida, Takuji Hieda, Ittetsu Taniguchi, Hiroyuki Tomiyama, Yuko Hara-Azumi, Koji Inoue
2011	C	`conf`	An Energy Aware Design Space Exploration for VLIW AGU Model with Fine Grained Power Gating. DSD Ittetsu Taniguchi, Mitsuya Uchida, Hiroyuki Tomiyama, Masahiro Fukui, Praveen Raghavan, Francky Catthoor
2011	A	`conf`	An integrated optimization framework for reducing the energy consumption of embedded real-time applications. ISLPED Hideki Takase, Gang Zeng, Lovic Gauthier, Hirotaka Kawashima, Noritoshi Atsumi, Tomohiro Tatematsu, Yoshitake Kobayashi, Shunitsu Kohara, Takenori Koshiro, Tohru Ishihara, Hiroyuki Tomiyama, Hiroaki Takada
2011	—	`conf`	Checkpoint Extraction Using Execution Traces for Intra-task DVFS in Embedded Systems. DELTA Tomohiro Tatematsu, Hideki Takase, Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada
2011	—	`conf`	Fast design space exploration for mixed hardware-software embedded systems. ISOCC Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada
2011	—	`conf`	Hardware multitasking in dynamically partially reconfigurable FPGA-based embedded systems. ISOCC Krzysztof Jozwik, Hiroyuki Tomiyama, Masato Edahiro, Shinya Honda, Hiroaki Takada
2011	J	`jnl`	Partitioning and Allocation of Scratch-Pad Memory for Energy Minimization of Priority-Based Preemptive Multi-Task Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Hideki Takase, Hiroyuki Tomiyama, Hiroaki Takada
2011	—	`conf`	Rainbow: An OS Extension for Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs. ReConFig Krzysztof Jozwik, Hiroyuki Tomiyama, Masato Edahiro, Shinya Honda, Hiroaki Takada
2010	B	`conf`	A Novel Mechanism for Effective Hardware Task Preemption in Dynamically Reconfigurable Systems. FPL Krzysztof Jozwik, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
2010	—	`conf`	Aggressive Register Unsharing Based on SSA Transformation for Clock Enhancement in High-Level Synthesis. DELTA Toshinobu Matsuba, Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
2010	J	`jnl`	Automatic Communication Synthesis with Hardware Sharing for Multi-Processor SoC Design. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada
2010	C	`conf`	Automatic communication synthesis with hardware sharing for design space exploration. ISCAS Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada
2010	J	`jnl`	Efficient Design Space Exploration at System Level with Automatic Profiler Instrumentation. Inf. Media Technol. Seiya Shibata, Yuki Ando, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada
2010	J	`jnl`	Efficient Design Space Exploration at System Level with Automatic Profiler Instrumentation. IPSJ Trans. Syst. LSI Des. Methodol. Seiya Shibata, Yuki Ando, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada
2010	Misc	`conf`	Minimizing inter-task interferences in scratch-pad memory usage for reducing the energy consumption of multi-task systems. CASES Lovic Gauthier, Tohru Ishihara, Hideki Takase, Hiroyuki Tomiyama, Hiroaki Takada
2010	A	`conf`	Partitioning and allocation of scratch-pad memory for priority-based preemptive multi-task systems. DATE Hideki Takase, Hiroyuki Tomiyama, Hiroaki Takada
2010	J	`jnl`	Partitioning of Behavioral Descriptions with Exploiting Function-Level Parallelism. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
2010	J	`jnl`	Static Task Scheduling Algorithms Based on Greedy Heuristics for Battery-Powered DVS Systems. IEICE Trans. Inf. Syst. Tetsuo Yokoyama, Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada
2009	J	`jnl`	A Generalized Framework for Energy Savings in Hard Real-Time Embedded Systems. Inf. Media Technol. Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada
2009	J	`jnl`	A Generalized Framework for Energy Savings in Hard Real-Time Embedded Systems. IPSJ Trans. Syst. LSI Des. Methodol. Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada
2009	—	`conf`	Analyzing and optimizing energy efficiency of algorithms on DVS systems a first step towards algorithmic energy minimization. ASP-DAC Tetsuo Yokoyama, Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada
2009	J	`jnl`	Effective Scheduling Algorithms for I/O Blocking with a Multi-Frame Task Model. IEICE Trans. Inf. Syst. Shan Ding, Hiroyuki Tomiyama, Hiroaki Takada
2009	—	`conf`	Heuristics for Static Voltage Scheduling Algorithms on Battery-Powered DVS Systems. ICESS Tetsuo Yokoyama, Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada
2009	J	`jnl`	Partitioning and Allocation of Scratch-Pad Memory in Priority-Based Multi-Task Systems. Inf. Media Technol. Hideki Takase, Hiroyuki Tomiyama, Hiroaki Takada
2009	J	`jnl`	Partitioning and Allocation of Scratch-Pad Memory in Priority-Based Multi-Task Systems. IPSJ Trans. Syst. LSI Des. Methodol. Hideki Takase, Hiroyuki Tomiyama, Hiroaki Takada
2009	B	`conf`	Practical Energy-Aware Scheduling for Real-Time Multiprocessor Systems. RTCSA Gang Zeng, Tetsuo Yokoyama, Hiroyuki Tomiyama, Hiroaki Takada
2009	J	`jnl`	Proposal and Quantitative Analysis of the CHStone Benchmark Program Suite for Practical C-based High-level Synthesis. Inf. Media Technol. Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
2009	J	`jnl`	Proposal and Quantitative Analysis of the CHStone Benchmark Program Suite for Practical C-based High-level Synthesis. J. Inf. Process. Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
2008	—	`conf`	A Generalized Framework for System-Wide Energy Savings in Hard Real-Time Embedded Systems. EUC (1) Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada, Tohru Ishihara
2008	J	`jnl`	An Effective GA-Based Scheduling Algorithm for FlexRay Systems. IEICE Trans. Inf. Syst. Shan Ding, Hiroyuki Tomiyama, Hiroaki Takada
2008	C	`conf`	CHStone: A benchmark program suite for practical C-based high-level synthesis. ISCAS Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada, Katsuya Ishii
2008	J	`jnl`	Dynamic Power Management for Embedded System Idle State in the Presence of Periodic Interrupt Services. Inf. Media Technol. Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada
2008	J	`jnl`	Dynamic Power Management for Embedded System Idle State in the Presence of Periodic Interrupt Services. IPSJ Trans. Syst. LSI Des. Methodol. Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada
2008	J	`jnl`	Embedded System Covalidation with RTOS Model and FPGA. Inf. Media Technol. Seiya Shibata, Shinya Honda, Yuko Hara, Hiroyuki Tomiyama, Hiroaki Takada
2008	J	`jnl`	Embedded System Covalidation with RTOS Model and FPGA. IPSJ Trans. Syst. LSI Des. Methodol. Seiya Shibata, Shinya Honda, Yuko Hara, Hiroyuki Tomiyama, Hiroaki Takada
2008	—	`conf`	Energy Efficiency of Scratch-Pad Memory at 65 nm and Below: An Empirical Study. ICESS Hideki Takase, Hiroyuki Tomiyama, Gang Zeng, Hiroaki Takada
2008	J	`jnl`	Energy efficiency of scratch-pad memory in deep submicron domains: an empirical study. IEICE Electron. Express Hideki Takase, Hiroyuki Tomiyama, Gang Zeng, Hiroaki Takada
2008	J	`jnl`	High-Level Synthesis of Software Function Calls. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Masanari Nishimura, Nagisa Ishiura, Yoshiyuki Ishimori, Hiroyuki Kanbara, Hiroyuki Tomiyama
2008	—	`conf`	Improved Policies for Drowsy Caches in Embedded Processors. DELTA Junpei Zushi, Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada, Koji Inoue
2007	—	`conf`	A Hardware/Software Cosimulator with RTOS Supports for Multiprocessor Embedded Systems. ICESS Takashi Furukawa, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada
2007	C	`conf`	A Software Framework for Energy and Performance Tradeoff in Fixed-Priority Hard Real-Time Embedded Systems. EUC Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada
2007	—	`conf`	Behavioral Synthesis of Double-Precision Floating-Point Adders with Function-Level Transformations: A Case Study. ICESS Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada, Katsuya Ishii
2007	—	`conf`	Complexity-constrainted partitioning of sequential programs for efficient behavioral synthesis. ACM Great Lakes Symposium on VLSI Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada, Katsuya Ishii
2007	J	`jnl`	Function Call Optimization for Efficient Behavioral Synthesis. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
2007	J	`jnl`	Function-Level Partitioning of Sequential Programs for Efficient Behavioral Synthesis. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada, Katsuya Ishii
2007	—	`conf`	Power Optimization for Embedded System Idle Time in the Presence of Periodic Interrupt Services. IESS Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada
2007	J	`jnl`	Practice and analysis of an extension course for training trainers of embedded software. SIGBED Rev. Masaki Yamamoto, Shinya Honda, Hiroaki Takada, Kiyoshi Agusa, Hiroyuki Tomiyama, Kenji Mase, Nobuo Kawaguchi, Nobuyuki Kaneko
2007	—	`conf`	RTOS and Codesign Toolkit for Multiprocessor Systems-on-Chip. ASP-DAC Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada
2007	B	`conf`	Scheduling Algorithms for I/O Blockings with a Multi-frame Task Model. RTCSA Shan Ding, Hiroyuki Tomiyama, Hiroaki Takada
2006	C	`conf`	Function Call Optimization in Behavioral Synthesis. DSD Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
2005	Misc	`conf`	A GA-based scheduling method for FlexRay systems. EMSOFT Shan Ding, Naohiko Murakami, Hiroyuki Tomiyama, Hiroaki Takada
2005	B	`conf`	An Efficient Search Algorithm of Worst-Case Cache Flush Timings. RTCSA Hiroshi Miyamoto, Shinichi Iiyama, Hiroyuki Tomiyama, Hiroaki Takada, Hiroshi Nakashima
2005	J	`jnl`	An RTOS-Based Design and Validation Methodology for Embedded Systems. IEICE Trans. Inf. Syst. Hiroyuki Tomiyama, Shin-ichiro Chikada, Shinya Honda, Hiroaki Takada
2005	—	`conf`	Cosimulation of ITRON-based embedded software with SystemC. HLDVT Shin-ichiro Chikada, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada
2005	J	`jnl`	NEXCESS: Nagoya university extension courses for embedded software specialists. SIGBED Rev. Masaki Yamamoto, Hiroyuki Tomiyama, Hiroaki Takada, Kiyoshi Agusa, Kenji Mase, Nobuo Kawaguchi, Shinya Honda, Nobuyuki Kaneko
2004	J	`jnl`	ILP-Based Program Path Analysis for Bounding Worst-Case Inter-Task Cache Conflicts. IEICE Trans. Inf. Syst. Hiroyuki Tomiyama, Nikil D. Dutt
2004	Misc	`conf`	RTOS-centric hardware/software cosimulator for embedded system design. CODES+ISSS Shinya Honda, Takayuki Wakabayashi, Hiroyuki Tomiyama, Hiroaki Takada
2003	—	`conf`	Data Organization Exploration for Low-Energy Address Buses. ESTIMedia Hiroyuki Tomiyama, Hiroaki Takada, Nikil D. Dutt
2003	J	`jnl`	Towards Automatic Validation of Dynamic Behavior in Pipelined Processor Specifications. Des. Autom. Embed. Syst. Prabhat Mishra, Nikil D. Dutt, Hiroyuki Tomiyama
2002	—	`conf`	Automatic Modeling and Validation of Pipeline Specifications Driven by an Architecture Description Language. ASP-DAC/VLSI Design Prabhat Mishra, Hiroyuki Tomiyama, Ashok Halambi, Peter Grun, Nikil D. Dutt, Alexandru Nicolau
2002	A	`conf`	Automatic Verification of In-Order Execution In Microprocessors with Fragmented Pipelines and Multicycle Functional Units. DATE Prabhat Mishra, Nikil D. Dutt, Alexandru Nicolau, Hiroyuki Tomiyama
2002	—	`conf`	Data Memory Design Considering Effective Bitwidth for Low-Energy Embedded Systems. ISSS Hiroto Yasuura, Hiroyuki Tomiyama, Takanori Okuma, Yun Cao
2001	—	`conf`	New directions in compiler technology for embedded systems (embedded tutorial). ASP-DAC Nikil D. Dutt, Alexandru Nicolau, Hiroyuki Tomiyama, Ashok Halambi
2001	Misc	`conf`	Satisfying Timing Constraints of Preemptive Real-Time Tasks through Task Layout Technique. VLSI Design Anupam Datta, Sidharth Choudhury, Anupam Basu, Hiroyuki Tomiyama, Nikil D. Dutt
2000	—	`conf`	Program path analysis to bound cache-related preemption delay in preemptive real-time systems. CODES Hiroyuki Tomiyama, Nikil D. Dutt
2000	—	`conf`	Verification of in-order execution in pipelined processors. HLDVT Hiroyuki Tomiyama, Taisei Yoshino, Nikil D. Dutt
1998	J	`jnl`	Embedded System Design Using Soft-Core Processor and Valen-C. J. Inf. Sci. Eng. Hiroto Yasuura, Hiroyuki Tomiyama, Akihiko Inoue, Eko Fajar
1998	—	`conf`	Instruction Encoding Techniques for Area Minimization of Instruction ROM. ISSS Takanori Okuma, Hiroyuki Tomiyama, Akihiko Inoue, Eko Fajar, Hiroto Yasuura
1998	A	`conf`	Instruction Scheduling for Power Reduction in Processor-Based System Design. DATE Hiroyuki Tomiyama, Tohru Ishihara, Akihiko Inoue, Hiroto Yasuura
1998	—	`conf`	Module Selection Using Manufacturing Information. ASP-DAC Hiroyuki Tomiyama, Hiroto Yasuura
1998	—	`conf`	Statistical Performance-Driven Module Binding in High-Level Synthesis. ISSS Hiroyuki Tomiyama, Akihiko Inoue, Hiroto Yasuura
1997	J	`jnl`	Code placement techniques for cache miss rate reduction. ACM Trans. Design Autom. Electr. Syst. Hiroyuki Tomiyama, Hiroto Yasuura
1997	A*	`conf`	Memory-CPU Size Optimization for Embedded System Designs. DAC Barry Shackleford, Mitsuhiro Yasuda, Etsuko Okushi, Hisao Koizumi, Hiroyuki Tomiyama, Hiroto Yasuura
1996	—	`conf`	Optimal Code Placement of Embedded Software for Instruction Caches. ED&TC Hiroyuki Tomiyama, Hiroto Yasuura
1996	—	`conf`	Size-Constrained Code Placement for Cache Miss Rate Reduction. ISSS Hiroyuki Tomiyama, Hiroto Yasuura