Hiroshi Tanimoto

39 papers C 2Journal 21Unranked 16

Year	Rank	Type	Title / Venue / Authors
2023	—	`conf`	Back to the Analog Neural Network and Linear Circuit Theory. ASICON Haruo Kobayashi, Manato Hirai, Kakeru Otomo, Shogo Katayama, Xueyan Bai, Masashi Chiba, Zifei Xu, Dan Yao, Lengkhang Nengvang, Minh Tri Tran, Kanji Yoshihiro, Anna Kuwana, Takato Ooide, Hiroshi Tanimoto, Yuji Gendai, Jianglin Wei
2022	C	`conf`	The Airborne and Satellite Investigation of Asian Air Quality (Asia-Aq): An Opportunity for International Collaboration. IGARSS James H. Crawford, Katherine R. Travis, Laura M. Judd, Barry L. Lefer, Jack E. Dibb, Jhoon Kim, Rokjin Park, Gangwoong Lee, Limseok Chang, James Bernard B. Simpas, Maria Obiminda L. Cambaliza, Ronald C. Macatangay, Vanisa Surapipith, Narisara Thongboonchoo, Nguyen Thi Kim Oanh, To Thi Hien, Bich Thuy Ly, Abdus Salam, Sachin D. Ghude, Mohd Talib Latif, Liya E. Yu, Hiroshi Tanimoto, Yugo Kanaya
2020	—	`conf`	Nonlinearity Analysis of Resistive Ladder-Based Current-Steering Digital-to-Analog Converter. ISOCC Manato Hirai, Hiroshi Tanimoto, Yuji Gendai, Shuhei Yamamoto, Anna Kuwana, Haruo Kobayashi
2019	—	`conf`	Systematic Construction of Resistor Ladder Network for N-ary DACs. ASICON Manato Hirai, Shuhei Yamamoto, Hirotaka Arai, Anna Kuwana, Hiroshi Tanimoto, Yuji Gendai, Haruo Kobayashi
2017	—	`conf`	A simple current reference with low sensitivity to supply voltage and temperature. MIXDES Tatsuya Abe, Hiroshi Tanimoto, Shingo Yoshizawa
2017	—	`conf`	Comparator design for linearized statistical flash A-to-D converter. MIXDES Toshiki Sugimoto, Hiroshi Tanimoto, Shingo Yoshizawa
2017	J	`jnl`	Data Selective Rake Reception for Underwater Acoustic Communication in Strong Multipath Interference. J. Electr. Comput. Eng. Shingo Yoshizawa, Hiroshi Tanimoto, Takashi Saito
2016	J	`jnl`	Power Reduction of Variable Wordlength OFDM Receiver in Time-Varying Fading Channels by Monitoring Subcarrier SNRs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Shingo Yoshizawa, Daichi Sasaki, Hiroshi Tanimoto
2016	—	`conf`	SC-FDE vs OFDM: Performance comparison in shallow-sea underwater acoustic communication. ISPACS Shingo Yoshizawa, Hiroshi Tanimoto, Takashi Saito
2015	—	`conf`	A low power OFDM receiver monitoring subcarrier SNRs in time-varying fading channels. ISCIT Shingo Yoshizawa, Hiroshi Tanimoto
2015	—	`conf`	A stochastic flash A-to-D converter with dynamic element matching technique. ISCIT Toshiki Sugimoto, Hiroshi Tanimoto, Shingo Yoshizawa
2015	—	`conf`	Experimental evaluation of data selective rake reception for underwater acoustic communication. ISPACS Shun Akada, Shingo Yoshizawa, Hiroshi Tanimoto, Takashi Saito
2015	—	`conf`	FPGA implementation of stochastic flash A-to-D converter and its evaluation. ISCIT Hisato Takehata, Toshiki Sugimoto, Hiroshi Tanimoto, Shingo Yoshizawa
2015	—	`conf`	Performance evaluation of antenna diversity with iterative decoding in OFDM-IDMA systems. DSP Akane Tajima, Shingo Yoshizawa, Hiroshi Tanimoto
2015	J	`jnl`	VLSI Implementation of an Interference Canceller Using Dual-Frame Processing for OFDM-IDMA Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Shingo Yoshizawa, Mai Nozaki, Hiroshi Tanimoto
2014	—	`conf`	Evaluation of diversity combining methods for underwater acoustic OFDM communication. ISPACS Ryuta Ishimoto, Shingo Yoshizawa, Hiroshi Tanimoto, Takashi Saito
2014	—	`conf`	VLSI design of an interference canceller for QPSK OFDM-IDMA systems. APCCAS Mai Nozaki, Shingo Yoshizawa, Hiroshi Tanimoto
2013	J	`jnl`	Exact Design of RC Polyphase Filters and Related Issues. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Hiroshi Tanimoto
2011	—	`conf`	Cascade synthesis of RC polyphase one-ports. ECCTD Tetsuo Nishi, Hiroshi Tanimoto, Shin'ichi Oishi
2011	J	`jnl`	Harmonic Signal Rejection Schemes of Polyphase Downconverters. IEEE Trans. Circuits Syst. I Regul. Pap. Takafumi Yamaji, Hiroshi Tanimoto, Junya Matsuno, Tetsuro Itakura
2009	C	`conf`	Design and Implementation of 0.8-V Active RC Polyphase Filter using 0.18-µm CMOS Inverters with Resistive Level Shifter. ISCAS Kazuki Yazawa, Hiroshi Tanimoto
2009	J	`jnl`	Design of 1 V Operating Fully Differential OTA Using NMOS Inverters in 0.18 µm CMOS Technology. IEICE Trans. Electron. Atsushi Tanaka, Hiroshi Tanimoto
2008	J	`jnl`	A Very Wideband Active RC Polyphase Filter with Minimum Element Value Spread Using Fully Balanced OTA Based on CMOS Inverters. IEICE Trans. Electron. Keishi Komoriyama, Makoto Yashiki, Eiichi Yoshida, Hiroshi Tanimoto
2007	J	`jnl`	Transfer Function Preserving Transformations on Equal-Ripple RC Polyphase Filters for Reducing Design Efforts. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Hiroaki Tanabe, Hiroshi Tanimoto
2006	J	`jnl`	Design Considerations for RC Polyphase Filters with Simultaneously Equal Ripple Both in Stopband and Passband. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Hiroaki Tanabe, Hiroshi Tanimoto
2005	J	`jnl`	Nonlinear Analysis of Bipolar Harmonic Mixer for Direct Conversion Receivers. IEICE Trans. Electron. Hiroshi Tanimoto, Ryuta Ito, Takafumi Yamaji
2000	J	`jnl`	A low-power low-noise accurate linear-in-dB variable-gain amplifier with 500-MHz bandwidth. IEEE J. Solid State Circuits Shoji Otaka, Gaku Takemura, Hiroshi Tanimoto
1999	—	`conf`	A 2 V CICC Tetsuro Itakura, Takashi Ueno, Hiroshi Tanimoto, Tadashi Arai
1999	J	`jnl`	A 2.7-V, 200-kHz, 49-dBm, stopband-IIP3, low-noise, fully balanced gm-C filter IC. IEEE J. Solid State Circuits Tetsuro Itakura, Takashi Ueno, Hiroshi Tanimoto, Akira Yasuda, Ryuichi Fujimoto, Tadashi Arai, Hideyuki Kokatsu
1998	J	`jnl`	A third-order ΔΣ modulator using second-order noise-shaping dynamic element matching. IEEE J. Solid State Circuits Akira Yasuda, Hiroshi Tanimoto, Tetsuya Iida
1998	J	`jnl`	An I/Q active balanced harmonic mixer with IM2 cancelers and a 45° phase shifter. IEEE J. Solid State Circuits Takafumi Yamaji, Hiroshi Tanimoto, Hideyuki Kokatsu
1997	J	`jnl`	A 1.9-GHz Si-bipolar variable attenuator for PHS transmitter. IEEE J. Solid State Circuits Shoji Otaka, Hiroshi Tanimoto, Shuji Watanabe, Tadahiko Maeda
1997	—	`conf`	A time-domain method for numerical noise analysis of oscillators. ASP-DAC Makiko Okumura, Hiroshi Tanimoto
1996	J	`jnl`	A low local input 1.9 GHz Si-bipolar quadrature modulator with no adjustment. IEEE J. Solid State Circuits Shoji Otaka, Takafumi Yamaji, Ryuichi Fujimoto, Chikau Takahashi, Hiroshi Tanimoto
1996	J	`jnl`	An offset-free LPF for π/4-shift QPSK signal generator. IEEE J. Solid State Circuits Hiroshi Tanimoto, Tetsuro Itakura, Takashi Ueno, Akira Yasuda, Kazuhiro Oda
1993	J	`jnl`	A 2.5-V active low-pass filter using all-n-p-n Gilbert cells with a 1-V IEEE J. Solid State Circuits Mikio Koyama, Tadashi Arai, Hiroshi Tanimoto, Yoshihiro Yoshida
1992	J	`jnl`	A 1.2- mu m BiCMOS sample-and-hold circuit with a constant-impedance, slew-enhanced sampling gate. IEEE J. Solid State Circuits Myles H. Wakayama, Hiroshi Tanimoto, Takahiro Tasai, Yoshihiro Yoshida
1991	J	`jnl`	Realization of a 1-V active filter using a linearization technique employing plurality of emitter-coupled pairs. IEEE J. Solid State Circuits Hiroshi Tanimoto, Mikio Koyama, Yoshihiro Yoshida
1990	J	`jnl`	An efficient small signal frequency analysis method of nonlinear circuits with two frequency excitations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Makiko Okumura, Tsutomu Sugawara, Hiroshi Tanimoto