Hiroshi Shimada

18 papers Journal 18
YearRankTypeTitle / Venue / Authors
2025 J jnl
Operation of RSFQ Hardware Random Number Generator Comprising Two Josephson Oscillators.
IEICE Trans. Electron.
Yoshinao Mizugaki, Kenta Sato, Hiroshi Shimada
2022 J jnl
100GHz operation of a 4-bit single-flux-quantum pulse-frequency modulator designed for bipolar D/A conversion.
IEICE Electron. Express
Yoshinao Mizugaki, Naonori Sega, Hiroshi Shimada
2022 J jnl
Evaluation of a True Random Number Generator Utilizing Timing Jitters in RSFQ Logic Circuits.
IEICE Trans. Electron.
Kenta Sato, Naonori Sega, Yuta Somei, Hiroshi Shimada, Takeshi Onomi, Yoshinao Mizugaki
2020 J jnl
Dielectrophoretic Assembly of Gold Nanoparticle Arrays Evaluated in Terms of Room-Temperature Resistance.
IEICE Trans. Electron.
Yoshinao Mizugaki, Makoto Moribayashi, Tomoki Yagai, Masataka Moriya, Hiroshi Shimada, Ayumi Hirano-Iwata, Fumihiko Hirose
2020 J jnl
Rapid Single-Flux-Quantum NOR Logic Gate Realized through the Use of Toggle Storage Loop.
IEICE Trans. Electron.
Yoshinao Mizugaki, Koki Yamazaki, Hiroshi Shimada
2019 J jnl
Enhanced voltage swing of rapid-single-flux-quantum distributed output amplifier equipped with double-stack superconducting quantum interference devices.
IEICE Electron. Express
Yoshinao Mizugaki, Komei Higuchi, Hiroshi Shimada
2018 J jnl
Numerical Simulation of Single-Electron Tunneling in Random Arrays of Small Tunnel Junctions Formed by Percolation of Conductive Nanoparticles.
IEICE Trans. Electron.
Yoshinao Mizugaki, Hiroshi Shimada, Ayumi Hirano-Iwata, Fumihiko Hirose
2016 J jnl
Experimental demonstration of single-flux-quantum sequential-access mask ROM.
IEICE Electron. Express
Yoshinao Mizugaki, Kazunao Sawada, Tomoki Watanabe, Hiroshi Shimada
2016 J jnl
Improvement of Single-Electron Digital Logic Gates by Utilizing Input Discretizers.
IEICE Trans. Electron.
Tran T. T. Huong, Hiroshi Shimada, Yoshinao Mizugaki
2016 J jnl
Superconducting bipolar digital-to-analog converter equipped with dual double-flux-quantum amplifier.
IEICE Electron. Express
Yoshinao Mizugaki, Tomoki Watanabe, Hiroshi Shimada
2015 J jnl
Pulse Response of Mutually-Coupled dc-to-SFQ Converter Investigated using an On-Chip Pulse Generator.
IEICE Trans. Electron.
Tomoki Watanabe, Yoshiaki Urai, Hiroshi Shimada, Yoshinao Mizugaki
2014 J jnl
Demonstration of 6-bit, 0.20-mV
IEICE Trans. Electron.
Yoshitaka Takahashi, Hiroshi Shimada, Masaaki Maezawa, Yoshinao Mizugaki
2014 J jnl
Zero-crossing Shapiro step generated in a niobium in-line Josephson gate.
IEICE Electron. Express
Yoshinao Mizugaki, Haruna Takahashi, Hiroshi Shimada
2012 J jnl
Estimation of Nb Junction Temperature Raised Due to Thermal Heat from Bias Resistor.
IEICE Trans. Electron.
Keisuke Kuroiwa, Masaki Kadowaki, Masataka Moriya, Hiroshi Shimada, Yoshinao Mizugaki
2008 J jnl
Peer-to-peer sensor network system for a school temperature measurement system.
Artif. Life Robotics
Ayahiko Niimi, Hiroshi Shimada, Rika Goto, Masaaki Wada, Kei Ito, Osamu Konishi
2007 J jnl
Optimization of asymmetric single-electron transistor generating ac-induced dc current.
IEICE Electron. Express
Yoshinao Mizugaki, Akio Kawai, Masataka Moriya, Kouichi Usami, Tadayuki Kobayashi, Hiroshi Shimada
1992 J jnl
A 150 ns 16-Mb CMOS SRAM with interdigitated bit-line architecture.
IEEE J. Solid State Circuits
Masato Matsumiya, Shoichiro Kawashima, Makoto Sakata, Masahiko Ookura, Toru Miyabo, Tom Koga, Kazuo Itabashi, Kazuhiro Mizutani, Hiroshi Shimada, Noriyuki Suzuki
1988 J jnl
A 46-ns 1-Mbit CMOS SRAM.
IEEE J. Solid State Circuits
Hiroshi Shimada, Shoichiro Kawashima, Hideo Itoh, Noriyuki Suzuki, Takashi Yabu