Hironori Yamauchi

22 papers A 1C 1Misc 5Journal 5Unranked 10
YearRankTypeTitle / Venue / Authors
2019 — conf
Improved face image super-resolution with restricted patch-searching area.
ICCSP
Suhail Hamdan, Yohei Fukumizu, Tomonori Izumi, Hironori Yamauchi
2012 — conf
Robustly separating sound components in human body based on 2-ch ICA and EM algorithm with dirichlet distribution.
BHI
Kenji Hashiodani, S. Takada, Yohei Fukumizu, Hironori Yamauchi, Yoshimasa Kurumi, Tohru Tani
2010 — conf
Signal and noise separation in medical diagnostic system based on independent component analysis.
APCCAS
Abdullah K. Khan, Tatsuya Onoue, Kenji Hashiodani, Yohei Fukumizu, Hironori Yamauchi
2009 — conf
A Gabor Pseudo Fisherface Based Face Recognition Algorithm for LSI Implementation.
IIH-MSP
Yohei Fukumizu, Tomoaki Takano, Yasuyuki Oshima, Toshihiko Terada, Hironori Yamauchi
2008 — conf
A CDFG generating method from C program for LSI design.
APCCAS
Toshiyuki Kato, Takaaki Miyauchi, Yoshizo Osumi, Hironori Yamauchi, Hideto Nishikado, Takaaki Miyake, Shiro Kobayashi
2008 J jnl
Hybrid Architecture of Genetic Algorithm and Simulated Annealing.
Eng. Lett.
Masaya Yoshikawa, Hironori Yamauchi, Hidekazu Terai
2006 — conf
Configurable multi-processor architecture and its processor element design.
ASP-DAC
Tsutomu Nishimura, Takuji Miki, Hiroaki Sugiura, Yuki Matsumoto, Masatsugu Kobayashi, Toshiyuki Kato, Tsutomu Eda, Hironori Yamauchi
2006 C conf
Human Behavior Recognition for Daily Task Assistance using Sparse Range Data Observations.
ICARCV
Akira Utsumi, Hirotake Yamazoe, Shinji Abe, Daisuke Kanbara, Hironori Yamauchi
2005 — conf
DWT Based Robust Watermarking Embed Using CRC-32 Techniques.
WEC (5)
Sadi Vural, Hiromi Tomii, Hironori Yamauchi
2005 — conf
Traceable robust watermarking for digital cinema system.
ISSPA
Sadi Vural, Hiromi Tomii, Hironori Yamauchi
2005 — conf
Video watermarking for digital cinema contents.
EUSIPCO
Sadi Vural, Hiromi Tomii, Hironori Yamauchi
2004 — conf
VLSI processor architecture for real-time GA processing and PE-VLSI design.
ISCAS (3)
Tetsuya Imai, Masaya Yoshikawa, Hidekazu Terai, Hironori Yamauchi
2002 J jnl
Blurred Image Restoration by Using Real-Coded Genetic Algorithm.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Hideto Nishikado, Hiroyuki Murata, Motonori Yamaji, Hironori Yamauchi
2002 Misc conf
Scalable GA processor architecture and its implementation of processor-element.
ICASSP
Tetsuya Imai, Masaya Yoshikawa, Hidekazu Terai, Hironori Yamauchi
1997 J jnl
Guest Editors' Introduction.
J. VLSI Signal Process.
Keshab K. Parhi, Takao Nishitani, Hironori Yamauchi
1992 J jnl
Architecture and implementation of a highly parallel single-chip video DSP.
IEEE Trans. Circuits Syst. Video Technol.
Hironori Yamauchi, Yutaka Tashiro, Toshihiro Minami, Yutaka Suzuki
1991 J jnl
A 300-MPOS video signal processor with a parallel architecture.
IEEE J. Solid State Circuits
Toshihiro Minami, Ryota Kasai, Hironori Yamauchi, Yutaka Tashiro, Jun-ichi Takahashi, Shigeru Date
1991 Misc conf
A highly-parallel single-chip DSP architecture for video signal processing.
ICASSP
Hironori Yamauchi, Yutaka Tashiro, Toshihiro Minami, Yutaka Suzuki
1991 Misc conf
A real-time 256×256 point two-dimensional FFT single-chip processor.
ICASSP
Hiroshi Miyanaga, Hironori Yamauchi, Kazuhiro Matsuda
1991 A conf
An Organized Firmware Verification Environment for the Programmable Image DSP.
ITC
Yutaka Tashiro, Hironori Yamauchi, Toshihiro Minami, Tetsuo Tajiri, Yutaka Suzuki
1986 Misc conf
A 50ns floating-point signal processor VLSI.
ICASSP
Takao Kaneko, Hironori Yamauchi, Atsushi Iwata
1985 Misc conf
An 18-bit floating-point signal processor VLSI with an on-chip 512W dual-port RAM.
ICASSP
Hironori Yamauchi, Takao Kaneko, Tsutomu Kobayashi, Atsushi Iwata, Sadayasu Ono