Hironori Kasahara

90 papers A 2B 2C 4Misc 2Journal 27Unranked 51

Year	Rank	Type	Title / Venue / Authors
2023	—	`conf`	Automatic Deep Learning Parallelization for Vector Multicore Chips with the OSCAR Parallelizing and the TVM Open-Source Deep Learning Compiler. LCPC Fumiaki Onishi, Ryosei Otaka, Kazuki Fujita, Tomoki Suetsugu, Tohma Kawasumi, Toshiaki Kitamura, Hironori Kasahara, Keiji Kimura
2023	—	`conf`	The Invention of Electronic Digital Computing - Plenary Panel Summary. JVA John Vincent Atanasoff, Gordon Bell, Kiril L. Boyanov, Charles G. Call, Carl K. Chang, Thomas M. Conte, Vladimir Getov, John L. Gustafson, Hironori Kasahara, Dejan S. Milojicic, Michael R. Williams
2022	—	`conf`	Parallelizing Factory Automation Ladder Programs by OSCAR Automatic Parallelizing Compiler. LCPC Tohma Kawasumi, Yuta Tsumura, Hiroki Mikami, Tomoya Yoshikawa, Takero Hosomi, Shingo Oidate, Keiji Kimura, Hironori Kasahara
2021	J	`jnl`	Engineering Education in the Age of Autonomous Machines. Computer Shaoshan Liu, Jean-Luc Gaudiot, Hironori Kasahara
2021	J	`jnl`	Engineering Education in the Age of Autonomous Machines. CoRR Shaoshan Liu, Jean-Luc Gaudiot, Hironori Kasahara
2021	—	`conf`	OSCAR Parallelizing and Power Reducing Compiler and API for Heterogeneous Multicores : (Invited Paper). PEHC@SC Hironori Kasahara, Keiji Kimura, Toshiaki Kitamura, Hiroki Mikami, Kazutaka Morita, Kazuki Fujita, Kazuki Yamamoto, Tohma Kawasumi
2021	—	`conf`	Parallelizing Compiler Translation Validation Using Happens-Before and Task-Set. CANDAR (Workshops) Jixin Han, Tomofumi Yuki, Michelle Mills Strout, Dan Umeda, Hironori Kasahara, Keiji Kimura
2021	—	`conf`	Performance Evaluation of OSCAR Multi-target Automatic Parallelizing Compiler on Intel, AMD, Arm and RISC-V Multicores. LCPC Birk Martin Magnussen, Tohma Kawasumi, Hiroki Mikami, Keiji Kimura, Hironori Kasahara
2020	J	`jnl`	Compiler Software Coherent Control for Embedded High Performance Multicore. IEICE Trans. Electron. Boma A. Adhi, Tomoya Kashimata, Ken Takahashi, Keiji Kimura, Hironori Kasahara
2020	J	`jnl`	Computer Education in the Age of COVID-19. Computer Jean-Luc Gaudiot, Hironori Kasahara
2020	J	`jnl`	Local Memory Mapping of Multicore Processors on an Automatic Parallelizing Compiler. IEICE Trans. Electron. Yoshitake Oki, Yuto Abe, Kazuki Yamamoto, Kohei Yamamoto, Tomoya Shirakawa, Akimasa Yoshida, Keiji Kimura, Hironori Kasahara
2019	—	`conf`	Cascaded DMA Controller for Speedup of Indirect Memory Access in Irregular Applications. IA3@SC Tomoya Kashimata, Toshiaki Kitamura, Keiji Kimura, Hironori Kasahara
2019	J	`jnl`	Collaboration for the Future. Computer Hironori Kasahara
2019	—	`conf`	Fast and Highly Optimizing Separate Compilation for Automatic Parallelization. HPCS Tohma Kawasumi, Ryota Tamura, Yuya Asada, Jixin Han, Hiroki Mikami, Keiji Kimura, Hironori Kasahara
2019	J	`jnl`	Guest Editorial: Special Issue on Network and Parallel Computing for Emerging Architectures and Applications. Int. J. Parallel Program. Feng Zhang, Jidong Zhai, Marc Snir, Hai Jin, Hironori Kasahara, Mateo Valero
2019	—	`conf`	Performance of Static and Dynamic Task Scheduling for Real-Time Engine Control System on Embedded Multicore Processor. LCPC Yoshitake Oki, Hiroki Mikami, Hikaru Nishida, Dan Umeda, Keiji Kimura, Hironori Kasahara
2018	C	`ed.`	Network and Parallel Computing - 15th IFIP WG 10.3 International Conference, NPC 2018, Muroran, Japan, November 29 - December 1, 2018, Proceedings NPC Feng Zhang, Jidong Zhai, Marc Snir, Hai Jin, Hironori Kasahara, Mateo Valero
2018	J	`jnl`	Satisfaction and Sustainability. Computer Hironori Kasahara
2017	—	`conf`	Message from the CAP 2017 Organizing Committee. COMPSAC (1) Cristina Seceleanu, Hironori Kasahara, Tiberiu Seceleanu
2017	—	`conf`	Multicore Cache Coherence Control by a Parallelizing Compiler. COMPSAC (1) Hironori Kasahara, Keiji Kimura, Boma A. Adhi, Yuhei Hosokawa, Yohei Kishimoto, Masayoshi Mase
2017	—	`conf`	Panel discussions: "Cool chips for the next decade". COOL Chips Hideharu Amano, Tadao Nakamura, Hiroaki Kobayashi, Hironori Kasahara, Yoshiaki Hagiwara, Jeffrey L. Burns, David Brash
2017	—	`conf`	Software Cache Coherent Control by Parallelizing Compiler. LCPC Boma A. Adhi, Masayoshi Mase, Yuhei Hosokawa, Yohei Kishimoto, Taisuke Onishi, Hiroki Mikami, Keiji Kimura, Hironori Kasahara
2016	—	`conf`	Accelerating Multicore Architecture Simulation Using Application Profile. MCSoC Keiji Kimura, Gakuho Taguchi, Hironori Kasahara
2016	J	`jnl`	Android Video Processing System Combined with Automatically Parallelized and Power Optimized Code by OSCAR Compiler. J. Inf. Process. Bui Duc Binh, Tomohiro Hirano, Hiroki Mikami, Hideo Yamamoto, Keiji Kimura, Hironori Kasahara
2016	—	`conf`	Architecture Design for the Environmental Monitoring System over the Winter Season. MobiWac Koichiro Yamashita, Takahisa Suzuki, Hongchun Li, Chen Ao, Yi Xu, Jun Tian, Keiji Kimura, Hironori Kasahara
2016	—	`conf`	Automatic Local Memory Management for Multicores Having Global Address Space. LCPC Kouhei Yamamoto, Tomoya Shirakawa, Yoshitake Oki, Akimasa Yoshida, Keiji Kimura, Hironori Kasahara
2016	—	`conf`	Reducing parallelizing compilation time by removing redundant analysis. SEPS@SPLASH Jixin Han, Rina Fujino, Ryota Tamura, Mamoru Shimaoka, Hiroki Mikami, Moriyuki Takamura, Sachio Kamiya, Kazuhiko Suzuki, Takahiro Miyajima, Keiji Kimura, Hironori Kasahara
2015	—	`conf`	Annotatable systrace: an extended Linux ftrace for tracing a parallelized program. SEPS@SPLASH Daichi Fukui, Mamoru Shimaoka, Hiroki Mikami, Dominic Hillenbrand, Hideo Yamamoto, Keiji Kimura, Hironori Kasahara
2015	—	`conf`	Coarse Grain Task Parallelization of Earthquake Simulator GMS Using OSCAR Compiler on Various Cc-NUMA Servers. LCPC Mamoru Shimaoka, Yasutaka Wada, Keiji Kimura, Hironori Kasahara
2015	—	`conf`	Multigrain Parallelization for Model-Based Design Applications Using the OSCAR Compiler. LCPC Dan Umeda, Takahiro Suzuki, Hiroki Mikami, Keiji Kimura, Hironori Kasahara
2015	J	`jnl`	What Will 2022 Look Like? The IEEE CS 2022 Report. Computer Hasan Alkhatib, Paolo Faraboschi, Eitan Frachtenberg, Hironori Kasahara, Danny B. Lange, Phillip A. Laplante, Arif Merchant, Dejan S. Milojicic, Karsten Schwan
2014	—	`conf`	Evaluation of Automatic Power Reduction with OSCAR Compiler on Intel Haswell and ARM Cortex-A9 Multicores. LCPC Tomohiro Hirano, Hideo Yamamoto, Shuhei Iizuka, Kohei Muto, Takashi Goto, Tamami Wake, Hiroki Mikami, Moriyuki Takamura, Keiji Kimura, Hironori Kasahara
2014	C	`conf`	Parallelization of tree-to-TLV serialization. IPCCC Makoto Nakayama, Kenichi Yamazaki, Satoshi Tanaka, Hironori Kasahara
2013	—	`conf`	Automatic parallelization, performance predictability and power control for mobile-applications. COOL Chips Dominic Hillenbrand, Akihiro Hayashi, Hideo Yamamoto, Keiji Kimura, Hironori Kasahara
2013	—	`conf`	Dynamic Profiling and Feedback Framework for Reduce-Side Join. CSE Makoto Nakayama, Kenichi Yamazaki, Satoshi Tanaka, Hironori Kasahara
2013	—	`ed.`	Languages and Compilers for Parallel Computing, 25th International Workshop, LCPC 2012, Tokyo, Japan, September 11-13, 2012, Revised Selected Papers LCPC Hironori Kasahara, Keiji Kimura
2013	—	`conf`	OSCAR Compiler Controlled Multicore Power Reduction on Android Platform. LCPC Hideo Yamamoto, Tomohiro Hirano, Kohei Muto, Hiroki Mikami, Takashi Goto, Dominic Hillenbrand, Moriyuki Takamura, Keiji Kimura, Hironori Kasahara
2013	—	`conf`	Parallelization of automotive engine control software on embedded multi-core processor using OSCAR compiler. COOL Chips Yohei Kanehagi, Dan Umeda, Akihiro Hayashi, Keiji Kimura, Hironori Kasahara
2013	—	`conf`	Reconciling application power control and operating systems for optimal power and performance. ReCoSoC Dominic Hillenbrand, Yuuki Furuyama, Akihiro Hayashi, Hiroki Mikami, Keiji Kimura, Hironori Kasahara
2012	J	`jnl`	Enhancing the Performance of a Multiplayer Game by Using a Parallelizing Compiler. Int. J. Intell. Games Simul. Yasir I. M. Al-Dosary, Keiji Kimura, Hironori Kasahara, Seinosuke Narita
2012	—	`conf`	Enhancing the performance of a multiplayer game by using a parallelizing compiler. CGAMES Yasir I. M. Al-Dosary, Keiji Kimura, Hironori Kasahara, Seinosuke Narita
2011	J	`jnl`	A 45-nm 37.3 GOPS/W Heterogeneous Multi-Core SOC with 16/32 Bit Instruction-Set General-Purpose Core. IEICE Trans. Electron. Osamu Nishii, Yoichi Yuyama, Masayuki Ito, Yoshikazu Kiyoshige, Yusuke Nitta, Makoto Ishikawa, Tetsuya Yamada, Junichi Miyakoshi, Yasutaka Wada, Keiji Kimura, Hironori Kasahara, Hideo Maejima
2011	J	`jnl`	A Parallelizing Compiler Cooperative Heterogeneous Multicore Processor Architecture. Trans. High Perform. Embed. Archit. Compil. Yasutaka Wada, Akihiro Hayashi, Takeshi Masuura, Jun Shirako, Hirofumi Nakano, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara
2011	—	`conf`	Evaluation of Power Consumption at Execution of Multiple Automatically Parallelized and Power Controlled Media Applications on the RP2 Low-Power Multicore. LCPC Hiroki Mikami, Shumpei Kitaki, Masayoshi Mase, Akihiro Hayashi, Mamoru Shimaoka, Keiji Kimura, Masato Edahiro, Hironori Kasahara
2010	—	`conf`	A 45nm 37.3GOPS/W heterogeneous multi-core SoC. ISSCC Yoichi Yuyama, Masayuki Ito, Yoshikazu Kiyoshige, Yusuke Nitta, Shigezumi Matsui, Osamu Nishii, Atsushi Hasegawa, Makoto Ishikawa, Tetsuya Yamada, Junichi Miyakoshi, Koichi Terada, Tohru Nojiri, Masashi Satoh, Hiroyuki Mizuno, Kunio Uchiyama, Yasutaka Wada, Keiji Kimura, Hironori Kasahara, Hideo Maejima
2010	—	`conf`	Parallelizing Compiler Framework and API for Power Reduction and Software Productivity of Real-Time Heterogeneous Multicores. LCPC Akihiro Hayashi, Yasutaka Wada, Takeshi Watanabe, Takeshi Sekiguchi, Masayoshi Mase, Jun Shirako, Keiji Kimura, Hironori Kasahara
2009	B	`conf`	Green Multicore-SoC Software-Execution Framework with Timely-Power-Gating Scheme. ICPP Masafumi Onouchi, Keisuke Toyama, Tohru Nojiri, Makoto Sato, Masayoshi Mase, Jun Shirako, Mikiko Sato, Masashi Takada, Masayuki Ito, Hiroyuki Mizuno, Mitaro Namiki, Keiji Kimura, Hironori Kasahara
2009	Misc	`conf`	Multiple-Paths Search with Concurrent Thread Scheduling for Fast AND/OR Tree Search. CISIS Fumiyo Takano, Yoshitaka Maekawa, Hironori Kasahara
2009	—	`conf`	OSCAR API for Real-Time Low-Power Multicores and Its Performance on Multicores and SMP Servers. LCPC Keiji Kimura, Masayoshi Mase, Hiroki Mikami, Takamichi Miyamoto, Jun Shirako, Hironori Kasahara
2008	—	`conf`	An 8640 MIPS SoC with Independent Power-Off Control of 8 CPUs and 8 RAMs by An Automatic Parallelizing Compiler. ISSCC Masayuki Ito, Toshihiro Hattori, Yutaka Yoshida, Kiyoshi Hayase, Tomoichi Hayashi, Osamu Nishii, Yoshihiko Yasu, Atsushi Hasegawa, Masashi Takada, Hiroyuki Mizuno, Kunio Uchiyama, Toshihiko Odaka, Jun Shirako, Masayoshi Mase, Keiji Kimura, Hironori Kasahara
2008	J	`jnl`	Heterogeneous Multi-Core Architecture That Enables 54x AAC-LC Stereo Encoding. IEEE J. Solid State Circuits Hiroaki Shikano, Masaki Ito, Masafumi Onouchi, Takashi Todaka, Takanobu Tsunoda, Tomoyuki Kodama, Kunio Uchiyama, Toshihiko Odaka, Tatsuya Kamei, Ei Nagahama, Manabu Kusaoke, Yusuke Nitta, Yasutaka Wada, Keiji Kimura, Hironori Kasahara
2008	C	`conf`	Parallelization with Automatic Parallelizing Compiler Generating Consumer Electronics Multicore API. ISPA Takamichi Miyamoto, Saori Asaka, Hiroki Mikami, Masayoshi Mase, Yasutaka Wada, Hirofumi Nakano, Keiji Kimura, Hironori Kasahara
2008	J	`jnl`	Power-Aware Compiler Controllable Chip Multiprocessor. IEICE Trans. Electron. Hiroaki Shikano, Jun Shirako, Yasutaka Wada, Keiji Kimura, Hironori Kasahara
2008	—	`conf`	Software-cooperative power-efficient heterogeneous multi-core for media processing. ASP-DAC Hiroaki Shikano, Masaki Ito, Kunio Uchiyama, Toshihiko Odaka, Akihiro Hayashi, Takeshi Masuura, Masayoshi Mase, Jun Shirako, Yasutaka Wada, Keiji Kimura, Hironori Kasahara
2007	—	`conf`	A 4320MIPS Four-Processor Core SMP/AMP with Individually Managed Clock Frequency for Low Power Consumption. ISSCC Yutaka Yoshida, Tatsuya Kamei, Kiyoshi Hayase, Shinichi Shibahara, Osamu Nishii, Toshihiro Hattori, Atsushi Hasegawa, Masashi Takada, Naohiko Irie, Kunio Uchiyama, Toshihiko Odaka, Kiwamu Takada, Keiji Kimura, Hironori Kasahara
2007	—	`conf`	Language Extensions in Support of Compiler Parallelization. LCPC Jun Shirako, Hironori Kasahara, Vivek Sarkar
2007	B	`conf`	Power-Aware Compiler Controllable Chip Multiprocessor. PACT Hiroaki Shikano, Jun Shirako, Yasutaka Wada, Keiji Kimura, Hironori Kasahara
2005	—	`conf`	Compiler Control Power Saving Scheme for Multi Core Processors. LCPC Jun Shirako, Naoto Oshiyama, Yasutaka Wada, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara
2005	—	`conf`	Multigrain parallel processing on compiler cooperative chip multiprocessor. Interaction between Compilers and Computer Architectures Keiji Kimura, Yasutaka Wada, Hirofumi Nakano, Takeshi Kodaka, Jun Shirako, Kazuhisa Ishizaka, Hironori Kasahara
2005	—	`conf`	Performance Evaluation of Compiler Controlled Power Saving Scheme. ISHPC Jun Shirako, Munehiro Yoshida, Naoto Oshiyama, Yasutaka Wada, Hirofumi Nakano, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara
2004	—	`conf`	Performance of OSCAR Multigrain Parallelizing Compiler on SMP Servers. LCPC Kazuhisa Ishizaka, Takamichi Miyamoto, Jun Shirako, Motoki Obata, Keiji Kimura, Hironori Kasahara
2004	—	`conf`	Selective inline expansion for improvement of multi grain parallelism. Parallel and Distributed Computing and Networks Jun Shirako, Kouhei Nagasawa, Kazuhisa Ishizaka, Motoki Obata, Hironori Kasahara
2003	—	`conf`	Cache Optimization for Coarse Grain Task Parallel Processing Using Inter-Array Padding. LCPC Kazuhisa Ishizaka, Motoki Obata, Hironori Kasahara
2003	J	`jnl`	Static Coarse Grain Task Scheduling with Cache Optimization Using OpenMP. Int. J. Parallel Program. Hirofumi Nakano, Kazuhisa Ishizaka, Motoki Obata, Keiji Kimura, Hironori Kasahara
2002	—	`conf`	Hierarchical Parallelism Control for Multigrain Parallel Processing. LCPC Motoki Obata, Jun Shirako, Hiroki Kaminaga, Kazuhisa Ishizaka, Hironori Kasahara
2002	J	`jnl`	Humanoid Robots in Waseda University-Hadaly-2 and WABIAN. Auton. Robots Shuji Hashimoto, Seinosuke Narita, Hironori Kasahara, Katsuhiko Shirai, Atsuo Kobayashi, Atsuo Takanishi, Shigeki Sugano, Jin'ichi Yamaguchi, Hideyuki Sawada, Hideaki Takanobu, Koji Shibuya, Toshio Morita, T. Kurata, Naoyuki Onoe, K. Ouchi, T. Noguchi, Yosihiro Niwa, Seikon Nagayama, Hirokazu Tabayashi, I. Matsui, Motoki Obata, H. Matsuzaki, A. Murasugi, Tetsunori Kobayashi, Satoshi Haruyama, Tetsuhiko Okada, Yasuaki Hidaki, Yuichi Taguchi, Keiichiro Hoashi, Emi Morikawa, Yuri Iwano, D. Araki, J. Suzuki, Masao Yokoyama, I. Dawa, Daisuke Nishino, Sadatoshi Inoue, Tomoshiro Hirano, Eiji Soga, S. Gen, T. Yanada, Keisuke Kato, S. Sakamoto, Y. Ishii, Shigeru Matsuo, Yousuke Yamamoto, Kensuke Sato, T. Hagiwara, T. Ueda, N. Honda, Kazuo Hashimoto, T. Hanamoto, S. Kayaba, Takuya Kojima, Hiroyasu Iwata, H. Kubodera, R. Matsuki, T. Nakajima, K. Nitto, D. Yamamoto, Y. Kamizaki, S. Nagaike, Y. Kunitake, Satoshi Morita
2002	—	`conf`	Multigrain Automatic Parallelization in Japanese Millennium Project IT21 Advanced Parallelizing Compiler. PARELEC Hironori Kasahara, Motoki Obata, Kazuhisa Ishizaka, Keiji Kimura, Hiroki Kaminaga, Hirofumi Nakano, Kouhei Nagasawa, Akiko Murai, Hiroki Itagaki, Jun Shirako
2002	—	`conf`	Static Coarse Grain Task Scheduling with Cache Optimization Using OpenMP. ISHPC Hirofumi Nakano, Kazuhisa Ishizaka, Motoki Obata, Keiji Kimura, Hironori Kasahara
2001	—	`conf`	Coarse Grain Task Parallel Processing with Cache Optimization on Shared Memory Multiprocessor. LCPC Kazuhisa Ishizaka, Motoki Obata, Hironori Kasahara
2000	—	`conf`	Automatic Coarse Grain Task Parallel Processing on SMP Using OpenMP. LCPC Hironori Kasahara, Motoki Obata, Kazuhisa Ishizaka
2000	—	`conf`	Coarse-Grain Task Parallel Processing Using the OpenMP Backend of the OSCAR Multigrain Parallelizing Compiler. ISHPC Kazuhisa Ishizaka, Motoki Obata, Hironori Kasahara
2000	Misc	`conf`	Performance Evaluation of Minimum Execution Time Multiprocessor Scheduling Algorithms Using Standard Task Graph Set. PDPTA Takao Tobita, Masayoshi Kouda, Hironori Kasahara
1998	J	`jnl`	A Data-Localization Compilation Scheme Using Partial-Static Task Assignment for Fortran Coarse-Grain Parallel Processing. Parallel Comput. Hironori Kasahara, Akimasa Yoshida
1998	C	`conf`	Job Scheduling Scheme for Pure Space Sharing Among Rigid Jobs. JSSPP Kento Aida, Hironori Kasahara, Seinosuke Narita
1996	—	`conf`	Data Localization Using Loop Aligned Decomposition for Macro-Dataflow Processing. LCPC Akimasa Yoshida, Hironori Kasahara
1996	A	`conf`	Data-Localization for Fortran Macro-Dataflow Computation Using Partial Static Task Assignment. International Conference on Supercomputing Akimasa Yoshida, Kenichi Koshizuka, Hironori Kasahara
1992	J	`jnl`	A parallel optimization algorithm for minimum execution-time multiprocessor scheduling problem. Syst. Comput. Jpn. Hironori Kasahara, Atsusi Itoh, Hisamitsu Tanaka, Keisuke Itoh
1992	—	`ch.`	Parallel Processing of robot control and simulation. Parallel Computation Systems for Robotics Hironori Kasahara
1991	—	`conf`	A Multi-Grain Parallelizing Compilation Scheme for OSCAR (Optimally Scheduled Advanced Multiprocessor). LCPC Hironori Kasahara, Hiroki Honda, A. Mogi, A. Ogura, K. Fujiwara, Seinosuke Narita
1991	J	`jnl`	Coarse grain parallelism detection scheme of a fortran program. Syst. Comput. Jpn. Hiroki Honda, Hironori Kasahara
1991	—	`conf`	Parallel Processing of Sparse Matrix Solution Using Fine Grain Tasks on OSCAR. ICPP (3) Hironori Kasahara, Wichian Premchaiswadi, Mikio Tamura, Yoshinori Maekawa, Seinosuke Narita
1991	J	`jnl`	Parallel processing scheme of a basic block in a fortran program on oscar. Syst. Comput. Jpn. Hiroki Honda, Satoshi Mizuno, Hironori Kasahara, Seinosuke Narita
1990	—	`conf`	A Compilation Scheme for Macro-Dataflow Computation on Hierarchical Multiprocessor Systems. ICPP (2) Hironori Kasahara, Hiroki Honda, Masahiko Iwata, M. Hirota
1990	A	`conf`	Parallel processing of near fine grain tasks using static scheduling OSCAR (optimally scheduled advanced multiprocessor). SC Hironori Kasahara, Hiroki Honda, Seinosuke Narita
1990	J	`jnl`	Parallel processing of robot arm dynamic control computation on multimicroprocessors. Microprocess. Microsystems Hironori Kasahara
1988	J	`jnl`	Application of df/ihs to minimum total weighted flow time multiprocessor scheduling problems. Syst. Comput. Jpn. Hironori Kasahara, Munenori Kai, Seinosuke Narita, Hidehiko Wada
1988	J	`jnl`	Parallel Processing of Robot Dynamics Simulation Using Optimal Multiprocessor Scheduling Algorithms. Syst. Comput. Jpn. Hironori Kasahara, Masahiko Iwata, Seinosuke Narita, Hirofumi Fujii
1985	J	`jnl`	Parallel processing of robot-arm control computation on a multimicroprocessor system. IEEE J. Robotics Autom. Hironori Kasahara, Seinosuke Narita
1985	J	`jnl`	Practical multiprocessor scheduling algorithms for efficient parallel processing. Syst. Comput. Jpn. Hironori Kasahara, Seinosuke Narita
1984	J	`jnl`	Practical Multiprocessor Scheduling Algorithms for Efficient Parallel Processing. IEEE Trans. Computers Hironori Kasahara, Seinosuke Narita