Hiromu Fujioka

15 papers A 1Journal 8Unranked 6
YearRankTypeTitle / Venue / Authors
2007 — conf
Computer-assisted lesion detection system for stomach screening using stomach shape and appearance models.
Computer-Aided Diagnosis
Yoshihiro Midoh, M. Nakamura, M. Takashima, Koji Nakamae, Hiromu Fujioka
2007 J jnl
Estimation of electron probe profile from SEM image through wavelet multiresolution analysis for inline SEM inspection.
Image Vis. Comput.
Koji Nakamae, Masaki Chikahisa, Hiromu Fujioka
2006 — conf
Image deblurring by the combined use of a super-resolution technique and inverse filtering.
Computational Imaging
Yasuyuki Yamada, Koji Nakamae, Hiromu Fujioka
2003 J jnl
A low energy FIB processing, repair, and test system.
Microelectron. Reliab.
Katsuyoshi Miura, Tomoyuki Kobatake, Koji Nakamae, Hiromu Fujioka
2003 — conf
Cost Optimum Embedded DRAM Design by Yield Analysis.
MTDT
Youhei Zenda, Koji Nakamae, Hiromu Fujioka
2002 J jnl
CAD navigation system, for backside waveform probing of CMOS devices.
Microelectron. Reliab.
Katsuyoshi Miura, Koji Nakamae, Hiromu Fujioka
2001 J jnl
Development of an EB/FIB Integrated Test System.
Microelectron. Reliab.
Katsuyoshi Miura, Koji Nakamae, Hiromu Fujioka
2000 J jnl
EB tester fault localization algorithm for combinational circuits by utilizing fault simulation and test pattern sequence for EB tester.
Syst. Comput. Jpn.
Koji Nakamae, Takashi Ishimura, Hiromu Fujioka
1999 — conf
Intelligent EB Test System for Automatic VLSI Fault Tracing.
Asian Test Symposium
Katsuyoshi Miura, Koji Nakamae, Hiromu Fujioka
1998 J jnl
Knowledge-based circuit recognition from standard-cell design CMOS VLSI optical microscope images.
Syst. Comput. Jpn.
Koji Nakamae, Shinji Yokoyama, Atsushi Onishi, Hiromu Fujioka
1997 — conf
Automatic EB Fault Tracing System by Successive Circuit Extraction from VLSI CAD Layout Data.
Asian Test Symposium
Katsuyoshi Miura, Kohei Nakata, Koji Nakamae, Hiromu Fujioka
1997 J jnl
Hierarchical VLSI Fault Tracing by Successive Circuit Extraction from CAD Layout Data in the CAD-Linked EB Test System.
J. Electron. Test.
Katsuyoshi Miura, Koji Nakamae, Hiromu Fujioka
1997 — conf
Hierarchical fault tracing for VLSI sequential circuits from CAD layout data in the CAD-linked EB test system.
ASP-DAC
Katsuyoshi Miura, Koji Nakamae, Hiromu Fujioka
1996 A conf
Effects of Multi-Product, Small-Sized Production of LSIs Packaged in Various Packages on the Final Test Process Efficiency and Cost.
ITC
Hiromu Fujioka, Koji Nakamae, Akio Higashi
1996 J jnl
How ATE Planning Affects LSI Manufacturing Cost.
IEEE Des. Test Comput.
Koji Nakamae, Homare Sakamoto, Hiromu Fujioka