Hiromitsu Awano

74 papers A* 4A 11B 1C 5Misc 2Journal 31Unranked 19

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	A 22nm Resource-Frugal Hyper-Heterogeneous Multi-Modal System-on-Chip Towards In-Orbit Computing. CICC Quan Cheng, Qiufeng Li, Weirong Dong, Mingtao Zhang, Ruilin Zhang, Mingqiang Huang, Hao Yu, Yiyu Shi, Hiromitsu Awano, Takashi Sato, Longyang Lin, Masanori Hashimoto
2025	J	`jnl`	Beamforming Feedback-Based Respiration and Heart Rate Estimation Toward Firmware-Agnostic WiFi Sensing. IEEE Access Takamochi Kanda, Sota Kondo, Hiroki Shimomura, Takashi Sato, Hiromitsu Awano, Koji Yamamoto
2025	J	`jnl`	Fast Parameter Optimization of Delayed Feedback Reservoir with Backpropagation and Gradient Descent. CoRR Sosei Ikeda, Hiromitsu Awano, Takashi Sato
2025	A	`conf`	Gaitcloud: Leveraging Spatial-Temporal Information for Lidar-Base Gait Recognition With a True-3D Gait Representation. WACV Shaoxiong Zhang, Hiromitsu Awano, Takashi Sato
2025	J	`jnl`	Hardware-Friendly Delayed-Feedback Reservoir for Multivariate Time-Series Classification. CoRR Sosei Ikeda, Hiromitsu Awano, Takashi Sato
2025	A*	`conf`	Lookup Table-based Multiplication-free All-digital DNN Accelerator Featuring Self-Synchronous Pipeline Accumulation. DAC Hiroto Tagata, Takashi Sato, Hiromitsu Awano
2025	J	`jnl`	Lookup Table-based Multiplication-free All-digital DNN Accelerator Featuring Self-Synchronous Pipeline Accumulation. CoRR Hiroto Tagata, Takashi Sato, Hiromitsu Awano
2025	J	`jnl`	Online Training and Inference System on Edge FPGA Using Delayed Feedback Reservoir. CoRR Sosei Ikeda, Hiromitsu Awano, Takashi Sato
2025	J	`jnl`	Online Training and Inference System on Edge FPGA Using Delayed Feedback Reservoir. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sosei Ikeda, Hiromitsu Awano, Takashi Sato
2025	—	`conf`	Random Telegraph Noise Observed on 65-nm Bulk pMOS Transistors at 3.8K. ASP-DAC Takuma Kawakami, Takashi Sato, Hiromitsu Awano
2025	A	`conf`	SOME: Symmetric One-Hot Matching Elector - A Lightweight Microsecond Decoder for Quantum Error Correction. ICCAD Xinyi Guo, Geguang Miao, Shinichi Nishizawa, Hiromitsu Awano, Shinji Kimura, Takashi Sato
2025	J	`jnl`	SOME: Symmetric One-Hot Matching Elector - A Lightweight Microsecond Decoder for Quantum Error Correction. CoRR Xinyi Guo, Geguang Miao, Shinichi Nishizawa, Hiromitsu Awano, Shinji Kimura, Takashi Sato
2025	A*	`conf`	Weighted Range-Constrained Ising-Model Decoder for Quantum Error Correction. DAC Xinyi Guo, Hiromitsu Awano, Takashi Sato
2025	—	`conf`	Window Function-Less DFT with Reduced Noise and Latency for Real-Time Music Analysis. EUSIPCO Cai Biesinger, Hiromitsu Awano, Masanori Hashimoto
2025	C	`conf`	Zero-Aware Regularization for Energy-Efficient Inference on Akida Neuromorphic Processor. ISCAS Takehiro Habara, Takashi Sato, Hiromitsu Awano
2024	J	`jnl`	A Robust and Energy Efficient Hyperdimensional Computing System for Voltage-scaled Circuits. ACM Trans. Embed. Comput. Syst. Dehua Liang, Hiromitsu Awano, Noriyuki Miura, Jun Shiomi
2024	A	`conf`	DNA-Based Similar Image Retrieval via Triplet Network-Driven Encoder. DATE Takefumi Koike, Hiromitsu Awano, Takashi Sato
2024	J	`jnl`	Double MAC on a Cell: A 22-nm 8T-SRAM-Based Analog In-Memory Accelerator for Binary/Ternary Neural Networks Featuring Split Wordline. IEEE Open J. Circuits Syst. Hiroto Tagata, Takashi Sato, Hiromitsu Awano
2024	Misc	`conf`	Exploring Surface Code Decoding via Cryo-CMOS for Fault-Tolerant Quantum Computers. QCE Ruotai Wang, Takashi Sato, Hiromitsu Awano
2024	A	`conf`	Fast Parameter Optimization of Delayed Feedback Reservoir with Backpropagation and Gradient Descent. DATE Sosei Ikeda, Hiromitsu Awano, Takashi Sato
2024	C	`conf`	S3M: Static Semi-Segmented Multipliers for Energy-Efficient DNN Inference Accelerators. ICCD Mingtao Zhang, Quan Cheng, Hiromitsu Awano, Longyang Lin, Masanori Hashimoto
2024	Misc	`conf`	Square-Wave Defined Pulse Generator for High Fidelity Gate Operation of Superconducting Qubits. QCE Ryosuke Matsuo, Kazuhisa Ogawa, Hidehisa Shiorni, Makoto Negoro, Ryutaro Ohira, Takefumi Miyoshi, Michihiro Shintani, Hiromitsu Awano, Takashi Sato, Jun Shiomi
2024	J	`jnl`	StrideHD: A Binary Hyperdimensional Computing System Utilizing Window Striding for Image Classification. IEEE Open J. Circuits Syst. Dehua Liang, Jun Shiomi, Noriyuki Miura, Hiromitsu Awano
2024	A*	`conf`	Triplet Network-Based DNA Encoding for Enhanced Similarity Image Retrieval. DAC Takefumi Koike, Hiromitsu Awano, Takashi Sato
2023	J	`jnl`	B2N2: Resource efficient Bayesian neural network accelerator using Bernoulli sampler on FPGA. Integr. Hiromitsu Awano, Masanori Hashimoto
2023	J	`jnl`	BayesianPUFNet: Training Sample Efficient Modeling Attack for Physically Unclonable Functions. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Hiromitsu Awano, Makoto Ikeda
2023	—	`conf`	DependableHD: A Hyperdimensional Learning Framework for Edge-Oriented Voltage-Scaled Circuits. ASP-DAC Dehua Liang, Hiromitsu Awano, Noriyuki Miura, Jun Shiomi
2023	J	`jnl`	Modular DFR: Digital Delayed Feedback Reservoir Model for Enhancing Design Flexibility. CoRR Sosei Ikeda, Hiromitsu Awano, Takashi Sato
2023	J	`jnl`	Modular DFR: Digital Delayed Feedback Reservoir Model for Enhancing Design Flexibility. ACM Trans. Embed. Comput. Syst. Sosei Ikeda, Hiromitsu Awano, Takashi Sato
2023	J	`jnl`	Pay Attention via Quantization: Enhancing Explainability of Neural Networks via Quantized Activation. IEEE Access Yuma Tashiro, Hiromitsu Awano
2023	J	`jnl`	Uncertainty-Aware Haptic Shared Control With Humanoid Robots for Flexible Object Manipulation. IEEE Robotics Autom. Lett. Takumi Hara, Takashi Sato, Tetsuya Ogata, Hiromitsu Awano
2022	J	`jnl`	A Hardware Efficient Reservoir Computing System Using Cellular Automata and Ensemble Bloom Filter. IEICE Trans. Inf. Syst. Dehua Liang, Jun Shiomi, Noriyuki Miura, Masanori Hashimoto, Hiromitsu Awano
2022	—	`conf`	DistriHD: A Memory Efficient Distributed Binary Hyperdimensional Computing Architecture for Image Classification. ASP-DAC Dehua Liang, Jun Shiomi, Noriyuki Miura, Hiromitsu Awano
2022	J	`jnl`	Hardware-Friendly Delayed-Feedback Reservoir for Multivariate Time-Series Classification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sosei Ikeda, Hiromitsu Awano, Takashi Sato
2022	C	`conf`	Pay Attention via Binarization: Enhancing Explainability of Neural Networks via Binarization of Activation. ISCAS Yuma Tashiro, Hiromitsu Awano
2022	—	`conf`	Respiratory Rate Estimation Based on WiFi Frame Capture. CCNC Takamochi Kanda, Takashi Sato, Hiromitsu Awano, Sota Kondo, Koji Yamamoto
2022	J	`jnl`	Temporal Ensemble SSDLite: Exploiting Temporal Correlation in Video for Accurate Object Detection. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Lukas Nakamura, Hiromitsu Awano
2021	A	`conf`	Binary Neural Network in Robotic Manipulation: Flexible Object Manipulation for Humanoid Robot Using Partially Binarized Auto-Encoder on FPGA. IROS Satoshi Ohara, Tetsuya Ogata, Hiromitsu Awano
2021	J	`jnl`	Binary Neural Network in Robotic Manipulation: Flexible Object Manipulation for Humanoid Robot Using Partially Binarized Auto-Encoder on FPGA. CoRR Satoshi Ohara, Tetsuya Ogata, Hiromitsu Awano
2021	A	`conf`	BloomCA: A Memory Efficient Reservoir Computing Hardware Implementation Using Cellular Automata and Ensemble Bloom Filter. DATE Dehua Liang, Masanori Hashimoto, Hiromitsu Awano
2020	A	`conf`	BYNQNet: Bayesian Neural Network with Quadratic Activations for Sampling-Free Uncertainty Estimation on FPGA. DATE Hiromitsu Awano, Masanori Hashimoto
2020	J	`jnl`	Implementation of pseudo-linear feedback shift register-based physical unclonable functions on silicon and sufficient Challenge-Response pair acquisition using Built-In Self-Test before shipping. Integr. Yasuhiro Ogasahara, Yohei Hori, Toshihiro Katashita, Tomoki Iizuka, Hiromitsu Awano, Makoto Ikeda, Hanpei Koike
2019	—	`conf`	33us, 94uJ Optimal Ate Pairing Engine on BN Curve over 254b Prime Field in 65nm CMOS FDSOI. A-SSCC Makoto Ikeda, Tadayuki Ichihashi, Hiromitsu Awano
2019	J	`jnl`	An ASIC Crypto Processor for 254-Bit Prime-Field Pairing Featuring Programmable Arithmetic Core Optimized for Quadratic Extension Field. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Hiromitsu Awano, Tadayuki Ichihashi, Makoto Ikeda
2019	A	`conf`	Fourℚ on ASIC: Breaking Speed Records for Elliptic Curve Scalar Multiplication. DATE Hiromitsu Awano, Makoto Ikeda
2019	—	`conf`	High-Speed ASIC Implementation of Paillier Cryptosystem with Homomorphism. ASICON Chun Cai, Hiromitsu Awano, Makoto Ikeda
2019	C	`conf`	PUFNet: A Deep Neural Network Based Modeling Attack for Physically Unclonable Function. ISCAS Hiromitsu Awano, Tomoki Iizuka, Makoto Ikeda
2018	—	`conf`	31.3 μs/Signature-Generation 256-bit 픽p ECDSA Cryptoprocessor. A-SSCC Shotaro Sugiyama, Hiromitsu Awano, Makoto Ikeda
2018	—	`conf`	An Encryption-Authentication Unified A/D Conversion Scheme for IoT Sensor Nodes. A-SSCC Vinod V. Gadde, Hiromitsu Awano, Makoto Ikeda
2018	A	`conf`	Ising-PUF: A machine learning attack resistant PUF featuring lattice like arrangement of Arbiter-PUFs. DATE Hiromitsu Awano, Takashi Sato
2018	J	`jnl`	Low Latency 256-bit $mathbb{F}_p$ ECDSA Signature Generation Crypto Processor. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Shotaro Sugiyama, Hiromitsu Awano, Makoto Ikeda
2017	J	`jnl`	Efficient Aging-Aware Failure Probability Estimation Using Augmented Reliability and Subset Simulation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Hiromitsu Awano, Takashi Sato
2017	—	`conf`	Efficient circuit failure probability calculation along product lifetime considering device aging. ASP-DAC Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato
2017	J	`jnl`	Identification and Application of Invariant Critical Paths under NBTI Degradation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Song Bian, Shumpei Morita, Michihiro Shintani, Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato
2017	J	`jnl`	RTN in Scaled Transistors for On-Chip Random Seed Generation. IEEE Trans. Very Large Scale Integr. Syst. Abinash Mohanty, Ketul B. Sutaria, Hiromitsu Awano, Takashi Sato, Yu Cao
2017	J	`jnl`	Scalable Device Array for Statistical Characterization of BTI-Related Parameters. IEEE Trans. Very Large Scale Integr. Syst. Hiromitsu Awano, Shumpei Morita, Takashi Sato
2017	J	`jnl`	Swarm of Sound-to-Light Conversion Devices to Monitor Acoustic Communication Among Small Nocturnal Animals. J. Robotics Mechatronics Takeshi Mizumoto, Ikkyu Aihara, Takuma Otsuka, Hiromitsu Awano, Hiroshi G. Okuno
2017	—	`conf`	Yield Enhancement by Repair Circuits for Ultra-Fine Pitch Stacked-Chip Connections. ATS Keitaro Koga, Hiromitsu Awano, Makoto Ikeda
2016	A	`conf`	Call Alternation Between Specific Pairs of Male Frogs Revealed by a Sound-Imaging Method in Their Natural Habitat. INTERSPEECH Ikkyu Aihara, Takeshi Mizumoto, Hiromitsu Awano, Hiroshi G. Okuno
2016	J	`jnl`	Efficient Aging-Aware SRAM Failure Probability Calculation via Particle Filter-Based Importance Sampling. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato
2016	A*	`conf`	Efficient transistor-level timing yield estimation via line sampling. DAC Hiromitsu Awano, Takashi Sato
2016	C	`conf`	Physically unclonable function using RTN-induced delay fluctuation in ring oscillators. ISCAS Motoki Yoshinaga, Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato
2016	—	`—`	Variability in BTI-Induced Device Degradation: from Silicon Measurement to SRAM Yield Prediction. Hiromitsu Awano
2016	—	`conf`	Workload-Aware Worst Path Analysis of Processor-Scale NBTI Degradation. ACM Great Lakes Symposium on VLSI Song Bian, Michihiro Shintani, Shumpei Morita, Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato
2015	A	`conf`	ECRIPSE: an efficient method for calculating RTN-induced failure probability of an SRAM cell. DATE Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato
2015	—	`conf`	Recognition of In-Field Frog Chorusing Using Bayesian Nonparametric Microphone Array Processing. AAAI Workshop: Computational Sustainability Yoshiaki Bando, Takuma Otsuka, Ikkyu Aihara, Hiromitsu Awano, Katsutoshi Itoyama, Kazuyoshi Yoshii, Hiroshi Gitchang Okuno
2014	J	`jnl`	Automation of Model Parameter Estimation for Random Telegraph Noise. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Hirofumi Shimizu, Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato
2014	—	`conf`	Variability in device degradations: Statistical observation of NBTI for 3996 transistors. ESSDERC Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato
2013	—	`conf`	Multi-trap RTN parameter extraction based on Bayesian inference. ISQED Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
2012	J	`jnl`	Bayesian Estimation of Multi-Trap RTN Parameters Using Markov Chain Monte Carlo Method. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
2012	—	`conf`	Statistical aging under dynamic voltage scaling: A logarithmic model approach. CICC Jyothi Velamala, Ketul Sutaria, Hirofumi Shimizu, Hiromitsu Awano, Takashi Sato, Yu Cao
2012	—	`conf`	Statistical observations of NBTI-induced threshold voltage shifts on small channel-area devices. ISQED Takashi Sato, Hiromitsu Awano, Hirofttmi Shimizu, Hiroshi Tsutsui, Hiroyuki Ochi
2011	—	`conf`	Use of a Sparse Structure to Improve Learning Performance of Recurrent Neural Networks. ICONIP (3) Hiromitsu Awano, Shun Nishide, Hiroaki Arie, Jun Tani, Toru Takahashi, Hiroshi G. Okuno, Tetsuya Ogata
2010	B	`conf`	Human-robot cooperation in arrangement of objects using confidence measure of neuro-dynamical system. SMC Hiromitsu Awano, Tetsuya Ogata, Shun Nishide, Toru Takahashi, Kazunori Komatani, Hiroshi G. Okuno