Hiromasa Takahashi

13 papers B 1C 1Journal 8Unranked 3
YearRankTypeTitle / Venue / Authors
2023 B conf
Conducting an Experiment at Multiple Sites with Small Subject Pools: How is Raven Score Effective as a Covariate?
IEEE Big Data
Kazuhito Ogawa, Yusuke Osaki, Tetsuya Kawamura, Hiromasa Takahashi, Satoshi Taguchi, Yoichiro Fujii, Kengo Kurosaka, Kohei Iyori, Naoki Watanabe
2022 J jnl
Cheating, Trust and Social Norms: Data from Germany, Vietnam, China, Taiwan, and Japan.
Data
Toan Luu Duc Huynh, Marc Oliver Rieger, Mei Wang, David Berens, Duy-Linh Bui, Hung-Ling Chen, Tobias Peter Emering, Sen Geng, Yang Liu-Gerhards, Thomas Neumann, Thanh Dac Nguyen, Thong Trung Nguyen, Diefeng Peng, Thuy Chung Phan, Denis Reinhardt, Junyi Shen, Hiromasa Takahashi, Bodo Vogt
2020 J jnl
Can players avoid the tragedy of the commons in a joint debt game?
Int. J. Game Theory
Hiromasa Takahashi, Toru Takemoto, Akihiro Suzuki
2011 — conf
A vector coprocessor architecture for embedded systems.
ISOCC
Yi Ge, Yoshimasa Takebe, Masahiko Toichi, Makoto Mouri, Makiko Ito, Yoshio Hirose, Hiromasa Takahashi
2010 J jnl
A 32-Mb SPRAM With 2T1R Memory Cell, Localized Bi-Directional Write Driver and '1'/'0' Dual-Array Equalized Reference Scheme.
IEEE J. Solid State Circuits
Riichiro Takemura, Takayuki Kawahara, Katsuya Miura, Hiroyuki Yamamoto, Jun Hayakawa, Nozomu Matsuzaki, Kazuo Ono, Michihiko Yamanouchi, Kenchi Ito, Hiromasa Takahashi, Shoji Ikeda, Haruhiro Hasegawa, Hideyuki Matsuoka, Hideo Ohno
2008 J jnl
2 Mb SPRAM (SPin-Transfer Torque RAM) With Bit-by-Bit Bi-Directional Current Write and Parallelizing-Direction Current Read.
IEEE J. Solid State Circuits
Takayuki Kawahara, Riichiro Takemura, Katsuya Miura, Jun Hayakawa, Shoji Ikeda, Young Min Lee, Ryutaro Sasaki, Yasushi Goto, Kenchi Ito, Toshiyasu Meguro, Fumihiro Matsukura, Hiromasa Takahashi, Hideyuki Matsuoka, Hideo Ohno
2007 — conf
2Mb Spin-Transfer Torque RAM (SPRAM) with Bit-by-Bit Bidirectional Current Write and Parallelizing-Direction Current Read.
ISSCC
Takayuki Kawahara, Riichiro Takemura, Katsuya Miura, Jun Hayakawa, Shoji Ikeda, Young Min Lee, Ryutaro Sasaki, Yasushi Goto, Kenchi Ito, Toshiyasu Meguro, Fumihiro Matsukura, Hiromasa Takahashi, Hideyuki Matsuoka, Hideo Ohno
2007 — conf
SPRAM (SPin-transfer torque RAM) design and its impact on digital systems.
ICECS
Takayuki Kawahara, Riichiro Takemura, Hiromasa Takahashi, Hideo Ohno
2004 J jnl
Autonomous decentralized control for formation of multiple mobile robots considering ability of robot.
IEEE Trans. Ind. Electron.
Hiromasa Takahashi, Hiroaki Nishi, Kouhei Ohnishi
1999 J jnl
A 2.5-GFLOPS, 6.5 million polygons per second, four-way VLIW geometry processor with SIMD instructions and a software bypass mechanism.
IEEE J. Solid State Circuits
Hajime Kubosawa, Naoshi Higaki, Satoshi Ando, Hiromasa Takahashi, Yoshimi Asada, Hideaki Anbutsu, Tomio Sato, Masato Sakate, Atsuhiro Suga, Michihide Kimura, Hideo Miyake, Hiroshi Okano, Akira Asato, Yasunori Kimura, Hiroshi Nakayama, Masayoshi Kimoto, Katsuji Hirochi, Hideki Saito, Norio Kaido, Yukihiro Nakagawa, Toshio Shimada
1998 J jnl
A 1.2-W, 2.16-GOPS/720-MFLOPS embedded superscalar microprocessor for multimedia applications.
IEEE J. Solid State Circuits
Hajime Kubosawa, Hiromasa Takahashi, Satoshi Ando, Yoshimi Asada, Akira Asato, Atsuhiro Suga, Michihide Kimura, Naoshi Higaki, Hideo Miyake, Tomio Sato, Hideaki Anbutsu, Toshitaka Tsuda, Tetsuo Yoshimura, Isao Amano, Mutsuaki Kai, Shin Mitarai
1993 J jnl
The μVP 64-bit vector coprocessor: a new implementation of high-performance numerical computation.
IEEE Micro
Makoto Awaga, Hiromasa Takahashi
1990 C conf
A 64-bit floating-point processing unit with a horizontal instruction code for parallel operations.
ICCD
Akira Katsuno, Hiromasa Takahashi, Hajime Kubosawa, Tomio Sato, Atsuhiro Suga, Gensuke Goto