Hiroki Morizumi

25 papers B 4C 3Misc 2Journal 13Unranked 3
YearRankTypeTitle / Venue / Authors
2023 J jnl
An Approach to Circuit Lower Bounds via Bounded Width Circuits.
CoRR
Hiroki Morizumi
2023 J jnl
Computation with Large Advice.
CoRR
Hiroki Morizumi
2021 J jnl
A Satisfiability Algorithm for Synchronous Boolean Circuits.
IEICE Trans. Inf. Syst.
Hiroki Morizumi
2021 C conf
On the Power of Nondeterministic Circuits and Co-Nondeterministic Circuits.
LATA
Hiroki Morizumi
2018 J jnl
Some Results on the Power of Nondeterministic Computation.
CoRR
Hiroki Morizumi
2018 C conf
Zero-Suppression and Computation Models.
IWOCA
Hiroki Morizumi
2016 J jnl
Zero-Suppressed Computation: A New Computation Inspired by ZDDs.
CoRR
Hiroki Morizumi
2015 Misc conf
Lower Bounds for the Size of Nondeterministic Circuits.
COCOON
Hiroki Morizumi
2015 J jnl
Lower Bounds for the Size of Nondeterministic Circuits.
CoRR
Hiroki Morizumi
2014 — conf
Sensitivity, Block Sensitivity, and Certificate Complexity of Unate Functions and Read-Once Functions.
IFIP TCS
Hiroki Morizumi
2013 — conf
Complexity of Counting Output Patterns of Logic Circuits.
CATS
Kei Uchizawa, Zhenghong Wang, Hiroki Morizumi, Xiao Zhou
2012 Misc conf
Computing All MOD-Functions Simultaneously.
CSR
Evgeny Demenkov, Alexander S. Kulikov, Ivan Mihajlin, Hiroki Morizumi
2011 J jnl
Improved approximation algorithms for minimum AND-circuits problem via k-set cover.
Inf. Process. Lett.
Hiroki Morizumi
2010 J jnl
Negation-Limited Inverters of Linear Size.
IEICE Trans. Inf. Syst.
Hiroki Morizumi, Genki Suzuki
2009 — conf
Limiting Negations in Formulas.
ICALP (1)
Hiroki Morizumi
2009 J jnl
Limiting negations in non-deterministic circuits.
Theor. Comput. Sci.
Hiroki Morizumi
2009 J jnl
Linear-size log-depth negation-limited inverter for k-tonic binary sequences.
Theor. Comput. Sci.
Hiroki Morizumi, Jun Tarui
2009 J jnl
Negation-Limited Complexity of Parity and Inverters.
Algorithmica
Kazuo Iwama, Hiroki Morizumi, Jun Tarui
2008 J jnl
A Note on the Inversion Complexity of Boolean Functions in Boolean Formulas
CoRR
Hiroki Morizumi
2008 B conf
Negation-Limited Inverters of Linear Size.
ISAAC
Hiroki Morizumi, Genki Suzuki
2008 J jnl
Reductions for monotone Boolean circuits.
Theor. Comput. Sci.
Kazuo Iwama, Hiroki Morizumi, Jun Tarui
2007 C conf
Linear-Size Log-Depth Negation-Limited Inverter for
TAMC
Hiroki Morizumi, Jun Tarui
2006 B conf
Negation-Limited Complexity of Parity and Inverters.
ISAAC
Kazuo Iwama, Hiroki Morizumi, Jun Tarui
2006 B conf
Reductions for Monotone Boolean Circuits.
MFCS
Kazuo Iwama, Hiroki Morizumi
2002 B conf
An Explicit Lower Bound of 5n - o(n) for Boolean Circuits.
MFCS
Kazuo Iwama, Hiroki Morizumi