Hiroaki Arimura

14 papers Unranked 14

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Gate Stack Development for Next Gen High Voltage Periphery DRAM Devices. IRPS J. P. Bastos, Jacopo Franco, Barry J. O'Sullivan, Yusuke Higashi, Adrian Chasin, J. Ganguly, Hiroaki Arimura, Alessio Spessot, M.-S. Kim, N. Horiguchi
2025	—	`conf`	Impact of Gate Metal Work Function on 1/f Noise in RMG MOSFETs. IRPS Ruben Asanovski, Hiroaki Arimura, J. Ganguly, Pierpaolo Palestri, Alexander Grill, Ben Kaczer, Naoto Horiguchi, Luca Selmi, Jacopo Franco
2025	—	`conf`	TDDB Reliability Improvement of Low Thermal Budget RMG Stacks. IRPS G. Molinaro, Hiroaki Arimura, S. Sacchi, Andrea Vici, Robin Degraeve, Ben Kaczer, Naoto Horiguchi, M. Houssa, Jacopo Franco
2024	—	`conf`	DRAM-Peri FinFET - A Thermally-Stable High-Performance Advanced CMOS RMG Platform with Mo-Based pWFM for sub-10nm DRAM. VLSI Technology and Circuits J. Ganguly, Hiroaki Arimura, Romain Ritzenthaler, H. Bana, J. W. Maes, J. G. Lai, S. Brus, W. Maqsood, R. Sarkar, B. Kannan, Elena Capogreco, V. Machkaoutsan, S. Yoon, Alessio Spessot, M. Givens, Naoto Horiguchi
2024	—	`conf`	Side and Corner Region Non-Uniformities in Grown SiO2 and Their Implications on Current, Capacitance and Breakdown Characteristics. IRPS J. P. Bastos, Barry J. O'Sullivan, Yusuke Higashi, Adrian Vaisman Chasin, Jacopo Franco, Hiroaki Arimura, J. Ganguly, Elena Capogreco, Alessio Spessot, N. Horiguchi
2024	—	`conf`	Vt Fine-Tuning in Multi-Vt Gate-All-Around Nanosheet nFETs Using Rare-Earth Oxide-Based Dipole-First Gate Stack Compatible with CFET Integration. VLSI Technology and Circuits Hiroaki Arimura, Hans Mertens, Jacopo Franco, L. Lukose, W. Maqsood, S. Brus, Thomas Chiarella, A. Impagnatiello, S. Homkar, V. K. Mootheri, C. Yin, G. Alessio Verni, M. Givens, L. Petersen Barbosa Lima, S. Biesemans, N. Horiguchi
2023	—	`conf`	Molybdenum Nitride as a Scalable and Thermally Stable pWFM for CFET. VLSI Technology and Circuits Hiroaki Arimura, S. Brus, Jacopo Franco, Yusuke Oniki, A. Vandooren, T. Conard, B. T. Chan, B. Kannan, M. Samiee, W. Li, P. Deminskyi, E. Shero, J. Bakke, Nicolas Jourdan, G. Alessio Verni, J. W. Maes, M. Givens, Lars-Åke Ragnarsson, Jérôme Mitard, E. Dentoni Litta, N. Horiguchi
2023	—	`conf`	Novel Low Thermal Budget CMOS RMG: Performance and Reliability Benchmark Against Conventional High Thermal Budget Gate Stack Solutions. VLSI Technology and Circuits Jacopo Franco, Hiroaki Arimura, J.-F. de Marneffe, S. Brus, Romain Ritzenthaler, E. Dentoni Litta, Kris Croes, Ben Kaczer, N. Horiguchi
2022	—	`conf`	Demonstration of 3D sequential FD-SOI on CMOS FinFET stacking featuring low temperature Si layer transfer and top tier device fabrication with tier interconnections. VLSI Technology and Circuits A. Vandooren, N. Parihar, Jacopo Franco, Roger Loo, Hiroaki Arimura, R. Rodriguez, F. Sebaai, S. Iacovo, Kevin Vandersmissen, W. Li, G. Mannaert, D. Radisic, E. Rosseel, Andriy Hikavyy, Anne Jourdain, O. Mourey, G. Gaudin, Shay Reboh, L. Le Van-Jodin, Guillaume Besnard, C. Roda Neve, Bich-Yen Nguyen, Iuliana P. Radu, E. Dentoni Litta, N. Horiguchi
2022	—	`conf`	High Performance Thermally Resistant FinFETs DRAM Peripheral CMOS FinFETs with VTH Tunability for Future Memories. VLSI Technology and Circuits Romain Ritzenthaler, Elena Capogreco, E. Dupuy, Hiroaki Arimura, J. P. Bastos, P. Favia, F. Sebaai, D. Radisic, V. T. H. Nguyen, G. Mannaert, B. T. Chan, V. Machkaoutsan, Y. Yoon, H. Itokawa, M. Yamaguchi, Y. Chen, Pierre Fazan, S. Subramanian, Alessio Spessot, E. Dentoni Litta, S. Samavedam, Naoto Horiguchi
2022	—	`conf`	Scaled FinFETs Connected by Using Both Wafer Sides for Routing via Buried Power Rails. VLSI Technology and Circuits Anabela Veloso, Anne Jourdain, D. Radisic, Rongmei Chen, G. Arutchelvan, B. O'Sullivan, Hiroaki Arimura, Michele Stucchi, An De Keersgieter, M. Hosseini, T. Hopf, K. D'Have, S. Wang, E. Dupuy, G. Mannaert, Kevin Vandersmissen, S. Iacovo, P. Marien, S. Choudhury, Filip Schleicher, F. Sebaai, Yusuke Oniki, X. Zhou, A. Gupta, Tom Schram, B. Briggs, C. Lorant, E. Rosseel, Andriy Hikavyy, Roger Loo, J. Geypen, D. Batuk, G. T. Martinez, J. P. Soulie, Katia Devriendt, B. T. Chan, S. Demuynck, Gaspard Hiblot, Geert Van der Plas, Julien Ryckaert, Gerald Beyer, E. Dentoni Litta, Eric Beyne, Naoto Horiguchi
2021	—	`conf`	Novel low thermal budget gate stack solutions for BTI reliability in future Logic Device technologies : Invited paper. ICICDT Jacopo Franco, Hiroaki Arimura, J.-F. de Marneffe, A. Vandooren, L.-Å. Ragnarsson, Zhicheng Wu, Dieter Claes, E. Dentoni Litta, N. Horiguchi, Kris Croes, Dimitri Linten, Tibor Grasser, Ben Kaczer
2016	—	`conf`	Beyond-Si materials and devices for more Moore and more than Moore applications. ICICDT Nadine Collaert, AliReza Alian, Hiroaki Arimura, Geert Boccardi, Geert Eneman, Jacopo Franco, Tsvetan Ivanov, Dennis Lin, Jérôme Mitard, S. Ramesh, R. Rooyackers, Marc Schaekers, A. Sibaya-Hernandez, S. Sioncke, Quentin Smets, Abhitosh Vais, A. Vandooren, Anabela Veloso, Anne S. Verhulst, Devin Verreck, Niamh Waldron, Amey Walke, Liesbeth Witters, H. Yu, X. Zhou, Aaron Voon-Yew Thean
2013	—	`conf`	Impact of Al2O3 position on performances and reliability in high-k metal gated DRAM periphery transistors. ESSDERC Marc Aoulaiche, Eddy Simoen, Romain Ritzenthaler, Tom Schram, Hiroaki Arimura, Moonju Cho, Thomas Kauerauf, Guido Groeseneken, Naoto Horiguchi, Aaron Thean, Antonio Federico, Felice Crupi, Alessio Spessot, Christian Caillat, Pierre Fazan, Hyuokju Na, Y. Son, K. B. Noh