Hillery C. Hunter

25 papers A* 7Misc 2Journal 10Unranked 5
YearRankTypeTitle / Venue / Authors
2026 — conf
Mission-Critical Enterprise Systems... What's a Mission? And What's Critical?: Processor and technology requirements for enterprise computing.
ASPLOS (2)
Hillery C. Hunter
2020 J jnl
Temperature Aware Adaptations for Improved Read Reliability in STT-MRAM Memory Subsystem.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Saravanan Sethuraman, Venkata Kalyan Tavva, Karthick Rajamani, Chitra K. Subramanian, Kyu-Hyoun Kim, Hillery C. Hunter, M. B. Srinivas
2019 — conf
BlueConnect: Decomposing All-Reduce for Deep Learning on Heterogeneous Network Hierarchy.
SysML
Minsik Cho, Ulrich Finkler, David S. Kung, Hillery C. Hunter
2019 J jnl
BlueConnect: Decomposing all-reduce for deep learning on heterogeneous network hierarchy.
IBM J. Res. Dev.
Minsik Cho, Ulrich Finkler, Mauricio J. Serrano, David S. Kung, Hillery C. Hunter
2019 A* ed.
Proceedings of the 46th International Symposium on Computer Architecture, ISCA 2019, Phoenix, AZ, USA, June 22-26, 2019
ISCA
Srilatha Bobbie Manne, Hillery C. Hunter, Erik R. Altman
2018 — conf
PANEL: Open panel and discussion on tackling complexity, reproducibility and tech transfer challenges in a rapidly evolving AI/ML/systems research.
ReQuEST@ASPLOS
Grigori Fursin, Thierry Moreau, Hillery C. Hunter, Yiran Chen, Charles Qi, Tianqi Chen
2017 A* ed.
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2017, Cambridge, MA, USA, October 14-18, 2017
MICRO
Hillery C. Hunter, Jaime Moreno, Joel S. Emer, Daniel Sánchez
2015 J jnl
Guest Editorial Computing in Emerging Technologies (Second Issue).
IEEE J. Emerg. Sel. Topics Circuits Syst.
Saibal Mukhopadhyay, Swarup Bhunia, Hillery C. Hunter, Kaushik Roy
2014 J jnl
Adapting Server Systems for New Memory Technologies.
Computer
Hillery C. Hunter, Luis Alfonso Lastras-Montaño, Bishwaranjan Bhattacharjee
2014 J jnl
Guest Editorial Computing in Emerging Technologies (First Issue).
IEEE J. Emerg. Sel. Topics Circuits Syst.
Saibal Mukhopadhyay, Swarup Bhunia, Hillery C. Hunter, Kaushik Roy
2013 A* conf
Understanding and mitigating refresh overheads in high-density DDR4 DRAM systems.
ISCA
Janani Mukundan, Hillery C. Hunter, Kyu-Hyoun Kim, Jeffrey Stuecheli, José F. Martínez
2011 J jnl
Coordinating DRAM and Last-Level-Cache Policies with the Virtual Write Queue.
IEEE Micro
Jeffrey Stuecheli, Dimitris Kaseridis, David Daly, Hillery C. Hunter, Lizy K. John
2010 A* conf
Elastic Refresh: Techniques to Mitigate Refresh Penalties in High Density Memory.
MICRO
Jeffrey Stuecheli, Dimitris Kaseridis, Hillery C. Hunter, Lizy K. John
2010 A* conf
The virtual write queue: coordinating DRAM and last-level cache policies.
ISCA
Jeffrey Stuecheli, Dimitris Kaseridis, David Daly, Hillery C. Hunter, Lizy K. John
2009 J jnl
A 1 MB Cache Subsystem Prototype With 1.8 ns Embedded DRAMs in 45 nm SOI CMOS.
IEEE J. Solid State Circuits
Peter J. Klim, John Barth, William R. Reohr, David Dick, Gregory Fredeman, Gary Koch, Hien M. Le, Aditya Khargonekar, Pamela Wilcox, John Golz, Jente B. Kuang, Abraham Mathews, Jethro C. Law, Trong Luong, Hung C. Ngo, Ryan Freese, Hillery C. Hunter, Erik Nelson, Paul C. Parries, Toshiaki Kirihata, Subramanian S. Iyer
2009 J jnl
Hardware-compiler co-design for adjustable data power savings.
Microprocess. Microsystems
Hillery C. Hunter, Erik M. Nystrom, Daniel A. Connors, Wen-mei W. Hwu
2008 J jnl
A 500 MHz Random Cycle, 1.5 ns Latency, SOI Embedded DRAM Macro Featuring a Three-Transistor Micro Sense Amplifier.
IEEE J. Solid State Circuits
John Barth, William R. Reohr, Paul C. Parries, Gregory Fredeman, John Golz, Stanley Schuster, Richard E. Matick, Hillery C. Hunter, Charles Tanner, Joseph Harig, Hoki Kim, Babar A. Khan, John Griesemer, Robert Havreluk, Kenji Yanagisawa, Toshiaki Kirihata, Subramanian S. Iyer
2008 — conf
Tutorial 5: Caches in the Many-Core Era: What Purpose Might eDRAM Serve?
ISQED
Hillery C. Hunter
2007 — conf
A 500MHz Random Cycle 1.5ns-Latency, SOI Embedded DRAM Macro Featuring a 3T Micro Sense Amplifier.
ISSCC
John Barth, William R. Reohr, Paul C. Parries, Gregory Fredeman, John Golz, Stanley Schuster, Richard E. Matick, Hillery C. Hunter, Charles Tanner, Joseph Harig, Hoki Kim, Babar A. Khan, John Griesemer, Robert Havreluk, Kenji Yanagisawa, Toshiaki Kirihata, Subramanian S. Iyer
2004 — —
Matching on -Chip Data Storage to Telecommunication and Media Application Properties
Hillery C. Hunter
2003 Misc conf
A new look at exploiting data parallelism in embedded systems.
CASES
Hillery C. Hunter, Jaime H. Moreno
2003 J jnl
An innovative low-power high-performance programmable signal processor for digital communications.
IBM J. Res. Dev.
Jaime H. Moreno, Victor V. Zyuban, Uzi Shvadron, Fredy D. Neeser, Jeff H. Derby, Malcolm S. Ware, Krishnan Kailas, Ayal Zaks, Amir B. Geva, Shay Ben-David, Sameh W. Asaad, Thomas W. Fox, Daniel Littrell, Marina Biberstein, Dorit Naishlos, Hillery C. Hunter
2002 Misc conf
Code coverage and input variability: effects on architecture and compiler research.
CASES
Hillery C. Hunter, Wen-mei W. Hwu
2001 A* conf
Enhancing loop buffering of media and telecommunications applications using low-overhead predication.
MICRO
John W. Sias, Hillery C. Hunter, Wen-mei W. Hwu
2000 A* conf
Hardware Support for Dynamic Management of Compiler-Directed Computation Reuse.
ASPLOS
Daniel A. Connors, Hillery C. Hunter, Ben-Chung Cheng, Wen-mei W. Hwu