Hideyuki Ichihara

57 papers A 1B 6C 5Misc 3Journal 14Unranked 28
YearRankTypeTitle / Venue / Authors
2025 — conf
Analysis and Improvement of Parallel Implementation of Linear FSMs for High-Speed Stochastic Computing.
ITC-Asia
Hideyuki Ichihara, Kota Okahara, Tomoo Inoue
2024 — conf
On Accuracy Enhancement of No-Reference Error-Tolerability Testing for Images in Object Detection Applications Based on RGB Channel Characteristics.
ITC-Asia
Jun-Tsung Wu, Hideyuki Ichihara, Tomoo Inoue, Tong-Yu Hsieh
2023 B conf
A Resource Estimation Method in Multi-Cloud Environment with a Model Based on a Repairable-Item Inventory System.
COMPSAC
Naoki Okuda, Kaori Maeda, Chisa Takano, Hideyuki Ichihara
2023 — conf
Reliability Analysis of Approximate Multipliers with Recovery Schemes.
ATS
Tamaki Kozuma, Qilin Wang, Hideyuki Ichihara, Tomoo Inoue
2022 — conf
An Improvement of the No-Reference Test Scheme Based on False Edge Detection for Image Processing Application.
ITC-Asia
Hideyuki Ichihara, Naruki Itoh, Tomoo Inoue
2021 — conf
A Design of Approximate Voting Schemes for Fail-Operational Systems.
ATS
Hideyuki Ichihara, Kazunori Yukihiro, Tomoo Inoue
2021 — conf
A Design of Reliable Linear FSMs with Equivalent States in Stochastic Computing.
DFT
Hideyuki Ichihara, Takayuki Fukuda, Tomoo Inoue
2020 J jnl
Transient Fault Tolerant State Assignment for Stochastic Computing Based on Linear Finite State Machines.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Hideyuki Ichihara, Motoi Fukuda, Tsuyoshi Iwagaki, Tomoo Inoue
2019 — conf
An Empirical Approach to RTL Scan Path Design Focusing on Structural Interpretation in Logic Synthesis.
ITC-Asia
Tsuyoshi Iwagaki, Sho Yuasa, Hideyuki Ichihara, Tomoo Inoue
2019 J jnl
Compact and Accurate Digital Filters Based on Stochastic Computing.
IEEE Trans. Emerg. Top. Comput.
Hideyuki Ichihara, Tatsuyoshi Sugino, Shota Ishii, Tsuyoshi Iwagaki, Tomoo Inoue
2019 — conf
State Encoding with Stochastic Numbers for Transient Fault Tolerant Linear Finite State Machines.
DFT
Hideyuki Ichihara, Yuki Maeda, Tsuyoshi Iwagaki, Tomoo Inoue
2017 — conf
State assignment for fault tolerant stochastic computing with linear finite state machines.
ITC-Asia
Hideyuki Ichihara, Motoi Fukuda, Tsuyoshi Iwagaki, Tomoo Inoue
2015 B conf
A fault tolerant response analyzer with self-error-correction capability.
ETS
Yuki Fukazawa, Hideyuki Ichihara, Tomoo Inoue
2015 B conf
A practical approach for logic simplification based on fault acceptability for error tolerant application.
ETS
Hideyuki Ichihara, Junpei Kamei, Tsuyoshi Iwagaki, Tomoo Inoue
2015 B conf
Designing area-efficient controllers for multi-cycle transient fault tolerant systems.
ETS
Tsuyoshi Iwagaki, Yutaro Ishimori, Hideyuki Ichihara, Tomoo Inoue
2015 C conf
Logic simplification by minterm complement for error tolerant application.
ICCD
Hideyuki Ichihara, Tomoya Inaoka, Tsuyoshi Iwagaki, Tomoo Inoue
2014 C conf
Compact and accurate stochastic circuits with shared random number sources.
ICCD
Hideyuki Ichihara, Shota Ishii, Daiki Sunamori, Tsuyoshi Iwagaki, Tomoo Inoue
2014 — conf
Scheduling algorithm in datapath synthesis for long duration transient fault tolerance.
DFT
Tsuyoshi Iwagaki, Tatsuya Nakaso, Ryoko Ohkubo, Hideyuki Ichihara, Tomoo Inoue
2013 — conf
A Transient Fault Tolerant Test Pattern Generator for On-line Built-in Self-Test.
Asian Test Symposium
Yuki Fukazawa, Tsuyoshi Iwagaki, Hideyuki Ichihara, Tomoo Inoue
2012 C conf
Modeling economics of LSI design and manufacturing for test design selection.
ICCD
Hideyuki Ichihara, Noboru Shimizu, Tsuyoshi Iwagaki, Tomoo Inoue
2012 — conf
Utilizing register transfer level false paths for circuit optimization with a logic synthesis tool.
APCCAS
Tsuyoshi Iwagaki, Takehiro Mikami, Hideyuki Ichihara, Tomoo Inoue
2011 C conf
High-level synthesis for multi-cycle transient fault tolerant datapaths.
IOLTS
Tomoo Inoue, Hayato Henmi, Yuki Yoshikawa, Hideyuki Ichihara
2011 J jnl
Hybrid Test Application in Partial Skewed-Load Scan Design.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Yuki Yoshikawa, Tomomi Nuwa, Hideyuki Ichihara, Tomoo Inoue
2011 — conf
Test Compression Based on Lossy Image Encoding.
Asian Test Symposium
Hideyuki Ichihara, Yuka Iwamoto, Yuki Yoshikawa, Tomoo Inoue
2010 — conf
A Fast Threshold Test Generation Algorithm Based on 5-Valued Logic.
DELTA
Tomoo Inoue, Nobukazu Izumi, Yuki Yoshikawa, Hideyuki Ichihara
2010 J jnl
A Practical Threshold Test Generation for Error Tolerant Application.
IEICE Trans. Inf. Syst.
Hideyuki Ichihara, Kenta Sutoh, Yuki Yoshikawa, Tomoo Inoue
2010 C conf
An FPGA-based fail-soft system with adaptive reconfiguration.
IOLTS
Ryoji Noji, Satoshi Fujie, Yuki Yoshikawa, Hideyuki Ichihara, Tomoo Inoue
2010 J jnl
Design and Optimization of Transparency-Based TAM for SoC Test.
IEICE Trans. Inf. Syst.
Tomokazu Yoneda, Akiko Shuto, Hideyuki Ichihara, Tomoo Inoue, Hideo Fujiwara
2010 B conf
Hybrid test application in hybrid delay scan design.
ETS
Yuki Yoshikawa, Tomomi Nuwa, Hideyuki Ichihara, Tomoo Inoue
2009 — conf
A Practical Approach to Threshold Test Generation for Error Tolerant Circuits.
Asian Test Symposium
Hideyuki Ichihara, Kenta Sutoh, Yuki Yoshikawa, Tomoo Inoue
2009 — conf
Reliability and Performance Analysis of FPGA-Based Fault Tolerant System.
DFT
Ryoji Noji, Satoshi Fujie, Yuki Yoshikawa, Hideyuki Ichihara, Tomoo Inoue
2008 J jnl
A Self-Test of Dynamically Reconfigurable Processors with Test Frames.
IEICE Trans. Inf. Syst.
Tomoo Inoue, Takashi Fujii, Hideyuki Ichihara
2008 J jnl
An Architecture of Embedded Decompressor with Reconfigurability for Test Compression.
IEICE Trans. Inf. Syst.
Hideyuki Ichihara, Tomoyuki Saiki, Tomoo Inoue
2007 J jnl
A Variable-Length Coding Adjustable for Compressed Test Application.
IEICE Trans. Inf. Syst.
Hideyuki Ichihara, Toshihiro Ohara, Michihiro Shintani, Tomoo Inoue
2007 J jnl
A statistical error model for image sensors and its testing.
Syst. Comput. Jpn.
Hideyuki Ichihara, Toshimasa Kuchii, Masaaki Yamadate, Hideaki Sakaguchi, Hiroshi Uemura, Kozo Kinoshita
2007 B conf
Optimal Contexts for the Self-Test of Coarse Grain Dynamically Reconfigurable Processors.
ETS
Tomoo Inoue, Takashi Fujii, Hideyuki Ichihara
2007 Misc conf
TAM Design and Optimization for Transparency-Based SoC Test.
VTS
Tomokazu Yoneda, Akiko Shuto, Hideyuki Ichihara, Tomoo Inoue, Hideo Fujiwara
2007 — conf
Test Compression / Decompression Based on JPEG VLC Algorithm.
ATS
Hideyuki Ichihara, Yukinori Setohara, Yusuke Nakashima, Tomoo Inoue
2006 — conf
A Reconfigurable Embedded Decompressor for Test Compression.
DELTA
Tomoyuki Saiki, Hideyuki Ichihara, Tomoo Inoue
2006 J jnl
An Adaptive Decompressor for Test Application with Variable-Length Coding.
Inf. Media Technol.
Hideyuki Ichihara, Masakuni Ochi, Michihiro Shintani, Tomoo Inoue
2005 — conf
A Huffman-based coding with efficient test application.
ASP-DAC
Michihiro Shintani, Toshihiro Ohara, Hideyuki Ichihara, Tomoo Inoue
2005 — conf
An Effective Design for Hierarchical Test Generation Based on Strong Testability.
Asian Test Symposium
Hideyuki Ichihara, Tomoo Inoue, Naoki Okamoto, Toshinori Hosokawa, Hideo Fujiwara
2005 J jnl
Huffman-Based Test Response Coding.
IEICE Trans. Inf. Syst.
Hideyuki Ichihara, Michihiro Shintani, Tomoo Inoue
2005 J jnl
Test cost reduction for logic circuits: Reduction of test data volume and test application time.
Syst. Comput. Jpn.
Yoshinobu Higami, Seiji Kajihara, Hideyuki Ichihara, Yuzo Takamatsu
2004 — conf
A Test Decompression Scheme for Variable-Length Coding.
Asian Test Symposium
Hideyuki Ichihara, Masakuni Ochi, Michihiro Shintani, Tomoo Inoue
2003 J jnl
A Method of Test Generation for Acyclic Sequential Circuits Using Single Stuck-at Fault Combinational ATPG.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Hideyuki Ichihara, Tomoo Inoue
2003 Misc conf
Channel Width Test Data Compression under a Limited Number of Test Inputs and Outputs.
VLSI Design
Hideyuki Ichihara, Kozo Kinoshita, Koji Isodono, Shigeki Nishikawa
2003 A conf
Test Generation for Acyclic Sequential Circuits with Single Stuck-at Fault Combinational ATPG.
DATE
Hideyuki Ichihara, Tomoo Inoue
2003 — conf
Test Response Compression Based on Huffman Coding.
Asian Test Symposium
Hideyuki Ichihara, Michihiro Shintani, Toshihiro Ohara, Tomoo Inoue
2002 — conf
Generating Small Test Sets for Test Compression/Decompression Scheme Using Statistical Coding.
DELTA
Hideyuki Ichihara, Tomoo Inoue
2001 — conf
Dynamic Test Compression Using Statistical Coding.
Asian Test Symposium
Hideyuki Ichihara, Atsuhiro Ogawa, Tomoo Inoue, Akio Tamura
2000 Misc conf
Test Transformation to Improve Compaction by Statistical Encoding.
VLSI Design
Hideyuki Ichihara, Kozo Kinoshita, Irith Pomeranz, Sudhakar M. Reddy
1999 — conf
On Test Generation with A Limited Number of Tests.
Great Lakes Symposium on VLSI
Hideyuki Ichihara, Kozo Kinoshita, Seiji Kajihara
1999 — conf
On an Effective Selection of IDDQ Measurement Vectors for Sequential Circuits.
Asian Test Symposium
Hideyuki Ichihara, Kozo Kinoshita, Seiji Kajihara
1998 — conf
An Efficient Procedure for Obtaining Implication Relations and Its Application to Redundancy Identification.
Asian Test Symposium
Hideyuki Ichihara, Seiji Kajihara, Kozo Kinoshita
1997 — conf
On Acceleration of Logic Circuits Optimization Using Implication Relations.
Asian Test Symposium
Hideyuki Ichihara, Kozo Kinoshita
1997 J jnl
On invariant implication relations for removing partial circuits.
Syst. Comput. Jpn.
Hideyuki Ichihara, Kozo Kinoshita, Seiji Kajihara