Hetul Sanghvi - RankMe

16 papers C 4Misc 2Journal 1Unranked 9

Year	Rank	Type	Title / Venue / Authors
2022	—	`conf`	An area-efficient 6T-SRAM based Compute-In-Memory architecture with reconfigurable SAR ADCs for energy-efficient deep neural networks in edge ML applications. CICC Avishek Biswas, Hetul Sanghvi, Mahesh Mehendale, G. Preet
2021	Misc	`conf`	Novel Census Transform Hardware IP. VLSID Anish Reghunath, Mihir Mody, Hetul Sanghvi, Ankur
2020	—	`conf`	2.6 A 16nm 3.5B+ Transistor >14TOPS 2-to-10W Multicore SoC Platform for Automotive and Embedded Applications with Integrated Safety MCU, 512b Vector VLIW DSP, Embedded Vision and Imaging Acceleration. ISSCC Rama Venkatasubramanian, Don Steiss, Greg Shurtz, Tim Anderson, Kai Chirca, Raghavendra Santhanagopal, Niraj Nandan, Anish Reghunath, Hetul Sanghvi, Daniel Wu, Abhijeet Chachad, Brian Karguth, Denis Beaudoin, Charles Fuoco, Lewis Nardini, Chunhua Hu, Sam Visalli, Amrit Mundra, Devanathan Varadarajan, Frank Cano, Shane Stelmach, Mihir Mody, Arthur Redfern, Haydar Bilhan, Maher Sarraj, Ali Siddiki, Anthony Lell, Eldad Falik, Anthony M. Hill, Abhinay Armstrong, Todd Beck, Vijay Kanumuri, Steven Mullinnix, Darnell Moore, Jason Jones, Manoj Koul, Sanjive Agarwala
2020	—	`conf`	DBQ: A Differentiable Branch Quantizer for Lightweight Deep Neural Networks. ECCV (27) Hassan Dbouk, Hetul Sanghvi, Mahesh Mehendale, Naresh R. Shanbhag
2020	J	`jnl`	DBQ: A Differentiable Branch Quantizer for Lightweight Deep Neural Networks. CoRR Hassan Dbouk, Hetul Sanghvi, Mahesh Mehendale, Naresh R. Shanbhag
2017	—	`conf`	A 216 GOPS flexible WDR Image Processor for ADAS SoC. COOL Chips Mihir N. Mody, Hetul Sanghvi, Niraj Nandan, Shashank Dabral, Rajasekhar Allu, Rajat Sagar, Kedar Chitnis, Jason Jones, Brijesh Jadhav, Sujith Shivalingappa, Aish Dubey
2016	—	`conf`	Efficient VLSI architecture for SAO decoding in 4K Ultra-HD HEVC video codec. SoCC Mihir N. Mody, Niraj Nandan, Hetul Sanghvi
2015	C	`conf`	Accelerating H.264/HEVC video slice processing using application specific instruction set processor. ICCE Dipan Kumar Mandal, Mihir Mody, Mahesh Mehendale, Naresh Yadav, Ghone Chaitanya, Piyali Goswami, Hetul Sanghvi, Niraj Nandan
2015	C	`conf`	Flexible Wide Dynamic Range (WDR) processing support in image signal processor (ISP). ICCE Mihir N. Mody, Niraj Nandan, Hetul Sanghvi, Rajasekhar Allu, Rajat Sagar
2015	—	`conf`	Image signal processing for front camera based automated driver assistance system. ICCE-Berlin Mihir Mody, Niraj Nandan, Shashank Dabral, Hetul Sanghvi, Rajat Sagar, Zoran Nikolic, Kedar Chitnis, Rajasekhar Allu, Gang Hua
2014	C	`conf`	2D cache architecture for motion compensation in a 4K Ultra-HD AVC and HEVC video codec system. ICCE Hetul Sanghvi
2014	C	`conf`	A 28nm programmable and low power ultra-HD video codec engine. ISCAS Hetul Sanghvi, Mihir N. Mody, Niraj Nandan, Mahesh Mehendale, Subrangshu Das, Dipan Kumar Mandal, Pavan Shastry
2014	Misc	`conf`	A monolithic programmable Ultra-HD video codec engine. ICASSP Hetul Sanghvi, Mihir N. Mody, Niraj Nandan, Mahesh Mehendale, Subrangshu Das, Dipan Kumar Mandal, Nainala Vyagrheswarudu, Vijayavardhan Baireddy, Pavan Shastry
2014	—	`conf`	Customization of de-blocking filter edge order for high performance: Study of H.264 AVC/SVC, H.265. ISSPIT Niraj Nandan, Mihir N. Mody, Hetul Sanghvi, Prithvi Shankar
2014	—	`conf`	Efficient system level cache architecture for multimedia SoC. ICACCI Prashant Karandikar, Mihir N. Mody, Hetul Sanghvi, Vasant Easwaran, Prithvi Shankar, Rahul Gulati, Niraj Nandan, Subrangshu Das
2014	—	`conf`	High performance and flexible imaging Sub-system. ICACCI Mihir N. Mody, Hetul Sanghvi, Niraj Nandan, Shashank Dabral, Rajasekhar Allu, Dharmendra Soni, Sunil Sah, Gayathri Seshadri, Prashant Karandikar