Herman Schmit - RankMe

59 papers A* 8A 17B 3Misc 8Journal 8Unranked 15

Year	Rank	Type	Title / Venue / Authors
2023	A*	`conf`	Improving Standard-Cell Design Flow using Factored Form Optimization. DAC Alessandro Tempia Calvino, Alan Mishchenko, Herman Schmit, Ethan Mahintorabi, Giovanni De Micheli, Xiaoqing Xu
2022	A*	`conf`	Direct Spatial Implementation of Sparse Matrix Multipliers for Reservoir Computing. HPCA Matthew Denton, Herman Schmit
2022	A	`conf`	Multi-input Serial Adders for FPGA-like Computational Fabric. FPGA Herman Schmit, Matthew Denton
2021	J	`jnl`	Direct Spatial Implementation of Sparse Matrix Multipliers for Reservoir Computing. CoRR Matthew Denton, Herman Schmit
2019	J	`jnl`	Spatial Timing Analysis With Exact Propagation of Delay and Application to FPGA Performance. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. David M. Lewis, Herman Schmit
2017	—	`conf`	3.3 A 14nm 1GHz FPGA with 2.5D transceiver integration. ISSCC David Greenhill, Ron Ho, David M. Lewis, Herman Schmit, Kok Hong Chan, Andy Tong, Sean Atsatt, Dana How, Peter McElheny, Keith Duwel, Jeffrey Schulz, Darren Faulkner, Gopal Iyer, George Chen, Hee Kong Phoon, Han Wooi Lim, Wei-Yee Koay, Ty Garibay
2016	A	`conf`	Dissecting Xeon + FPGA: Why the integration of CPUs and FPGAs makes a power difference for the datacenter: Invited Paper. ISLPED Herman Schmit, Randy Huang
2016	A	`conf`	Stratix™ 10 High Performance Routable Clock Networks. FPGA Carl Ebeling, Dana How, David M. Lewis, Herman Schmit
2008	—	`conf`	Placement challenges for structured ASICs. ISPD Herman Schmit, Amit Gupta, Radu Ciobanu
2005	J	`jnl`	Layout techniques for FPGA switch blocks. IEEE Trans. Very Large Scale Integr. Syst. Herman Schmit, Vikas Chandra
2005	A	`ed.`	Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, FPGA 2005, Monterey, California, USA, February 20-22, 2005 FPGA Herman Schmit, Steven J. E. Wilton
2004	—	`conf`	A low power approach to system level pipelined interconnect design. SLIP Vikas Chandra, Anthony Xu, Herman Schmit
2004	A	`conf`	A power aware system level interconnect design methodology for latency-insensitive systems. ICCAD Vikas Chandra, Herman Schmit, Anthony Xu, Lawrence T. Pileggi
2004	A	`conf`	An Interconnect Channel Design Methodology for High Performance Integrated Circuits. DATE Vikas Chandra, Anthony Xu, Herman Schmit, Lawrence T. Pileggi
2004	A	`conf`	Creating a power-aware structured ASIC. ISLPED R. Reed Taylor, Herman Schmit
2004	A*	`conf`	Enabling energy efficiency in via-patterned gate array devices. DAC R. Reed Taylor, Herman Schmit
2004	—	`conf`	Evaluating Alternative Implementations for LDPC Decoder Check Node Function. ISVLSI Theo Theocharides, Greg M. Link, Eric J. Swankoski, Narayanan Vijaykrishnan, Mary Jane Irwin, Herman Schmit
2004	A	`ed.`	Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, FPGA 2004, Monterey, California, USA, February 22-24, 2004 FPGA Russell Tessier, Herman Schmit
2003	—	`conf`	An architectural exploration of via patterned gate arrays. ISPD Chetan Patel, Anthony Cozzie, Herman Schmit, Lawrence T. Pileggi
2003	Misc	`conf`	Asynchronous PipeRench: Architecture and Performance Estimations. FCCM Hiroto Kagotani, Herman Schmit
2003	—	`conf`	CAD Tool Support For A Multi-University Soc Certificate Program: The Digital Sandbox. MSE Thomas Kroll, Herman Schmit, Dave Landis
2003	Misc	`conf`	Efficient Application Representation for HASTE: Hybrid Architectures with a Single, Transformable Executable. FCCM Benjamin A. Levine, Herman Schmit
2003	A*	`conf`	Exploring regular fabrics to optimize the performance-cost trade-off. DAC Lawrence T. Pileggi, Herman Schmit, Andrzej J. Strojwas, Padmini Gopalakrishnan, V. Kheterpal, Aneesh Koorapaty, Chetan Patel, Vyacheslav Rovner, Kim Yaw Tong
2003	B	`conf`	Extra-dimensional Island-Style FPGAs. FPL Herman Schmit
2003	—	`conf`	Floorplanning of pipelined array modules using sequence pairs. ISPD Matthew Moe, Herman Schmit
2003	B	`conf`	Heterogeneous Logic Block Architectures for Via-Patterned Programmable Fabrics. FPL Aneesh Koorapaty, Lawrence T. Pileggi, Herman Schmit
2003	A	`conf`	Heterogeneous Programmable Logic Block Architectures. DATE Aneesh Koorapaty, Vikas Chandra, Kim Yaw Tong, Chetan Patel, Lawrence T. Pileggi, Herman Schmit
2003	—	`conf`	Regular logic fabrics for a via patterned gate array (VPGA). CICC Kim Yaw Tong, V. Kheterpal, Vyacheslav Rovner, Lawrence T. Pileggi, Herman Schmit
2003	—	`conf`	The Sandbox Design Experience Course. MSE Herman Schmit, Thomas Kroll, Max Khusid, Ivan S. Kourtev, Narayanan Vijaykrishnan, David L. Landis
2002	A	`conf`	FPGA switch block layout and evaluation. FPGA Herman Schmit, Vikas Chandra
2002	A*	`conf`	Memory optimization in single chip network switch fabrics. DAC David Whelihan, Herman Schmit
2002	B	`conf`	Morphable Multipliers. FPL Silviu M. S. A. Chiricescu, Michael A. Schuette, Robin Glinton, Herman Schmit
2002	—	`conf`	PipeRench: A virtualized programmable datapath in 0.18 micron technology. CICC Herman Schmit, David Whelihan, Andrew Tsai, Matthew Moe, Benjamin A. Levine, R. Reed Taylor
2002	Misc	`conf`	Queue Machines: Hardware Compilation in Hardware. FCCM Herman Schmit, Benjamin A. Levine, Benjamin Ylvisaker
2002	—	`conf`	Simultaneous Optimization of Driving Buffer and Routing Switch Sizes in an FPGA using an Iso-Area Approach. ISVLSI Vikas Chandra, Herman Schmit
2002	—	`conf`	Synthesis of Morphable Multipliers. IWLS Silviu M. S. A. Chiricescu, Michael A. Schuette, Herman Schmit, Robin Glinton
2001	—	`conf`	SoC Design Skills: Collaboration Builds a Stronger SoC Design Team. MSE Pradeep K. Khosla, Herman Schmit, Mary Jane Irwin, Narayanan Vijaykrishnan, Tom Cain, Steven P. Levitan, Dave Landis
2000	Misc	`conf`	Implementation of Near Shannon Limit Error-Correcting Codes Using Reconfigurable Hardware. FCCM Benjamin A. Levine, R. Reed Taylor, Herman Schmit
2000	A*	`conf`	PipeRench implementation of the instruction path coprocessor. MICRO Yuan C. Chou, Pazhani Pillai, Herman Schmit, John Paul Shen
2000	J	`jnl`	PipeRench: A Reconfigurable Architecture and Compiler. Computer Seth Copen Goldstein, Herman Schmit, Mihai Budiu, Srihari Cadambi, Matthew Moe, R. Reed Taylor
2000	J	`jnl`	Pipeline Reconfigurable FPGAs. J. VLSI Signal Process. Herman Schmit, Srihari Cadambi, Matthew Moe, Seth Copen Goldstein
2000	A	`conf`	Scalable interconnect and power distribution for island-style FPGAs (poster abstract). FPGA Herman Schmit, David Whelihan, Peter Kamarchik, Frank Gennari
2000	A	`conf`	The John Henry Syndrome (panel session)(abstract only): humans vs. machines as FPGA designers. FPGA Herman Schmit, Ray Andraka, Philip Friedin, Satnam Singh, Tim Southgate
1999	A	`conf`	Extra-Dimensional Island-Style FPGAs. FPGA Herman Schmit
1999	A	`conf`	Mixed-swing quadrail for low power dual-rail domino logic. ISLPED Bharath Ramasubramanian, Herman Schmit, L. Richard Carley
1999	Misc	`conf`	PCI-PipeRench and the SWORDAPI: A System for Stream-Based Reconfigurable Computing. FCCM Ronald Laufer, R. Reed Taylor, Herman Schmit
1999	A*	`conf`	PipeRench: A Coprocessor for Streaming multimedia Acceleration. ISCA Seth Copen Goldstein, Herman Schmit, Matthew Moe, Mihai Budiu, Srihari Cadambi, R. Reed Taylor, Ronald Laufer
1999	A*	`conf`	Vertical Benchmarks for CAD. DAC Christopher Inacio, Herman Schmit, David Nagle, Andrew Ryan, Donald E. Thomas, Yingfai Tong, Ben Klass
1998	—	`conf`	A low-power 16-bit multiplier-accumulator using series-regulated mixed swing techniques. CICC Ram Krishnamurthy, Herman Schmit, L. Richard Carley
1998	J	`jnl`	Address generation for memories containing multiple arrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Herman Schmit, Donald E. Thomas
1998	Misc	`conf`	Characterization and Parameterization of a Pipeline Reconfigurable FPGA. FCCM Matthew Moe, Herman Schmit, Seth Copen Goldstein
1998	A	`conf`	Managing Pipeline-Reconfigurable FPGAs. FPGA Srihari Cadambi, Jeffrey Weener, Seth Copen Goldstein, Herman Schmit, Donald E. Thomas
1997	Misc	`conf`	Incremental reconfiguration for pipelined applications. FCCM Herman Schmit
1997	A	`conf`	Is Reconfigurable Computing Commercially Viable (panel)? FPGA Herman Schmit
1997	J	`jnl`	Synthesis of application-specific memory designs. IEEE Trans. Very Large Scale Integr. Syst. Herman Schmit, Donald E. Thomas
1995	A	`conf`	Address generation for memories containing multiple arrays. ICCAD Herman Schmit, Donald E. Thomas
1995	—	`conf`	Array mapping in behavioral synthesis. ISSS Herman Schmit, Donald E. Thomas
1995	Misc	`conf`	Hidden Markov modeling and fuzzy controllers in FPGAs. FCCM Herman Schmit, Donald E. Thomas
1993	J	`jnl`	A Model and Methodology for Hardware-Software Codesign. IEEE Des. Test Comput. Donald E. Thomas, Jay K. Adams, Herman Schmit