Herbert Grünbacher

15 papers B 5C 1Journal 2Unranked 7
YearRankTypeTitle / Venue / Authors
2004 J jnl
A scalable instruction buffer and align unit for xDSPcore.
IEEE J. Solid State Circuits
Christian Panis, Herbert Grünbacher, Jari Nurmi
2003 — conf
A Branch File for a Configurable DSP Core.
VLSI
Christian Panis, Gunther Laure, Wolfgang Lazian, Herbert Grünbacher, Jari Nurmi
2003 — conf
A scaleable instruction buffer for a configurable DSP core.
ESSCIRC
Christian Panis, Michael Bramberger, Herbert Grünbacher, Jari Nurmi
2003 — conf
xICU - in interrupt control unit for a configurable DSP core.
SoC
Christian Panis, J. Hohl, Herbert Grünbacher, Jari Nurmi
2003 — conf
xLIW - a scaleable long instruction word.
ISCAS (5)
Christian Panis, Raimund Leitner, Herbert Grünbacher, Jari Nurmi
2002 C conf
TTA-C2, A Single Chip Communication Controller for the Time-Triggered-Protocol.
ICCD
Manfred Ley, Herbert Grünbacher
2000 B conf
Fast Carrier and Phase Synchronization Units for Digital Receivers Based on Re-configurable Logic.
FPL
Alfred Blaickner, O. Nagy, Herbert Grünbacher
2000 B ed.
Field-Programmable Logic and Applications, The Roadmap to Reconfigurable Computing, 10th International Workshop, FPL 2000, Villach, Austria, August 27-30, 2000, Proceedings
FPL
Reiner W. Hartenstein, Herbert Grünbacher
2000 J jnl
On re-configurable methods and gate array based solutions of fast forward error correction systems for software radio and set-top-box applications.
IEEE Trans. Consumer Electron.
Alfred Blaickner, Herbert Grünbacher
1996 — conf
WinDLX and MIPSim Pipeline Simulators for Teaching Computer Architecture.
ECBS
Herbert Grünbacher, Maziar Khosravipour
1995 B conf
VHDL-Based Rapid Hardware Prototyping Using FPGA Technology.
FPL
Maziar Khosravipour, Herbert Grünbacher
1993 B ed.
Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping, Second International Workshop on Field-Programmable Logic and Applications, Vienna, Austria, August 31 - September 2, 1992, Selected Papers
FPL
Herbert Grünbacher, Reiner W. Hartenstein
1993 — conf
Petri Nets Modeling in Pipelined Microprocessor Design.
Application and Theory of Petri Nets
Qian Zhang, Herbert Grünbacher
1992 B conf
JAPROC - An 8 bit Micro Controller Design and Its Test Environment.
FPL
Herbert Grünbacher, Alexander Jaud
1988 — conf
Methoden der VLSI-Implementierungen für Graphikanwendungen.
Austrographics
Herbert Grünbacher