Hasnain Lakdawala

38 papers Journal 12Unranked 26

Year	Rank	Type	Title / Venue / Authors
2019	—	`conf`	Analog/Mixed-Signal Design Challenges in 7-nm CMOS and Beyond. CICC Alvin Leng Sun Loke, Da Yang, Tin Tin Wee, Jonathan L. Holland, Patrick Isakanian, Kern Rim, Sam Yang, Jacob S. Schneider, Giri Nallapati, Sreeker Dundigal, Hasnain Lakdawala, Behnam Amelifard, Chulkyu Lee, Betty McGovern, Paul S. Holdaway, Xiaohua Kong, Burton M. Leary
2018	—	`conf`	Analog/mixed-signal design challenges in 7-nm CMOS and beyond. CICC Alvin Leng Sun Loke, Da Yang, Tin Tin Wee, Jonathan L. Holland, Patrick Isakanian, Kern Rim, Sam Yang, Jacob S. Schneider, Giri Nallapati, Sreeker Dundigal, Hasnain Lakdawala, Behnam Amelifard, Chulkyu Lee, Betty McGovern, Paul S. Holdaway, Xiaohua Kong, Burton M. Leary
2015	J	`jnl`	A 1.2 V 2.64 GS/s 8 bit 39 mW Skew-Tolerant Time-interleaved SAR ADC in 40 nm Digital LP CMOS for 60 GHz WLAN. IEEE Trans. Circuits Syst. I Regul. Pap. Sandipan Kundu, Erkan Alpman, Julia Hsin-Lin Lu, Hasnain Lakdawala, Jeyanandh Paramesh, Byunghoo Jung, Sarit Zur, Eshel Gordon
2014	—	`conf`	A 1.2 V 2.64 GS/s 8bit 39 mW skew-tolerant time-interleaved SAR ADC in 40 nm digital LP CMOS for 60 GHz WLAN. CICC Sandipan Kundu, Julia Hsin-Lin Lu, Erkan Alpman, Hasnain Lakdawala, Jeyanandh Paramesh, Byunghoo Jung, Sarit Zur, Eshel Gordon
2013	J	`jnl`	A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver. IEEE J. Solid State Circuits Hasnain Lakdawala, Mark Schaecher, Chang-Tsung Fu, Rahul Dilip Limaye, Jon Duster, Yulin Tan, Ajay Balankutty, Erkan Alpman, Chun C. Lee, Khoa Minh Nguyen, Hyung-Jin Lee, Ashoke Ravi, Satoshi Suzuki, Brent R. Carlton, Hyung Seok Kim, Marian Verhelst, Stefano Pellerano, Tong Kim, Satish Venkatesan, Durgesh Srivastava, Peter Vandervoorn, Jad Rizk, Chia-Hong Jan, Sunder Ramamurthy, Raj Yavatkar, Krishnamurthy Soumyanath
2013	J	`jnl`	A Programmable Calibration/BIST Engine for RF and Analog Blocks in SoCs Integrated in a 32 nm CMOS WiFi Transceiver. IEEE J. Solid State Circuits Jorge Carballido, Jorge Hermosillo, Arturo Veloz-Guerrero, David Arditti, Alberto Del Rio, Edgar Borrayo Sandoval, Manuel E. Guzman-Renteria, Hasnain Lakdawala, Marian Verhelst
2013	—	`conf`	Analog techniques II. CICC Hasnain Lakdawala, Eric Naviasky
2013	J	`jnl`	Introduction to the Special Issue on the IEEE 2012 Custom Integrated Circuits Conference. IEEE J. Solid State Circuits Ken Suyama, Hasnain Lakdawala
2013	—	`conf`	Oversampled ADC's. CICC Eric Naviasky, Hasnain Lakdawala
2012	—	`conf`	32nm x86 OS-compliant PC on-chip with dual-core Atom® processor and RF WiFi transceiver. ISSCC Hasnain Lakdawala, Mark Schaecher, Chang-Tsung Fu, Rahul Dilip Limaye, Jon Duster, Yulin Tan, Ajay Balankutty, Erkan Alpman, Chun C. Lee, Satoshi Suzuki, Brent R. Carlton, Hyung Seok Kim, Marian Verhelst, Stefano Pellerano, Tong Kim, Durgesh Srivastava, Satish Venkatesan, Hyung-Jin Lee, Peter Vandervoorn, Jad Rizk, Chia-Hong Jan, Krishnamurthy Soumyanath, Sunder Ramamurthy
2012	J	`jnl`	A 0.8-2 GHz Fully-Integrated QPLL-Timed Direct-RF-Sampling Bandpass ΣΔ ADC in 0.13 µm CMOS. IEEE J. Solid State Circuits Subhanshu Gupta, Daibashish Gangopadhyay, Hasnain Lakdawala, Jacques Christophe Rudell, David J. Allstot
2012	J	`jnl`	A 2.4-GHz 20-40-MHz Channel WLAN Digital Outphasing Transmitter Utilizing a Delay-Based Wideband Phase Modulator in 32-nm CMOS. IEEE J. Solid State Circuits Ashoke Ravi, Paolo Madoglio, Hongtao Xu, Kailash Chandrashekar, Marian Verhelst, Stefano Pellerano, Luis Cuellar, Mariano Aguirre-Hernandez, Masoud Sajadieh, J. E. Zarate-Roldan, Ofir Bochobza-Degani, Hasnain Lakdawala, Yorgos Palaskas
2012	—	`conf`	A 2.4GHz WLAN transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm T/R switch, 240MS/s DAC, 320MS/s ADC, and DPLL in 32nm SoC CMOS. VLSIC Yulin Tan, Jon Duster, Chang-Tsung Fu, Erkan Alpman, Ajay Balankutty, Chun C. Lee, Ashoke Ravi, Stefano Pellerano, Kailash Chandrashekar, Hyung Seok Kim, Brent R. Carlton, Satoshi Suzuki, M. Shafi, Yorgos Palaskas, Hasnain Lakdawala
2012	—	`conf`	A 20dBm 2.4GHz digital outphasing transmitter for WLAN application in 32nm CMOS. ISSCC Paolo Madoglio, Ashoke Ravi, Hongtao Xu, Kailash Chandrashekar, Marian Verhelst, Stefano Pellerano, Luis Cuellar, Mariano Aguirre, Masoud Sajadieh, Ofir B. Degani, Hasnain Lakdawala, Yorgos Palaskas
2012	J	`jnl`	A Transformer-Combined 31.5 dBm Outphasing Power Amplifier in 45 nm LP CMOS With Dynamic Power Control for Back-Off Power Efficiency Enhancement. IEEE J. Solid State Circuits Wei Tai, Hongtao Xu, Ashoke Ravi, Hasnain Lakdawala, Ofir B. Degani, L. Richard Carley, Yorgos Palaskas
2012	—	`conf`	A programmable calibration/BIST engine for RF/analog blocks in SoCs. ESSCIRC Jorge Hermosillo, Jorge Carballido, Arturo Veloz-Guerrero, David Arditti, Alberto Del Rio, Edgar Borrayo Sandoval, Manuel E. Guzman-Renteria, Hasnain Lakdawala, Marian Verhelst
2012	—	`conf`	A reconfigurable distributed all-digital clock generator core with SSC and skew correction in 22nm high-k tri-gate LP CMOS. ISSCC Y. William Li, Carlos Ornelas, Hyung Seok Kim, Hasnain Lakdawala, Ashoke Ravi, Krishnamurthy Soumyanath
2012	J	`jnl`	Introduction to the Special Issue on the IEEE 2011 Custom Integrated Circuits Conference. IEEE J. Solid State Circuits Hasnain Lakdawala, Alvin Leng Sun Loke
2011	—	`conf`	A 2.5GHz 32nm 0.35mm ISSCC Chang-Tsung Fu, Hasnain Lakdawala, Stewart S. Taylor, Krishnamurthy Soumyanath
2011	—	`conf`	A 31.5dBm outphasing class-D power amplifier in 45nm CMOS with back-off efficiency enhancement by dynamic power control. ESSCIRC Wei Tai, Hongtao Xu, Ashoke Ravi, Hasnain Lakdawala, Ofir B. Degani, L. Richard Carley, Yorgos Palaskas
2011	—	`conf`	A flip-chip-packaged 1.8V 28dBm class-AB power amplifier with shielded concentric transformers in 32nm SoC CMOS. ISSCC Yulin Tan, Hongtao Xu, Mohammed A. El-Tanani, Stewart S. Taylor, Hasnain Lakdawala
2011	—	`conf`	Smart integrated temperature sensor - mixed-signal circuits and systems in 32-nm and beyond. CICC Y. William Li, Hasnain Lakdawala
2010	—	`conf`	An in-situ temperature-sensing interface based on a SAR ADC in 45nm LP digital CMOS for the frequency-temperature compensation of crystal oscillators. ISSCC Zhenning Wang, Richard Lin, Eshel Gordon, Hasnain Lakdawala, L. Richard Carley, Jonathan C. Jensen
2009	J	`jnl`	A 1.05 V 1.6 mW, 0.45°C 3σ Resolution ΣΔ Based Temperature Sensor With Parasitic Resistance Compensation in 32 nm Digital CMOS Process. IEEE J. Solid State Circuits Hasnain Lakdawala, Y. William Li, Arijit Raychowdhury, Greg Taylor, Krishnamurthy Soumyanath
2009	—	`conf`	A 1.05V 1.6mW 0.45°C 3σ-resolution ΔΣ-based temperature sensor with parasitic-resistance compensation in 32nm CMOS. ISSCC Y. William Li, Hasnain Lakdawala, Arijit Raychowdhury, Greg Taylor, Krishnamurthy Soumyanath
2009	—	`conf`	A 1.1V 50mW 2.5GS/s 7b Time-Interleaved C-2C SAR ADC in 45nm LP digital CMOS. ISSCC Erkan Alpman, Hasnain Lakdawala, L. Richard Carley, Krishnamurthy Soumyanath
2009	—	`conf`	A 630μW zero-crossing-based ΔΣ ADC using switched-resistor current sources in 45nm CMOS. CICC Tawfiq Musah, Sunwoo Kwon, Hasnain Lakdawala, Krishnamurthy Soumyanath, Un-Ku Moon
2009	J	`jnl`	A Class-E PA With Pulse-Width and Pulse-Position Modulation in 65 nm CMOS. IEEE J. Solid State Circuits Jeffrey S. Walling, Hasnain Lakdawala, Yorgos Palaskas, Ashoke Ravi, Ofir Degani, Krishnamurthy Soumyanath, David J. Allstot
2009	—	`conf`	MEMS, biomedicals, and sensors. CICC Hasnain Lakdawala, Kenneth Szajda
2008	—	`conf`	A 1.7-GHz 1.5-mW digitally-controlled FBAR oscillator with 0.03-ppb resolution. ESSCIRC Hiroyuki Ito, Hasnain Lakdawala, Ashoke Ravi, Stefano Pellerano, Rick Ruby, Krishnamurthy Soumyanath, Kazuya Masu
2008	—	`conf`	A 28.6dBm 65nm Class-E PA with Envelope Restoration by Pulse-Width and Pulse-Position Modulation. ISSCC Jeffrey S. Walling, Hasnain Lakdawala, Yorgos Palaskas, Ashoke Ravi, Ofir Degani, Krishnamurthy Soumyanath, David J. Allstot
2008	—	`conf`	A 28mW Spectrum-Sensing Reconfigurable 20MHz 72dB-SNR 70dB-SNDR DT ΔΣ ADC for 802.11n/WiMAX Receivers. ISSCC Pukar Malla, Hasnain Lakdawala, Kevin T. Kornegay, Krishnamurthy Soumyanath
2008	—	`conf`	A 3.6GHz, 16mW ΣΔ DAC for a 802.11n / 802.16e transmitter with 30dB digital power control in 90nm CMOS. ESSCIRC Parmoon Seddighrad, Ashoke Ravi, Masoud Sajadieh, Hasnain Lakdawala, Krishnamurthy Soumyanath
2006	J	`jnl`	A 5-GHz 20-dBm Power Amplifier With Digitally Assisted AM-PM Correction in a 90-nm CMOS Process. IEEE J. Solid State Circuits Yorgos Palaskas, Stewart S. Taylor, Stefano Pellerano, Ian A. Rippke, Ralph E. Bishop, Ashoke Ravi, Hasnain Lakdawala, Krishnamurthy Soumyanath
2005	—	`conf`	A 0.5 mm CICC Sitaraman V. Iyer, Hasnain Lakdawala, Rajarishi S. Sinha, Eric J. Zacherl, Richard T. Unetich, Daniel M. Gaugel, David F. Guillou, L. Richard Carley
2005	—	`conf`	A 5 GHz class-AB power amplifier in 90 nm CMOS with digitally-assisted AM-PM correction. CICC Yorgos Palaskas, Stewart S. Taylor, Stefano Pellerano, Ian A. Rippke, Ralph E. Bishop, Ashoke Ravi, Hasnain Lakdawala, Krishnamurthy Soumyanath
2002	J	`jnl`	Micromachined high-Q inductors in a 0.18-μm copper interconnect low-k dielectric CMOS process. IEEE J. Solid State Circuits Hasnain Lakdawala, Xu Zhu, Hao Luo, Suresh Santhanam, L. Richard Carley, Gary K. Fedder
2001	—	`conf`	Micromachined high-Q inductors in 0.18 μm Cu interconnect low-K CMOS. CICC Hasnain Lakdawala, Xu Zhu, Hao Luo, Suresh Santhanam, L. Rick Carley, Gary K. Fedder