Haruo Kobayashi

191 papers A 8C 2Misc 8Journal 54Unranked 119

Year	Rank	Type	Title / Venue / Authors
2025	A	`conf`	A 10ps-Order Flexible Resolution Time-to-Digital Converter with Linearity Calibration and Legacy FPGA. DATE Kentaroh Katoh, Toru Nakura, Haruo Kobayashi
2025	A	`conf`	High Reliability Delay-Based Weak FPGA PUF Using High-Resolution Stochastic Delay Measurement With Phase Locked Loops. ITC Kentaroh Katoh, Toru Nakura, Haruo Kobayashi
2024	—	`conf`	Asynchronous SAR ADC with Parallel Comparators Inspired by Hopfield Network. ISPACS Keita Noda, Hao San, Xueyan Bai, Shogo Katayama, Dan Yao, Anna Kuwana, Zifei Xu, Haruo Kobayashi
2024	—	`conf`	Bit-Serial DAC With Positive and Negative Polarity Output Using Switched Capacitor Circuit. ISPACS Nobukazu Tsukiji, Eito Minami, Lengkhang Nengvang, Jianglin Wei, Shogo Katayama, Anna Kuwana, Haruo Kobayashi
2024	J	`jnl`	How the Author's Group Came Up with Ideas in Analog/Mixed-Signal Circuit and System Area. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Haruo Kobayashi
2024	Misc	`conf`	Innovative Practices Session at VLSI Test Symposium 2024: Analog Testing Technologies for Digital Exploding Society. VTS Haruo Kobayashi, Naoki Tsukahara, Keno Sato, Takashi Oshima
2023	—	`conf`	A Physically Unclonable Function Using Time-to-Digital Converter with Linearity Self-Calibration and its FPGA Implementation. ITC-Asia Kentaroh Katoh, Shuhei Yamamoto, Zheming Zhao, Yujie Zhao, Shogo Katayama, Anna Kuwana, Takayuki Nakatani, Kazumi Hatayama, Haruo Kobayashi, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa
2023	—	`conf`	Back to the Analog Neural Network and Linear Circuit Theory. ASICON Haruo Kobayashi, Manato Hirai, Kakeru Otomo, Shogo Katayama, Xueyan Bai, Masashi Chiba, Zifei Xu, Dan Yao, Lengkhang Nengvang, Minh Tri Tran, Kanji Yoshihiro, Anna Kuwana, Takato Ooide, Hiroshi Tanimoto, Yuji Gendai, Jianglin Wei
2023	A	`conf`	Low Distortion Sinusoidal Signal Generator with Harmonics Cancellation Using Two Types of Digital Predistortion. ITC Keno Sato, Takayuki Nakatani, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Shogo Katayama, Daisuke Iimori, Misaki Takagi, Yujie Zhao, Shuhei Yamamoto, Anna Kuwana, Kentaroh Katoh, Kazumi Hatayama, Haruo Kobayashi
2023	J	`jnl`	Low distortion sine wave generator with simple harmonics cancellation circuit and filter for analog device testing. IEICE Electron. Express Shogo Katayama, Takayuki Nakatani, Daisuke Iimori, Misaki Takagi, Yujie Zhao, Anna Kuwana, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Kentaroh Katoh, Kazumi Hatayama, Haruo Kobayashi
2023	J	`jnl`	Relaxation DAC with positive and negative polarity output using high-pass filter. IEICE Electron. Express Lengkhang Nengvang, Shogo Katayama, Anna Kuwana, Kazufumi Naganuma, Kiyoshi Sasai, Akihisa Iikura, Akira Asao, Takuya Watanabe, Katsuaki Morishita, Haruo Kobayashi
2023	—	`conf`	Signal Generation Technologies for Analog/Mixed-Signal IC Testing. ASICON Haruo Kobayashi
2022	J	`jnl`	Asynchronous capacitive SAR ADC based on Hopfield network. IEICE Electron. Express Xueyan Bai, Shogo Katayama, Dan Yao, Anna Kuwana, Zifei Xu, Haruo Kobayashi
2022	—	`conf`	High Precision Voltage Measurement System Utilizing Low-End ATE Resource and BOST. ATS Keno Sato, Takayuki Nakatani, Shogo Katayama, Daisuke Iimori, Gaku Ogihara, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Yujie Zhao, Kentaroh Katoh, Anna Kuwana, Kazumi Hatayama, Haruo Kobayashi
2022	J	`jnl`	IEEE754 Binary32 Floating-Point Logarithmic Algorithms Based on Taylor-Series Expansion with Mantissa Region Conversion and Division. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Jianglin Wei, Anna Kuwana, Haruo Kobayashi, Kazuyoshi Kubo
2022	Misc	`conf`	Innovative Practices Track: Innovative Analog Circuit Testing Technologies. VTS Chris Mangelsdorf, Manasa Madhvaraj, Salvador Mir, Manuel J. Barragán, Daisuke Iimori, Takayuki Nakatani, Shogo Katayama, Gaku Ogihara, Yujie Zhao, Jianglin Wei, Anna Kuwana, Kentaroh Katoh, Kazumi Hatayama, Haruo Kobayashi, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa
2022	—	`conf`	Low Switching Loss Dual RESURF 40 V N-LDMOS with Grounded Field Plate for DC-DC Converters. MWSCAS Hao Yang Du, Jun-Ichi Matsuda, Anna Kuwana, Haruo Kobayashi
2022	—	`conf`	Notch Frequency Generation Methods in Noise Spread Spectrum for Pulse Coding Switching DC-DC Converter. LASCAS Gui-Yi Dong, Shogo Katayama, Yifei Sun, Yasunori Kobori, Anna Kuwana, Haruo Kobayashi
2022	J	`jnl`	Revisit to Histogram Method for ADC Linearity Test: Examination of Input Signal and Ratio of Input and Sampling Frequencies. J. Electron. Test. Yujie Zhao, Kentaroh Katoh, Anna Kuwana, Shogo Katayama, Jianglin Wei, Haruo Kobayashi, Takayuki Nakatani, Kazumi Hatayama, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa
2022	J	`jnl`	Unit cell mismatch scrambling method for high-resolution unary DAC based on virtual 3D layout. IEICE Electron. Express Dan Yao, Xuanyan Bai, Shogo Katayama, Anna Kuwana, Kazuyuki Kawauchi, Haruo Kobayashi, Kouji Hirai, Akira Suzuki, Satoshi Yamada, Tomoyuki Kato, Ritsuko Kitakoga, Takeshi Shimamura, Gopal Adhikari, Nobuto Ono, Kazuhiro Miura, Shigeya Yamaguchi
2021	—	`conf`	Adaptive Convergence Method of Notch Frequency in Noise Spread Spectrum for Pulse Coding Switching DC-DC Converter. ASICON Gui-Yi Dong, Shogo Katayama, Yifei Sun, Yasunori Kobori, Anna Kuwana, Haruo Kobayashi
2021	—	`conf`	Analysis of Switching Characteristics of Wide SOA and High Reliability 100 V N-LDMOS Transistor with Dual RESURF and Grounded Field Plate Structure. ASICON Anna Kuwana, Jun-Ichi Matsuda, Haruo Kobayashi
2021	—	`conf`	Application of Residue Sampling to RF/AMS Device Testing. ATS Shogo Katayama, Yudai Abe, Anna Kuwana, Koji Asami, Masahiro Ishida, Ryuya Ohta, Haruo Kobayashi
2021	—	`conf`	Classical Mathematics and Analog/Mixed-Signal IC Design. ASICON Haruo Kobayashi, Xueyan Bai, Yujie Zhao, Shuhei Yamamoto, Dan Yao, Manato Hirai, Jianglin Wei, Shogo Katayama, Anna Kuwana
2021	—	`conf`	Divide and Conquer: Floating-Point Exponential Calculation Based on Taylor-Series Expansion. ASICON Jianglin Wei, Anna Kuwana, Haruo Kobayashi, Kazuyoshi Kubo
2021	—	`conf`	Evaluation of High-Precision Nano-Ampere Current Measurement Method for Mass Production. ICECS Gaku Ogihara, Takayuki Nakatani, Daisuke Iimori, Shogo Katayama, Anna Kuwana, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Yujie Zhao, Jianglin Wei, Kazumi Hatayama, Haruo Kobayashi
2021	J	`jnl`	Floating-Point Inverse Square Root Algorithm Based on Taylor-Series Expansion. IEEE Trans. Circuits Syst. II Express Briefs Jianglin Wei, Anna Kuwana, Haruo Kobayashi, Kazuyoshi Kubo, Yuuki Tanaka
2021	—	`conf`	Floating-Point Square Root Calculation Algorithm Based on Taylor-Series Expansion and Region Division. MWSCAS Jianglin Wei, Anna Kuwana, Haruo Kobayashi, Kazuyoshi Kubo, Yuuki Tanaka
2021	—	`conf`	High Precision Measurement of Sub-Nano Ampere Current in ATE Environment. ATS Keno Sato, Takayuki Nakatani, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Shogo Katayama, Gaku Ogihara, Daisuke Iimori, Yujie Zhao, Jianglin Wei, Anna Kuwana, Kazumi Hatayama, Haruo Kobayashi
2021	—	`conf`	Investigation of Behaviours of Kerwin-Huelsman-Newcomb Filters Using Nichols Charts of Self-Loop Function. MWSCAS Minh Tri Tran, Anna Kuwana, Haruo Kobayashi
2021	C	`conf`	Metallic Ratio Equivalent-Time Sampling: A Highly Efficient Waveform Acquisition Method. IOLTS Shuhei Yamamoto, Yuto Sasaki, Yujie Zhao, Jianglin Wei, Anna Kuwana, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Takayuki Nakatani, Minh Tri Tran, Shogo Katayama, Kazumi Hatayama, Haruo Kobayashi
2021	—	`conf`	Multi-Output SEIPC Multiplied Boost Converter with Exclusive Control. ASICON Yuki Sekine, Shogo Katayama, Yasunori Kobori, Anna Kuwana, Haruo Kobayashi
2021	A	`conf`	Revisit to Accurate ADC Testing with Incoherent Sampling Using Proper Sinusoidal Signal and Sampling Frequencies. ITC Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Jianglin Wei, Takayuki Nakatani, Yujie Zhao, Shogo Katayama, Shuhei Yamamoto, Anna Kuwana, Kazumi Hatayama, Haruo Kobayashi
2021	—	`conf`	Study of Behaviors of Motion Models in High-Order Systems. AIIoT Minh Tri Tran, Anna Kuwana, Haruo Kobayashi
2021	—	`conf`	Study of Helix Functions and Multi-Source Rauch Filters. CCWC Minh Tri Tran, Anna Kuwana, Haruo Kobayashi
2021	—	`conf`	Study of Rauch Low-Pass Filters using Pascal's Triangle. ICEIC Minh Tri Tran, Anna Kuwana, Haruo Kobayashi
2021	A	`conf`	Summing Node and False Summing Node Methods: Accurate Operational Amplifier AC Characteristics Testing without Audio Analyzer. ITC Daisuke Iimori, Takayuki Nakatani, Shogo Katayama, Gaku Ogihara, Akemi Hatta, Anna Kuwana, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Jianglin Wei, Yujie Zhao, Minh Tri Tran, Kazumi Hatayama, Haruo Kobayashi
2020	—	`conf`	Accurate Testing of Precision Voltage Reference by DC-AC Conversion. ATS Keno Sato, Takayuki Nakatani, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Anna Kuwana, Kazumi Hatayama, Haruo Kobayashi
2020	J	`jnl`	Activation Modeling and Classification of Voluntary and Imagery Movements From the Prefrontal fNIRS Signals. IEEE Access Md. Asadur Rahman, Mohd Abdur Rashid, Mohiuddin Ahmad, Anna Kuwana, Haruo Kobayashi
2020	—	`conf`	Analysis and Design of Multi-Tone Signal Generation Algorithms for Reducing Crest Factor. ATS Yukiko Shibasaki, Koji Asami, Riho Aoki, Akemi Hatta, Anna Kuwana, Haruo Kobayashi
2020	—	`conf`	Digital-to-Analog Converter Architectures Based on Polygonal and Prime Numbers. ISOCC Yuanyang Du, Xueyan Bai, Manato Hirai, Shuhei Yamamoto, Anna Kuwana, Haruo Kobayashi, Kazuyoshi Kubo
2020	—	`conf`	Improved Nagata Current Source Insensitive to Temperature and Power Supply Voltage. ISOCC Takashi Hosono, Lei Sha, Souma Yamamoto, Mayu Hirano, Takashi Ida, Anna Kuwana, Haruo Kobayashi, Yoichi Moroshima, Hiromichi Harakawa, Takeshi Oikawa
2020	Misc	`conf`	Innovative Test Practices in Asia. VTS Takeshi Iwasaki, Masao Aso, Haruji Futami, Satoshi Matsunaga, Yousuke Miyake, Takaaki Kato, Seiji Kajihara, Yukiya Miura, Smith Lai, Gavin Hung, Harry H. Chen, Haruo Kobayashi, Kazumi Hatayama
2020	—	`conf`	Low Power Loss IGBT Driver Circuit Using Current Drive. ISOCC Yudai Abe, Akio Iwabuchi, Jun-Ichi Matsuda, Anna Kuwana, Takashi Ida, Yukiko Shibasaki, Haruo Kobayashi
2020	—	`conf`	Nonlinearity Analysis of Resistive Ladder-Based Current-Steering Digital-to-Analog Converter. ISOCC Manato Hirai, Hiroshi Tanimoto, Yuji Gendai, Shuhei Yamamoto, Anna Kuwana, Haruo Kobayashi
2020	—	`conf`	Operation and Stability Analysis of Temperature-Insensitive MOS Reference Current Source with Self-Bias Circuit. ISOCC Souma Yamamoto, Kuswan Isam Ebisawa, Yudai Abe, Takashi Ida, Yukiko Shibasaki, Nobukazu Tsukiji, Anna Kuwana, Haruo Kobayashi, Akira Suzuki, Yukichi Todoroki, Toshihiko Kakinoki, Nobuto Ono, Kazuhiro Miura
2020	J	`jnl`	Pulse Coding Controlled Switching Converter that Generates Notch Frequency to Suit Noise Spectrum. IEICE Trans. Commun. Yifei Sun, Yasunori Kobori, Anna Kuwana, Haruo Kobayashi
2020	—	`conf`	Revisit to Floating-Point Division Algorithm Based on Taylor-Series Expansion. APCCAS Jianglin Wei, Anna Kuwana, Haruo Kobayashi, Kazuyoshi Kubo
2020	—	`conf`	Ringing Test for Third-Order Ladder Low-Pass Filters. UEMCON Minh Tri Tran, Anna Kuwana, Haruo Kobayashi
2020	—	`conf`	Simple Reference Voltage Generation Circuit Insensitive to Temperature. ISOCC Lei Sha, Anna Kuwana, Masashi Horiguchi, Haruo Kobayashi
2020	—	`conf`	Study on Crest Factor Controlled Multi-Tone Signal for Analog RF Circuit Testing. ISOCC Yukiko Shibasaki, Koji Asami, Akemi Hatta, Riho Aoki, Anna Kuwana, Haruo Kobayashi
2020	—	`conf`	Summing Node Test Method: Simultaneous Multiple AC Characteristics Testing of Multiple Operational Amplifiers. ATS Gaku Ogihara, Takayuki Nakatani, Akemi Hatta, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Anna Kuwana, Riho Aoki, Shogo Katayama, Jianglin Wei, Yujie Zhao, Jianlong Wang, Kazumi Hatayama, Haruo Kobayashi
2019	—	`conf`	Accurate and Fast Testing Technique of Operational Amplifier DC Offset Voltage in µV-Order by DC-AC Conversion. ITC-Asia Yuto Sasaki, Kosuke Machida, Riho Aoki, Shogo Katayama, Takayuki Nakatani, Jianlong Wang, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Anna Kuwana, Kazumi Hatayama, Haruo Kobayashi
2019	—	`conf`	Analog / Mixed-Signal / RF Circuits for Complex Signal Processing. ASICON Haruo Kobayashi, Nene Kushita, Minh Tri Tran, Koji Asami, Hao San, Anna Kuwana, Akemi Hatta
2019	—	`conf`	Analysis and Evaluation Method of RC Polyphase Filter. ASICON Koji Asami, Nene Kushita, Akemi Hatta, Minh Tri Tran, Yoshiro Tamura, Anna Kuwana, Haruo Kobayashi
2019	—	`conf`	Automatic Correction of Current Imbalance for Multi-Phase COT Ripple-Based Control DC-DC Converter. ASICON Shogo Katayama, Jing Li, Yifei Sun, Minh Tri Tran, Yasunori Kobori, Anna Kuwana, Haruo Kobayashi
2019	—	`conf`	Crest Factor Controlled Multi-Tone Signals for Analog/Mixed-Signal IC Testing. ITC-Asia Yukiko Shibasaki, Koji Asami, Anna Kuwana, Kosuke Machida, Yuanyang Du, Akemi Hatta, Kazuyoshi Kubo, Haruo Kobayashi
2019	J	`jnl`	Design and theoretical analysis of a clock jitter reduction circuit using gated phase blending between self-delayed clock edges. IEICE Electron. Express Kiichi Niitsu, Osamu Kobayashi, Takahiro J. Yamaguchi, Haruo Kobayashi
2019	—	`conf`	EMI Noise Reduction and Output Ripple Cancellation for Full-Wave Type Soft-Switching Converter. ASICON Yifei Sun, Minh Tri Tran, Yasunori Kobori, Anna Kuwana, Haruo Kobayashi
2019	—	`conf`	Evaluation of Null Method for Operational Amplifier Short-Time Testing. ASICON Riho Aoki, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Shogo Katayama, Yuto Sasaki, Kosuke Machida, Takayuki Nakatani, Jianlong Wang, Anna Kuwana, Kazumi Hatayama, Haruo Kobayashi
2019	—	`conf`	Fine Time Resolution TDC Architectures -Integral and Delta-Sigma Types. ASICON Haruo Kobayashi, Kosuke Machida, Yuto Sasaki, Yusuke Osawa, Pengfei Zhang, Lei Sha, Yuki Ozawa, Anna Kuwana
2019	—	`conf`	Flat Pass-Band Method with Two RC Band-Stop Filters for 4-Stage Passive RC Polyphase Filter in Low-IF Receiver Systems. ASICON Minh Tri Tran, Nene Kushita, Anna Kuwana, Haruo Kobayashi
2019	—	`conf`	Frequency Estimation Sampling Circuit Using Analog Hilbert Filter and Residue Number System. ASICON Yudai Abe, Shogo Katayama, Congbing Li, Anna Kuwana, Haruo Kobayashi
2019	—	`conf`	Graphene Biosensor for Saliva Protein Adsorption. ASICON Shiyu Wang, Md. Zakir Hossain, Takaaki Suzuki, Kazuo Shinozuka, Natsuhiko Shimizu, Shunya Kitada, Ryo Ichige, Anna Kuwana, Haruo Kobayashi
2019	—	`conf`	High-Resolution Low-Sampling-Rate Δ∑ ADC Linearity Short-Time Testing Algorithm. ASICON Jiang-Lin Wei, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Nene Kushita, Takahiro Arai, Lei Sha, Anna Kuwana, Haruo Kobayashi, Takayuki Nakatani, Kazumi Hatayama, Keno Sato
2019	Misc	`conf`	Innovative Test Practices in Japan. VTS Yusuke Asada, Takahiko Shimizu, Yuji Gendai, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Jiang-Lin Wei, Nene Kushita, Hirotaka Arai, Anna Kuwana, Takayuki Nakatani, Kazumi Hatayama, Haruo Kobayashi
2019	—	`conf`	Minimum Output Ripple and Fixed Operating Frequency Based on Modulation Injection for COT Ripple Control Converter. ASICON Minh Tri Tran, Yifei Sun, Yasunori Kobori, Anna Kuwana, Haruo Kobayashi
2019	—	`conf`	Multi-Phase Full/Half Wave Type Resonant Converters with Automatic Current Balance against Element Variation. ASICON Chen-Hao Zhang, Yifei Sun, Minh Tri Tran, Yasunori Kobori, Anna Kuwana, Haruo Kobayashi
2019	—	`conf`	Optimization of High Reliability and Wide SOA 100 V LDMOS Transistor with Low Specific On-Resistance. ASICON Anna Kuwana, Jun-Ichi Matsuda, Haruo Kobayashi
2019	—	`conf`	Output Voltage Ripple Reduction with Nosie Spread Spectrum for Dual-Phase LLC Resonant Converter. ASICON Shogo Katayama, Noriyuki Oiwa, Yasunori Kobori, Anna Kuwana, Haruo Kobayashi
2019	—	`conf`	Overshoot Cancelation Based on Balanced Charge-Discharge Time Condition for Buck Converter in Mobile Applications. ASICON Minh Tri Tran, Yifei Sun, Yasunori Kobori, Anna Kuwana, Haruo Kobayashi
2019	—	`conf`	Pulse Coding Control Switching Converter with Adjustable Conversion Voltage Ratio Notch Frequency Generation in Noise Spectrum. ASICON Yifei Sun, Minh Tri Tran, Yasunori Kobori, Anna Kuwana, Haruo Kobayashi
2019	—	`conf`	Systematic Construction of Resistor Ladder Network for N-ary DACs. ASICON Manato Hirai, Shuhei Yamamoto, Hirotaka Arai, Anna Kuwana, Hiroshi Tanimoto, Yuji Gendai, Haruo Kobayashi
2018	J	`jnl`	A Distortion Shaping Technique to Equalize Intermodulation Distortion Performance of Interpolating Arbitrary Waveform Generators in Automated Test Equipment. J. Electron. Test. Peter Sarson, Tomonori Yanagida, Shohei Shibuya, Kosuke Machida, Haruo Kobayashi
2018	J	`jnl`	A Study on Loop Gain Measurement Method Using Output Impedance in DC-DC Buck Converter. IEICE Trans. Commun. Nobukazu Tsukiji, Yasunori Kobori, Haruo Kobayashi
2018	—	`conf`	Highly Efficient Waveform Acquisition Condition in Equivalent-Time Sampling System. ATS Yuto Sasaki, Yujie Zhao, Anna Kuwana, Haruo Kobayashi
2018	Misc	`conf`	Innovative practices on test in Japan. VTS Koji Asami, Yoshiro Tamura, Haruo Kobayashi, Jun Matsushima, Yoichi Maeda, Kazumi Hatayama
2018	—	`conf`	Low-Distortion One-Tone and Two-Tone Signal Generation Using AWG Over Full Nyquist Region. ITC-Asia Tomonori Yanagida, Shohei Shibuya, Kosuke Machida, Koji Asami, Haruo Kobayashi
2018	—	`conf`	Time-to-Digital Converter Architectures Using Two Oscillators with Different Frequencies. ATS Kosuke Machida, Uni Ozawa, Yudai Abe, Haruo Kobayashi
2017	Misc	`conf`	A technique for dynamic range improvement of intermodulation distortion products for an Interpolating DAC-based Arbitrary Waveform Generator using a phase switching algorithm. VTS Peter Sarson, Shohei Shibuya, Tomonori Yanagida, Haruo Kobayashi
2017	—	`conf`	Architecture of high performance successive approximation time digitizer. ISPACS Takashi Ida, Yuki Ozawa, Jiang Richen, Shotaro Sakurai, Seiya Takigami, Nobukazu Tsukiji, Hirotaka Arai, Ryoji Shiota, Haruo Kobayashi
2017	—	`conf`	Constant on-time controlled four-phase buck converter via two ways of saw-tooth-wave circuit and PLL circuit. ISPACS Yi Xiong, Koyo Asaishi, Natsuko Milli, Yifei Sun, Nobukazu Tsukiji, Yasunori Kobori, Haruo Kobayashi
2017	—	`conf`	DAC linearity improvement with layout technique using magic and latin squares. ISPACS Dan Yao, Yifei Sun, Masashi Higashino, Shaiful Nizam Bin Mohyar, Tomonori Yanagida, Takuya Arafune, Nobukazu Tsukiji, Haruo Kobayashi
2017	—	`conf`	Delay-time suppression technique for DC/DC buck converter using voltage mode PWM control. ISPACS Manimel Wadu Sahan Dulara, Nobukazu Tsukiji, Yasunori Kobori, Koyo Asaishi, Nobukazu Takai, Haruo Kobayashi
2017	—	`conf`	Equivalence between Nyquist and Routh-Hurwitz stability criteria for operational amplifier design. ISPACS Jianlong Wang, Gopal Adhikari, Nobukazu Tsukiji, Mayu Hirano, Haruo Kobayashi, Keita Kurihara, Akihito Nagahama, Ippei Noda, Kohji Yoshii
2017	—	`conf`	Estimation of circuit component values in buck converter using efficiency curve. ISPACS Shotaro Sakurai, Nobukazu Tsukiji, Yasunori Kobori, Haruo Kobayashi
2017	—	`conf`	Fibonacci sequence weighted SAR ADC as golden section search. ISPACS Hirotaka Arai, Takuya Arafune, Shohei Shibuya, Yutaro Kobayashi, Koji Asami, Haruo Kobayashi
2017	—	`conf`	Fundamental design tradeoff and performance limitation of electronic circuits based on uncertainty relationships. ASICON Haruo Kobayashi, Isao Shimizu, Nobukazu Tsukiji, Miho Arai, Kazuyoshi Kubo, Hitoshi Aoki
2017	—	`conf`	Gray-code input DAC architecture for clean signal generation. ISPACS Richen Jiang, Gopal Adhikari, Yifei Sun, Dan Yao, Rino Takahashi, Yuki Ozawa, Nobukazu Tsukiji, Haruo Kobayashi, Ryoji Shiota
2017	—	`conf`	Low-distortion signal generation for analog/mixed-signal circuit testing with digital ATE. ITC-Asia Masayuki Kawabata, Koji Asami, Shohei Shibuya, Tomonori Yanagida, Haruo Kobayashi
2017	—	`conf`	Noise spread spectrum with adjustable notch frequency in complex pulse coding controlled DC-DC converters. ISPACS Yasunori Kobori, Nobukazu Tsukiji, Takuya Arafune, Manimel Wadu Sahan, Dulara Yifei Sun, Nobukazu Takai, Haruo Kobayashi
2017	—	`conf`	SAR TDC Architecture with Self-Calibration Employing Trigger Circuit. ATS Yuki Ozawa, Takashi Ida, Richen Jiang, Shotaro Sakurai, Seiya Takigami, Nobukazu Tsukiji, Ryoji Shiota, Haruo Kobayashi
2017	—	`conf`	SAR TDC architecture for one-shot timing measurement with full digital implementation. ISPACS Yuki Ozawa, Takashi Ida, Shotaro Sakurai, Richen Jiang, Rino Takahashi, Haruo Kobayashi, Ryoji Shiota
2017	—	`conf`	Study of jitter generators for high-speed I/O interface jitter tolerance testing. ISPACS Yuki Ozawa, Takuya Arafune, Nobukazu Tsukiji, Haruo Kobayashi, Ryoji Shiota
2017	—	`conf`	Study of multistage digital oscilloscope trigger circuit. ISPACS Shotaro Sakurai, Seiya Takigami, Takashi Ida, Yuki Ozawa, Nobukazu Tsukiji, Yasunori Kobori, Haruo Kobayashi, Ryoji Shiota
2017	—	`conf`	Two-phase soft-switching DC-DC converter with voltage-mode resonant switch. ISPACS Yi Xiong, Yifei Sun, Nobukazu Tsukiji, Yasunori Kobori, Haruo Kobayashi
2017	J	`jnl`	Using Distortion Shaping Technique to Equalize ADC THD Performance Between ATEs. J. Electron. Test. Peter Sarson, Haruo Kobayashi
2016	A	`conf`	I-Q signal generation techniques for communication IC testing and ATE systems. ITC Masahiro Murakami, Haruo Kobayashi, Shaiful Nizam Bin Mohyar, Osamu Kobayashi, Takahiro Miki, Junya Kojima
2016	—	`conf`	Rectangular Waveform Generation with Harmonics Suppression. ATS Masayuki Kawabata, Koji Asami, Shohei Shibuya, Tomonori Yanagida, Haruo Kobayashi
2015	J	`jnl`	A CMOS PWM Transceiver Using Self-Referenced Edge Detection. IEEE Trans. Very Large Scale Integr. Syst. Kiichi Niitsu, Yusuke Osawa, Naohiro Harigai, Daiki Hirabayashi, Osamu Kobayashi, Takahiro J. Yamaguchi, Haruo Kobayashi
2015	—	`conf`	A study on HCI induced gate leakage current model used for reliability simulations in 90nm n-MOSFETs. ASICON Nobukazu Tsukiji, Hitoshi Aoki, Masaki Kazumi, Takuya Totsuka, Masashi Higashino, Haruo Kobayashi
2015	—	`conf`	Automatic design of doubly-terminated RC polyphase filters by using distributed genetic algorithm. ASICON Yoshiki Sugawara, Nobukazu Takai, Masato Kato, Hiroaki Seki, Kento Suzuki, Haruo Kobayashi
2015	—	`conf`	Comparator circuits automation by combination of distributed genetic algorithm and HSPICE optimization. ASICON Kento Suzuki, Nobukazu Takai, Masato Kato, Hiroaki Seki, Yoshiki Sugawara, Haruo Kobayashi
2015	—	`conf`	EMI reduction by analog noise spread spectrum in new ripple controlled converter. ASICON Yasunori Kobori, Taifeng Wang, Nobukazu Tsukiji, Nobukazu Takai, Haruo Kobayashi
2015	J	`jnl`	Erratum to: A Small Chip Area Stochastic Calibration for TDC Using Ring Oscillator. J. Electron. Test. Kentaroh Katoh, Yutaro Kobayashi, Takeshi Chujo, Junshan Wang, Ensi Li, Congbing Li, Haruo Kobayashi
2015	—	`conf`	Fibonacci sequence weighted SAR ADC algorithm and its DAC topology. ASICON Takuya Arafune, Yutaro Kobayashi, Shohei Shibuya, Haruo Kobayashi
2015	—	`conf`	Finite aperture time effects in sampling circuit. ASICON Miho Arai, Isao Shimizu, Haruo Kobayashi, Keita Kurihara, Shu Sasaki, Shohei Shibuya, Kiichi Niitsu, Kazuyoshi Kubo
2015	—	`conf`	Flat passband gain design algorithm for 2nd-order RC polyphase filter. ASICON Yoshiki Niki, Shu Sasaki, Nobu Yamaguchi, Jian Kang, Takashi Kitahara, Haruo Kobayashi
2015	—	`conf`	High efficiency single-inductor dual-output DC-DC converter with ZVS-PWM control. ASICON Yoshiki Sunaga, Naoya Shiraishi, Koyo Asaishi, Nobukazu Tsukiji, Yasunori Kobori, Nobukazu Takai, Haruo Kobayashi
2015	—	`conf`	High-frequency low-distortion signal generation algorithm with arbitrary waveform generator. ASICON Shohei Shibuya, Yutaro Kobayashi, Haruo Kobayashi
2015	—	`conf`	Linearity enhancement algorithms for I-Q signal generation - DWA and self-calibration techniques. ASICON Masahiro Murakami, Haruo Kobayashi, Shaiful Nizam Bin Mohyar, Takahiro Miki, Osamu Kobayashi
2015	—	`conf`	SAR ADC design using Golden ratio weight algorithm. ISCIT Yutaro Kobayashi, Shohei Shibuya, Takuya Arafune, Shu Sasaki, Haruo Kobayashi
2015	—	`conf`	Selectable notch frequencies of EMI spread spectrum using pulse modulation in switching converter. ASICON Yasunori Kobori, Takuya Arafune, Nobukazu Tsukiji, Nobukazu Takai, Haruo Kobayashi
2015	—	`conf`	Study on maximum electric field modeling used for HCI induced degradation characteristic of LDMOS transistors. ASICON Masashi Higashino, Hitoshi Aoki, Nobukazu Tsukiji, Masaki Kazumi, Takuya Totsuka, Haruo Kobayashi
2015	J	`jnl`	Transient Response Improvement of DC-DC Buck Converter by a Slope Adjustable Triangular Wave Generator. IEICE Trans. Commun. Shu Wu, Yasunori Kobori, Nobukazu Tsukiji, Haruo Kobayashi
2014	J	`jnl`	A Small Chip Area Stochastic Calibration for TDC Using Ring Oscillator. J. Electron. Test. Kentaroh Katoh, Yutaro Kobayashi, Takeshi Chujo, Junshan Wang, Ensi Li, Congbing Li, Haruo Kobayashi
2014	J	`jnl`	A low-offset cascaded time amplifier with reconfigurable inter-stage connection. IEICE Electron. Express Kiichi Niitsu, Naohiro Harigai, Takahiro J. Yamaguchi, Haruo Kobayashi
2014	J	`jnl`	Analog/mixed-signal circuit design in nano CMOS era. IEICE Electron. Express Haruo Kobayashi, Hitoshi Aoki, Kentaroh Katoh, Congbing Li
2014	A	`conf`	Low-distortion signal generation for ADC testing. ITC Fumitaka Abe, Yutaro Kobayashi, Kenji Sawada, Keisuke Kato, Osamu Kobayashi, Haruo Kobayashi
2013	J	`jnl`	A Feed-Forward Time Amplifier Using a Phase Detector and Variable Delay Lines. IEICE Trans. Electron. Kiichi Niitsu, Naohiro Harigai, Takahiro J. Yamaguchi, Haruo Kobayashi
2013	—	`conf`	An Analysis of Stochastic Self-Calibration of TDC Using Two Ring Oscillators. Asian Test Symposium Kentaroh Katoh, Yuta Doi, Satoshi Ito, Haruo Kobayashi, Ensi Li, Nobukazu Takai
2013	J	`jnl`	Design methodology for determining the number of stages in a cascaded time amplifier to minimize area consumption. IEICE Electron. Express Kiichi Niitsu, Naohiro Harigai, Haruo Kobayashi
2013	—	`conf`	Design of a clock jitter reduction circuit using gated phase blending between self-delayed clock edges. ASP-DAC Kiichi Niitsu, Naohiro Harigai, Daiki Hirabayashi, Daiki Oki, Masato Sakurai, Osamu Kobayashi, Takahiro J. Yamaguchi, Haruo Kobayashi
2013	—	`conf`	Digital Compensation for Timing Mismatches in Interleaved ADCs. Asian Test Symposium Ru Yi, Minghui Wu, Koji Asami, Haruo Kobayashi, Ramin Khatami, Atsuhiro Katayama, Isao Shimizu, Kentaroh Katoh
2013	J	`jnl`	Multi-bit Sigma-Delta TDC Architecture with Improved Linearity. J. Electron. Test. Satoshi Uemori, Masamichi Ishii, Haruo Kobayashi, Daiki Hirabayashi, Yuta Arakawa, Yuta Doi, Osamu Kobayashi, Tatsuji Matsuura, Kiichi Niitsu, Yuji Yano, Tatsuhiro Gake, Takahiro J. Yamaguchi, Nobukazu Takai
2013	J	`jnl`	Two-Tone Signal Generation for ADC Testing. IEICE Trans. Electron. Keisuke Kato, Fumitaka Abe, Kazuyuki Wakabayashi, Chuan Gao, Takafumi Yamada, Haruo Kobayashi, Osamu Kobayashi, Kiichi Niitsu
2012	—	`conf`	A New Procedure for Measuring High-Accuracy Probability Density Functions. Asian Test Symposium Takahiro J. Yamaguchi, Kunihiro Asada, Kiichi Niitsu, Mohamed Abbas, Satoshi Komatsu, Haruo Kobayashi, Jose A. Moreira
2012	—	`conf`	A clock jitter reduction circuit using gated phase blending between self-delayed clock edges. VLSIC Kiichi Niitsu, Naohiro Harigai, Daiki Hirabayashi, Daiki Oki, Masato Sakurai, Osamu Kobayashi, Takahiro J. Yamaguchi, Haruo Kobayashi
2012	—	`conf`	A reference-free on-chip timing jitter measurement circuit using self-referenced clock and a cascaded time difference amplifier in 65nm CMOS. ASP-DAC Kiichi Niitsu, Masato Sakurai, Naohiro Harigai, Daiki Hirabayashi, Takahiro J. Yamaguchi, Haruo Kobayashi
2012	J	`jnl`	CMOS Circuits to Measure Timing Jitter Using a Self-Referenced Clock and a Cascaded Time Difference Amplifier With Duty-Cycle Compensation. IEEE J. Solid State Circuits Kiichi Niitsu, Masato Sakurai, Naohiro Harigai, Takahiro J. Yamaguchi, Haruo Kobayashi
2012	—	`conf`	DC-DC converter with continuous-time feed-forward Sigma-Delta modulator control. APCCAS Hong Gao, Lin Xing, Yasunori Kobori, Feng Zhao, Haruo Kobayashi, Shyunsuke Miwa, Atsushi Motozawa, Zachary Nosker, Kiichi Niitsu, Nobukazu Takai, Takahiro Odaguchi, Isao Nakanishi, Kenji Nemoto, Jun-Ichi Matsuda
2012	—	`conf`	Digitally-controlled Gm-C bandpass filter. APCCAS Guanglei Jin, Hao Chen, Chuan Gao, Yunpeng Zhang, Haruo Kobayashi, Nobukazu Takai, Kiichi Niitsu, Khayrollah Hadidi
2012	J	`jnl`	Low-Distortion Sinewave Generation Method Using Arbitrary Waveform Generator. J. Electron. Test. Kazuyuki Wakabayashi, Keisuke Kato, Takafumi Yamada, Osamu Kobayashi, Haruo Kobayashi, Fumitaka Abe, Kiichi Niitsu
2012	—	`conf`	Multi-bit sigma-delta TDC architecture with self-calibration. APCCAS Satoshi Uemori, Masamichi Ishii, Haruo Kobayashi, Yuta Doi, Osamu Kobayashi, Tatsuji Matsuura, Kiichi Niitsu, Yuta Arakawa, Daiki Hirabayashi, Yuji Yano, Tatsuhiro Gake, Nobukazu Takai, Takahiro J. Yamaguchi
2012	—	`conf`	Post-Silicon Jitter Measurements. Asian Test Symposium Kiichi Niitsu, Takahiro J. Yamaguchi, Masahiro Ishida, Haruo Kobayashi
2012	—	`conf`	Single inductor dual output DC-DC converter design with exclusive control. APCCAS Yasunori Kobori, Qiulin Zhu, Murong Li, Feng Zhao, Zachary Nosker, Shu Wu, Shaiful N. Mohyar, Masanori Onozawa, Haruo Kobayashi, Nobukazu Takai, Kiichi Niitsu, Takahiro Odaguchi, Isao Nakanishi, Kenji Nemoto, Jun-Ichi Matsuda, Asahi Kasei
2012	—	`conf`	Two-Tone Signal Generation for Communication Application ADC Testing. Asian Test Symposium Keisuke Kato, Fumitaka Abe, Kazuyuki Wakabayashi, Chuan Gao, Takafumi Yamada, Haruo Kobayashi, Osamu Kobayashi, Kiichi Niitsu
2011	—	`conf`	An on-chip timing jitter measurement circuit using a self-referenced clock and a cascaded time difference amplifier with duty-cycle compensation. A-SSCC Kiichi Niitsu, Masato Sakurai, Naohiro Harigai, Takahiro J. Yamaguchi, Haruo Kobayashi
2011	—	`conf`	Analysis of jitter accumulation in interleaved phase frequency detectors for high-accuracy on-chip jitter measurements. ISOCC Masato Sakurai, Kiichi Niitsu, Naohiro Harigai, Daiki Hirabayashi, Daiki Oki, Takahiro J. Yamaguchi, Haruo Kobayashi
2011	J	`jnl`	Background Self-Calibration Algorithm for Pipelined ADC Using Split ADC Scheme. IEICE Trans. Electron. Takuya Yagi, Kunihiko Usui, Tatsuji Matsuura, Satoshi Uemori, Satoshi Ito, Yohei Tan, Haruo Kobayashi
2011	J	`jnl`	Design for Testability That Reduces Linearity Testing Time of SAR ADCs. IEICE Trans. Electron. Tomohiko Ogawa, Haruo Kobayashi, Satoshi Uemori, Yohei Tan, Satoshi Ito, Nobukazu Takai, Takahiro J. Yamaguchi, Kiichi Niitsu
2010	—	`conf`	ADC linearity test signal generation algorithm. APCCAS Satoshi Uemori, Takahiro J. Yamaguchi, Satoshi Ito, Yohei Tan, Haruo Kobayashi, Nobukazu Takai, Kiichi Niitsu, Nobuyoshi Ishikawa
2010	—	`conf`	Background calibration algorithm for pipelined ADC with open-loop residue amplifier using split ADC structure. APCCAS Takuya Yagi, Kunihiko Usui, Tatsuji Matsuura, Satoshi Uemori, Yohei Tan, Satoshi Ito, Haruo Kobayashi
2010	J	`jnl`	Noise-Coupled Image Rejection Architecture of Complex Bandpass DeltaSigmaAD Modulator. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Hao San, Haruo Kobayashi
2010	—	`conf`	Non-binary SAR ADC with digital error correction for low power applications. APCCAS Tomohiko Ogawa, Tatsuji Matsuura, Haruo Kobayashi, Nobukazu Takai, Masao Hotta, Hao San, Akira Abe, Katsuyoshi Yagi, Toshihiko Mori
2010	J	`jnl`	SAR ADC Algorithm with Redundancy and Digital Error Correction. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Tomohiko Ogawa, Haruo Kobayashi, Yosuke Takahashi, Nobukazu Takai, Masao Hotta, Hao San, Tatsuji Matsuura, Akira Abe, Katsuyoshi Yagi, Toshihiko Mori
2010	—	`conf`	SAR ADC that is configurable to optimize yield. APCCAS Tomohiko Ogawa, Haruo Kobayashi, Yohei Tan, Satoshi Ito, Satoshi Uemori, Nobukazu Takai, Kiichi Niitsu, Takahiro J. Yamaguchi, Tatsuji Matsuura, Nobuyoshi Ishikawa
2010	—	`conf`	Single inductor DC-DC converter with bipolar outputs using charge pump. APCCAS Kenji Takahashi, Hajime Yokoo, Shyunsuke Miwa, Kengo Tsushida, Hiroyuki Iwase, Kazuki Murakami, Nobukazu Takai, Haruo Kobayashi, Takahiro Odaguchi, Shigeki Takayama, Isao Fukai, Jun-Ichi Matsuda
2010	—	`conf`	Stochastic TDC architecture with self-calibration. APCCAS Satoshi Ito, Shigeyuki Nishimura, Haruo Kobayashi, Satoshi Uemori, Yohei Tan, Nobukazu Takai, Takahiro J. Yamaguchi, Kiichi Niitsu
2010	A	`conf`	Timing skew compensation technique using digital filter with novel linear phase condition. ITC Koji Asami, Hiroyuki Miyajima, Tsuyoshi Kurosawa, Takenori Tateiwa, Haruo Kobayashi
2009	—	`conf`	A Time-to-Digital Converter with small circuitry. ASP-DAC Kazuya Shimizu, Masato Kaneta, Haijun Lin, Haruo Kobayashi, Nobukazu Takai, Masao Hotta
2009	J	`jnl`	Analysis of Coupled Inductors for Low-Ripple Fast-Response Buck Converter. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Santhos A. Wibowo, Ting Zhang, Masashi Kono, Tetsuya Taura, Yasunori Kobori, Ken-ichi Onda, Haruo Kobayashi
2009	J	`jnl`	Cross-Noise-Coupled Architecture of Complex Bandpass DeltaSigmaAD Modulator. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Hao San, Haruo Kobayashi
2009	J	`jnl`	EMI Reduction by Spread-Spectrum Clocking in Digitally-Controlled DC-DC Converters. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Ibuki Mori, Yoshihisa Yamada, Santhos A. Wibowo, Masashi Kono, Haruo Kobayashi, Yukihiro Fujimura, Nobukazu Takai, Toshio Sugiyama, Isao Fukai, Norihisa Onishi, Ichiro Takeda, Jun-Ichi Matsuda
2009	J	`jnl`	Foreword. IEICE Trans. Electron. Haruo Kobayashi
2009	J	`jnl`	Technique to Improve the Performance of Time-Interleaved A-D Converters with Mismatches of Non-linearity. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Koji Asami, Takahide Suzuki, Hiroyuki Miyajima, Tetsuya Taura, Haruo Kobayashi
2008	—	`conf`	Analysis of coupled inductors for low-ripple fast-response buck converter. APCCAS Santhos Ario Wibowo, Ting Zhang, Masashi Kono, Tetsuya Taura, Yasunori Kobori, Haruo Kobayashi
2008	—	`conf`	High-resolution DPWM generator for digitally controlled DC-DC converters. APCCAS Ibuki Mori, Keigo Kimura, Yoshihisa Yamada, Haruo Kobayashi, Yasunori Kobori, Santhos Ario Wibowo, Kazuya Shimizu, Masashi Kono, Hao San
2008	—	`conf`	New architecture for envelope-tracking power amplifier for base station. APCCAS Akihiro Kanbe, Masato Kaneta, Fuminori Yui, Haruo Kobayashi, Nobukazu Takai, Tatsuhiro Shimura, Hitoshi Hirata, Kentarou Yamagishi
2008	J	`jnl`	Novel Architecture of Feedforward Second-Order Multibit Delta-Sigma-AD Modulator. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Hao San, Hajime Konagaya, Feng Xu, Atsushi Motozawa, Haruo Kobayashi, Kazumasa Ando, Hiroshi Yoshida, Chieto Murayama, Kanichi Miyazawa
2008	—	`conf`	SAR ADC algorithm with redundancy. APCCAS Tomohiko Ogawa, Haruo Kobayashi, Masao Hotta, Yosuke Takahashi, Hao San, Nobukazu Takai
2008	—	`conf`	Technique to Improve the Performance of Time-Interleaved A-D Converters with Mismatches of Non-linearity. ATS Koji Asami, Hidetaka Suzuki, Hiroyuki Miyajima, Tetsuya Taura, Haruo Kobayashi
2008	—	`conf`	ΔΣAD modulator for low power application. APCCAS Hajime Konagaya, Haijun Lin, Hao San, Haruo Kobayashi, Kazumasa Ando, Hiroshi Yoshida, Chieto Murayama, Yukihiro Nisida
2007	—	`conf`	A 2.8-V Multibit Complex Bandpass Delta-Sigma-AD Modulator in 0.18µm CMOS. ASP-DAC Hao San, Yoshitaka Jingu, Hiroki Wada, Hiroyuki Hagiwara, Akira Hayakawa, Haruo Kobayashi, Masao Hotta
2007	J	`jnl`	A Second-Order Multibit Complex Bandpass DeltaSigmaAD Modulator with I, Q Dynamic Matching and DWA Algorithm. IEICE Trans. Electron. Hao San, Yoshitaka Jingu, Hiroki Wada, Hiroyuki Hagiwara, Akira Hayakawa, Haruo Kobayashi, Tatsuji Matsuura, Kouichi Yahagi, Junya Kudoh, Hideo Nakane, Masao Hotta, Toshiro Tsukada, Koichiro Mashiko, Atsushi Wada
2007	J	`jnl`	Total Harmonic Distortion Measurement System of Electronic Devices up to 100 MHz With Remarkable Sensitivity. IEEE Trans. Instrum. Meas. Takanori Komuro, Shingo Sobukawa, Hiroshi Sakayori, Masashi Kono, Haruo Kobayashi
2006	J	`jnl`	A Practical Analog BIST Cooperated with an LSI Tester. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Takanori Komuro, Naoto Hayasaka, Haruo Kobayashi, Hiroshi Sakayori
2006	J	`jnl`	Complex Bandpass DeltaSigmaAD Modulator Architecture without I, Q-Path Crossing Layout. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Hao San, Akira Hayakawa, Yoshitaka Jingu, Hiroki Wada, Hiroyuki Hagiwara, Kazuyuki Kobayashi, Haruo Kobayashi, Tatsuji Matsuura, Kouichi Yahagi, Junya Kudoh, Hideo Nakane, Masao Hotta, Toshiro Tsukada, Koichiro Mashiko, Atsushi Wada
2006	J	`jnl`	High-Speed Continuous-Time Subsampling Bandpass DeltaSigmaAD Modulator Architecture Employing Radio Frequency DAC. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Masafumi Uemori, Haruo Kobayashi, Tomonari Ichikawa, Atsushi Wada, Koichiro Mashiko, Toshiro Tsukada, Masao Hotta
2005	—	`conf`	A practical BIST circuit for analog portion in deep sub-micron CMOS system LSI. ISCAS (5) Takanori Komuro, Naoto Hayasaka, Haruo Kobayashi, Hiroshi Sakayori
2005	J	`jnl`	Reducing Spurious Output of Balanced Modulators by Dynamic Matching of I, Q Quadrature Paths. IEICE Trans. Electron. Jun Otsuki, Hao San, Haruo Kobayashi, Takanori Komuro, Yoshihisa Yamada, Aiyan Liu
2004	Misc	`conf`	An Element Rotation Algorithm for Multi-bit DAC Nonlinearities in Complex Bandpass \Delta\SigmaAD Modulators. VLSI Design Hao San, Haruo Kobayashi, Shinya Kawakami, Nobuyuki Kuroiwa
2003	J	`jnl`	Algorithms for Digital Correction of ADC Nonlinearity. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Haruo Kobayashi, Hiroshi Yagi, Takanori Komuro, Hiroshi Sakayori
2003	J	`jnl`	High-Efficiency Charge-Pump Circuits which Use a 0.5 IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Takao Myono, Tatsuya Suzuki, Akira Uemoto, Shuhei Kawai, Takashi Iijima, Nobuyuki Kuroiwa, Haruo Kobayashi
2003	J	`jnl`	Spread-Spectrum Clocking in Switching Regulators for EMI Reduction. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Takayuki Daimon, Hiroshi Sadamura, Takayuki Shindou, Haruo Kobayashi, Masashi Kono, Takao Myono, Tatsuya Suzuki, Shuhei Kawai, Takashi Iijima
2002	J	`jnl`	A Quasi-Coherent Sampling Method for Wideband Data Acquisition. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Masaru Kimura, Kensuke Kobayashi, Haruo Kobayashi
2002	J	`jnl`	Channel Linearity Mismatch Effects in Time-Interleaved ADC Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Naoki Kurosawa, Haruo Kobayashi, Kensuke Kobayashi
2002	J	`jnl`	Sampling Jitter and Finite Aperture Time Effects in Wideband Data Acquisition Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Haruo Kobayashi, Kensuke Kobayashi, Masanao Morimura, Yoshitaka Onaya, Yuuich Takahashi, Kouhei Enomoto, Hideyuki Kogure
2001	J	`jnl`	ADC standard and testing in Japanese industry. Comput. Stand. Interfaces Haruo Kobayashi, Kensuke Kobayashi, Hiroshi Sakayori, Yasuyuki Kimura
2001	—	`conf`	Channel linearity mismatch effects in time-interleaved ADC systems. ISCAS (1) Naoki Kurosawa, Haruo Kobayashi, Kensuke Kobayashi
1999	—	`conf`	A high-speed CMOS track/hold circuit. ICECS Mohd Asmawi Mohamed Zin, Haruo Kobayashi, Kazuya Kobayashi, Jun-ichi Ichimura, Hao San, Yoshitaka Onaya, Yasuyuki Kimura, Yasushi Yuminaka, Yoshisato Sasaki, Kouji Tanaka, Fuminori Abe
1999	—	`conf`	Aperture jitter effects in wideband ADC systems. ICECS Haruo Kobayashi, Masanao Morimura, Kensuke Kobayashi, Yoshitaka Onaya
1999	—	`conf`	Modeling and parameter extraction technique for high-voltage MOS device. ISCAS (6) Takao Myono, E. Nishibe, S. Kikuchi, K. Iwatsu, Tatsuya Suzuki, Y. Sasaki, K. Itoh, Haruo Kobayashi
1998	—	`conf`	A highly linear second-order stage for 500-MHz third-order and fifth-order filters. ICECS Khayrollah Hadidi, K. Eguchi, Takashi Matsumoto, Haruo Kobayashi
1998	Misc	`conf`	Spatial and temporal stability of vision chips including parasitic inductances and capacitances. ICASSP Haruo Kobayashi, Takashi Matsumoto
1998	J	`jnl`	Vision chip architecture with light adaptation mechanism. Artif. Life Robotics Tetsuya Yagi, Haruo Kobayashi, Takashi Matsumoto, Koji Tanaka
1995	C	`conf`	Error Correction Algorithm for Folding/Interpolation ADC. ISCAS Haruo Kobayashi, Hiroshi Sakayori, Tsutomu Tobari, Hiroyuki Matsuura
1995	J	`jnl`	Light-adaptive architectures for regularization vision chips. Neural Networks Haruo Kobayashi, Takashi Matsumoto, Tetsuya Yagi, Koji Tanaka
1995	J	`jnl`	Two-dimensional spatio-temporal dynamics of analog image processing neural networks. IEEE Trans. Neural Networks Haruo Kobayashi, Takashi Matsumoto, Jun Sanekata
1993	J	`jnl`	Image processing regularization filters on layered architecture. Neural Networks Haruo Kobayashi, Takashi Matsumoto, Tetsuya Yagi, Takuji Shimmi
1992	J	`jnl`	Spatial versus temporal stability issues in image processing neuro chips. IEEE Trans. Neural Networks Takashi Matsumoto, Haruo Kobayashi, Yoshio Togawa