Harry Wagstaff

19 papers A* 2B 7Misc 1Journal 5Unranked 3
YearRankTypeTitle / Venue / Authors
2026 — conf
Scalable Decode Caching in Multi-Core Instruction Set Simulators.
RAPIDO@HiPEAC
Martin Kristien, Björn Franke, Nigel P. Topham, Igor Böhm, Harry Wagstaff, Tom Spink
2019 — conf
A Retargetable System-Level DBT Hypervisor.
USENIX ATC
Tom Spink, Harry Wagstaff, Björn Franke
2019 B conf
Full-System Simulation of Mobile CPU/GPU Platforms.
ISPASS
Kuba Kaszyk, Harry Wagstaff, Tom Spink, Björn Franke, Michael F. P. O'Boyle, Bruno Bodin, Henrik Uhrenholt
2019 B conf
Mitigating JIT compilation latency in virtual execution environments.
VEE
Martin Kristien, Tom Spink, Harry Wagstaff, Björn Franke, Igor Böhm, Nigel P. Topham
2018 J jnl
A Retargetable System-level DBT Hypervisor.
ACM Trans. Comput. Syst.
Tom Spink, Harry Wagstaff, Björn Franke
2018 B conf
Algorithmic Performance-Accuracy Trade-off in 3D Vision Applications.
ISPASS
Bruno Bodin, Luigi Nardi, Harry Wagstaff, Paul H. J. Kelly, Michael F. P. O'Boyle
2018 J jnl
Navigating the Landscape for Real-Time Localization and Mapping for Robotics and Virtual and Augmented Reality.
Proc. IEEE
Sajad Saeedi, Bruno Bodin, Harry Wagstaff, Andy Nisbet, Luigi Nardi, John Mawer, Nicolas Melot, Oscar Palomar, Emanuele Vespa, Tom Spink, Cosmin Gorgovan, Andrew M. Webb, James Clarkson, Erik Tomusk, Thomas Debrunner, Kuba Kaszyk, Pablo González de Aledo Marugán, Andrey Rodchenko, Graham D. Riley, Christos Kotselidis, Björn Franke, Michael F. P. O'Boyle, Andrew J. Davison, Paul H. J. Kelly, Mikel Luján, Steve B. Furber
2018 J jnl
Navigating the Landscape for Real-time Localisation and Mapping for Robotics and Virtual and Augmented Reality.
CoRR
Sajad Saeedi, Bruno Bodin, Harry Wagstaff, Andy Nisbet, Luigi Nardi, John Mawer, Nicolas Melot, Oscar Palomar, Emanuele Vespa, Tom Spink, Cosmin Gorgovan, Andrew M. Webb, James Clarkson, Erik Tomusk, Thomas Debrunner, Kuba Kaszyk, Pablo González de Aledo, Andrey Rodchenko, Graham D. Riley, Christos Kotselidis, Björn Franke, Michael F. P. O'Boyle, Andrew J. Davison, Paul H. J. Kelly, Mikel Luján, Steve B. Furber
2018 A* conf
SLAMBench2: Multi-Objective Head-to-Head Benchmarking for Visual SLAM.
ICRA
Bruno Bodin, Harry Wagstaff, Sajad Saeedi, Luigi Nardi, Emanuele Vespa, John Mawer, Andy Nisbet, Mikel Luján, Steve B. Furber, Andrew J. Davison, Paul H. J. Kelly, Michael F. P. O'Boyle
2018 J jnl
SLAMBench2: Multi-Objective Head-to-Head Benchmarking for Visual SLAM.
CoRR
Bruno Bodin, Harry Wagstaff, Sajad Saeedi, Luigi Nardi, Emanuele Vespa, John Mawer, Andy Nisbet, Mikel Luján, Steve B. Furber, Andrew J. Davison, Paul H. J. Kelly, Michael F. P. O'Boyle
2017 B conf
SimBench: A portable benchmarking methodology for full-system simulators.
ISPASS
Harry Wagstaff, Bruno Bodin, Tom Spink, Björn Franke
2016 B conf
Efficient asynchronous interrupt handling in a full-system instruction set simulator.
LCTES
Tom Spink, Harry Wagstaff, Björn Franke
2016 J jnl
Hardware-Accelerated Cross-Architecture Full-System Virtualization.
ACM Trans. Archit. Code Optim.
Tom Spink, Harry Wagstaff, Björn Franke
2016 B conf
Integrating Algorithmic Parameters into Benchmarking and Design Space Exploration in 3D Scene Understanding.
PACT
Bruno Bodin, Luigi Nardi, M. Zeeshan Zia, Harry Wagstaff, Govind Sreekar Shenoy, Murali Krishna Emani, John Mawer, Christos Kotselidis, Andy Nisbet, Mikel Luján, Björn Franke, Paul H. J. Kelly, Michael F. P. O'Boyle
2015 — conf
Efficient dual-ISA support in a retargetable, asynchronous Dynamic Binary Translator.
SAMOS
Tom Spink, Harry Wagstaff, Björn Franke, Nigel P. Topham
2015 — —
From high level architecture descriptions to fast instruction set simulators.
Harry Wagstaff
2014 Misc conf
Automated ISA branch coverage analysis and test case generation for retargetable instruction set simulators.
CASES
Harry Wagstaff, Tom Spink, Björn Franke
2014 B conf
Efficient code generation in a region-based dynamic binary translator.
LCTES
Tom Spink, Harry Wagstaff, Björn Franke, Nigel P. Topham
2013 A* conf
Early partial evaluation in a JIT-compiled, retargetable instruction set simulator generated from a high-level architecture description.
DAC
Harry Wagstaff, Miles Gould, Björn Franke, Nigel P. Topham