Harry H. Chen

30 papers A 8B 1C 1Misc 4Unranked 16
YearRankTypeTitle / Venue / Authors
2025 A conf
A Probabilistic Approach of Fault Propagation at RTL and its Application to Transient Fault Analysis.
ITC
Chien-Hsing Liang, Yu-Hong Chao, Jing-Jia Liou, Harry H. Chen
2025 — conf
Fault Injection and Tolerance Analysis of Battery Management Systems Using SystemC-AMS.
ITC-Asia
Hao-Yang Chi, Chih-Tsun Huang, Jing-Jia Liou, Harry H. Chen
2025 Misc conf
Multi-core Vmin and Worst-core Vmin Prediction using SOMAC.
VTS
Jeng-Yu Liao, Li-Yang Wang, James Chien-Mo Li, Harry H. Chen
2024 — conf
14.4 A Fully Digital Current Sensor Offering Per-Core Runtime Power for System Budgeting in a 4nm-Plus Octa-Core CPU.
ISSCC
Chien-Yu Lu, Bo-Jr Huang, Min-Chieh Chen, Ollie Tsai, Alfred Tsai, Eric Jia-Wei Fang, Yuju Cho, Harry H. Chen, Ping Kao, Ericbill Wang, Hugh Mair, Shih-Arn Hwang
2023 — conf
A 5G Mobile Gaming-Centric SoC with High-Performance Thermal Management in 4nm FinFET.
ISSCC
Bo-Jr Huang, Alfred Tsai, Lear Hsieh, Kathleen Chang, C.-J. Tsai, Jia-Ming Chen, Eric Jia-Wei Fang, Sung S.-Y. Hsueh, Jack Ciao, Barry Chen, Chuck Chang, Ping Kao, Ericbill Wang, Harry H. Chen, Hugh Mair, Shih-Arn Hwang
2023 — conf
Signal Reduction of Signature Blocks for Transient Fault Debugging.
ATS
Chun-Yeh Wang, Chien-Hsing Liang, Jing-Jia Liou, Harry H. Chen
2023 Misc conf
Vmin Prediction Using Nondestructive Stress Test.
VTS
Chun Chen, Jeng-Yu Liao, James Chien-Mo Li, Harry H. Chen, Eric Jia-Wei Fang
2022 — conf
FPGA-Based Emulation for Accelerating Transient Fault Reduction Analysis.
ATS
Zih-Ming Huang, Dun-An Yang, Jing-Jia Liou, Harry H. Chen
2022 A conf
Transient Fault Pruning for Effective Candidate Reduction in Functional Debugging.
ITC
Dun-An Yang, Jing-Jia Liou, Harry H. Chen
2021 — conf
35.1 An Octa-Core 2.8/2GHz Dual-Gear Sensor-Assisted High-Speed and Power-Efficient CPU in 7nm FinFET 5G Smartphone SoC.
ISSCC
Bo-Jr Huang, Eric Jia-Wei Fang, Sung S.-Y. Hsueh, Rory Huang, Angus Lin, Chi-Hsun Chiang, Yi-Hsuan Lin, Wen-Wen Hsieh, Barry Chen, Yi-Chang Zhuang, Cheng-Yuh Wu, Jia-Ming Chen, Y. S. Chen, Cheng-Tien Wan, Ericbill Wang, Alex Chiou, Ping Kao, Yuwen Tsai, Harry H. Chen, Shih-Arn Hwang
2021 A conf
ACE-Pro: Reduction of Functional Errors with ACE Propagation Graph.
ITC
Dun-An Yang, Yu-Teng Chang, Ting-Shuo Hsu, Jing-Jia Liou, Harry H. Chen
2021 — conf
Analyzing Transient Faults and Functional Error Rates of a RISC-V Core: A Case Study.
ATS
Dun-An Yang, Jing-Jia Liou, Harry H. Chen
2020 — conf
An ISA-level Accurate Fault Simulator for System-level Fault Analysis.
ATS
Jiang-Tang Xiao, Ting-Shuo Hsu, Christian M. Fuchs, Yu-Teng Chang, Jing-Jia Liou, Harry H. Chen
2020 — conf
Comprehensive Quality and Reliability Management for Automotive Product.
IRPS
M. H. Hsieh, W. S. Chiang, Harry H. Chen, M. Z. Lin, M. J. Lin
2020 Misc conf
Innovative Test Practices in Asia.
VTS
Takeshi Iwasaki, Masao Aso, Haruji Futami, Satoshi Matsunaga, Yousuke Miyake, Takaaki Kato, Seiji Kajihara, Yukiya Miura, Smith Lai, Gavin Hung, Harry H. Chen, Haruo Kobayashi, Kazumi Hatayama
2019 A conf
Hardware and firmware verification and validation: an algorithm-to-firmware development methodology.
DATE
Henry Cox, Harry H. Chen
2018 — conf
Beyond structural test, the rising need for system-level test.
VLSI-DAT
Harry H. Chen
2018 B conf
Covering hard-to-detect defects by thermal quorum sensing.
ETS
Po-Yao Chuang, Cheng-Wen Wu, Harry H. Chen
2017 — conf
Cell-aware test generation time reduction by using switch-level ATPG.
ITC-Asia
Po-Yao Chuang, Cheng-Wen Wu, Harry H. Chen
2017 — conf
Enhancing the efficiency and accuracy of cell-aware testing to reach zero defects.
VLSI-DAT
Harry H. Chen
2016 — conf
Efficient Cell-Aware Fault Modeling by Switch-Level Test Generation.
ATS
Harry H. Chen, Simon Y.-H. Chen, Po-Yao Chuang, Cheng-Wen Wu
2015 C conf
Cost reduction of system-level tests with stressed structural tests and SVM.
VLSI-SoC
Jing-Jia Liou, Meng-Ta Hsieh, Jun-Fei Cherng, Harry H. Chen
2015 Misc conf
Statistical techniques for predicting system-level failure using stress-test data.
VTS
Harry H. Chen, Shih-Hua Kuo, Jonathan Tung, Mango Chia-Tso Chao
2015 — conf
System-level test coverage prediction by structural stress test data mining.
VLSI-DAT
Bing-Yang Lin, Cheng-Wen Wu, Harry H. Chen
2014 — conf
Perspectives on Test Data Mining from Industrial Experience.
ATS
Harry H. Chen
2014 A conf
The case for analyzing system level failures using structural patterns.
ITC
Harry H. Chen
2013 A conf
Predicting system-level test and in-field customer failures using data mining.
ITC
Harry H. Chen, Roger Hsu, PaulYoung Yang, J. J. Shyr
2013 — conf
Worst-Case Critical-Path Delay Analysis Considering Power-Supply Noise.
Asian Test Symposium
Fang Bao, Mohammad Tehranipoor, Harry H. Chen
1985 A conf
An Algorithm to Generate Tests for MOS Circuits at the Switch Level.
ITC
Harry H. Chen, Robert G. Mathews, John A. Newkirk
1984 A conf
Test Generation for MOS Circuits.
ITC
Harry H. Chen, Robert G. Mathews, John A. Newkirk