Harish Patil

23 papers A* 5A 6B 3Journal 4Unranked 4
YearRankTypeTitle / Venue / Authors
2025 B conf
TPE: XPU-Point: Simulator-Agnostic Sample Selection Methodology for Heterogeneous CPU-GPU Applications.
PACT
Alen Sabu, Harish Patil, Wim Heirman, Changxi Liu, Trevor E. Carlson
2022 A* conf
LoopPoint: Checkpoint-driven Sampled Simulation for Multi-threaded Applications.
HPCA
Alen Sabu, Harish Patil, Wim Heirman, Trevor E. Carlson
2021 A conf
ELFies: Executable Region Checkpoints for Performance Analysis and Simulation.
CGO
Harish Patil, Alexander Isaev, Wim Heirman, Alen Sabu, Ali Hajiabadi, Trevor E. Carlson
2015 — conf
Fast Computational GPU Design with GT-Pin.
IISWC
Melanie Kambadur, Sunpyo Hong, Juan Cabral, Harish Patil, Chi-Keung Luk, Sohaib Sajid, Martha A. Kim
2015 B conf
Graph-matching-based simulation-region selection for multiple binaries.
ISPASS
Charles Yount, Harish Patil, Mohammad S. Islam, Aditya Srikanth
2014 A conf
DrDebug: Deterministic Replay based Cyclic Debugging with Dynamic Slicing.
CGO
Yan Wang, Harish Patil, Cristiano Pereira, Gregory Lueck, Rajiv Gupta, Iulian Neamtiu
2012 A conf
PinADX: an interface for customizable debugging with dynamic instrumentation.
CGO
Gregory Lueck, Harish Patil, Cristiano Pereira
2010 J jnl
Analyzing Parallel Programs with Pin.
Computer
Moshe Bach, Mark Charney, Robert Cohn, Elena Demikhovsky, Tevi Devor, Kim M. Hazelwood, Aamer Jaleel, Chi-Keung Luk, Gail Lyons, Harish Patil, Ady Tal
2010 A conf
PinPlay: a framework for deterministic replay and reproducible analysis of parallel programs.
CGO
Harish Patil, Cristiano Pereira, Mack Stallcup, Gregory Lueck, James Cownie
2008 — conf
Reproducible simulation of multi-threaded workloads for architecture design exploration.
IISWC
Cristiano Pereira, Harish Patil, Brad Calder
2007 B conf
Cross Binary Simulation Points.
ISPASS
Erez Perelman, Jeremy Lau, Harish Patil, Aamer Jaleel, Greg Hamerly, Brad Calder
2006 — conf
Automatic logging of operating system effects to guide application-level architecture simulation.
SIGMETRICS/Performance
Satish Narayanasamy, Cristiano Pereira, Harish Patil, Robert Cohn, Brad Calder
2005 A* conf
Pin: building customized program analysis tools with dynamic instrumentation.
PLDI
Chi-Keung Luk, Robert S. Cohn, Robert Muth, Harish Patil, Artur Klauser, P. Geoffrey Lowney, Steven Wallace, Vijay Janapa Reddi, Kim M. Hazelwood
2004 A conf
Ispike: A Post-link Optimizer for the Intel®Itanium®Architecture.
CGO
Chi-Keung Luk, Robert Muth, Harish Patil, Robert S. Cohn, P. Geoffrey Lowney
2004 A* conf
Pinpointing Representative Portions of Large Intel® Itanium® Programs with Dynamic Instrumentation.
MICRO
Harish Patil, Robert S. Cohn, Mark Charney, Rajiv Kapoor, Andrew Sun, Anand Karunanidhi
2002 J jnl
Asim: A Performance Model Framework.
Computer
Joel S. Emer, Pritpal S. Ahuja, Eric Borch, Artur Klauser, Chi-Keung Luk, Srilatha Manne, Shubhendu S. Mukherjee, Harish Patil, Steven Wallace, Nathan L. Binkert, Roger Espasa, Toni Juan
2002 A conf
Profile-guided post-link stride prefetching.
ICS
Chi-Keung Luk, Robert Muth, Harish Patil, Richard Weiss, P. Geoffrey Lowney, Robert S. Cohn
2000 A* conf
Combining Static and Dynamic Branch Prediction to Reduce Destructive Aliasing.
HPCA
Harish Patil, Joel S. Emer
1999 A* conf
A New Framework for Debugging Globally Optimized Code.
PLDI
Le-Chun Wu, Rajiv Mirani, Harish Patil, Bruce Olsen, Wen-mei W. Hwu
1997 J jnl
Low-Cost, Concurrent Checking of Pointer and Array Accesses in C Programs.
Softw. Pract. Exp.
Harish Patil, Charles N. Fischer
1996 — —
Efficient program monitoring techniques.
Harish Patil
1995 — conf
Efficient Run-time Monitoring Using Shadow Processing.
AADEBUG
Harish Patil, Charles N. Fischer
1993 J jnl
An Elimination Algorithm for Bidirectional Data Flow Problems Using Edge Placement.
ACM Trans. Program. Lang. Syst.
Dhananjay M. Dhamdhere, Harish Patil