Harideep Nair

30 papers A 1C 3Misc 1Journal 17Unranked 8
YearRankTypeTitle / Venue / Authors
2026 J jnl
Exploration of Unary Arithmetic-Based Matrix Multiply Units for Low Precision DL Accelerators.
CoRR
Prabhu Vellaisamy, Harideep Nair, Di Wu, R. D. (Shawn) Blanton, John Paul Shen
2026 J jnl
NeuroAI Temporal Neural Networks (NeuTNNs): Microarchitecture and Design Framework for Specialized Neuromorphic Processing Units.
CoRR
Shanmuga Venkatachalam, Prabhu Vellaisamy, Harideep Nair, Wei-Che Huang, YoungSeok Na, Yuyang Kang, Quinn Jacobson, John Paul Shen
2025 A conf
Tempus Core: Area-Power Efficient Temporal-Unary Convolution Core for Low-Precision Edge DLAs.
DATE
Prabhu Vellaisamy, Harideep Nair, Thomas Kang, Yichen Ni, Haoyang Fan, Bin Qi, Jeff Chen, R. D. Shawn Blanton, John Paul Shen
2024 C conf
Commercial Evaluation of Zero-Skipping MAC Design for Bit Sparsity Exploitation in DL Inference.
VLSI-SoC
Harideep Nair, Prabhu Vellaisamy, Tsung-Han Lin, Perry H. Wang, Ronald Shawn Blanton, John Paul Shen
2024 J jnl
Corrigendum: SemNet: Learning semantic attributes for human activity recognition with deep belief networks.
Frontiers Big Data
Shanmuga Venkatachalam, Harideep Nair, Ming Zeng, Cathy Tan, Ole J. Mengshoel, John Paul Shen
2024 — conf
Exploration of Unary Arithmetic-Based Matrix Multiply Units for Low Precision DL Accelerators.
ISVLSI
Prabhu Vellaisamy, Harideep Nair, Di Wu, R. D. Shawn Blanton, John Paul Shen
2024 — conf
NeRTCAM: CAM-Based CMOS Implementation of Reference Frames for Neuromorphic Processors.
NICE
Harideep Nair, William Leyman, Agastya Sampath, Quinn Jacobson, John Paul Shen
2024 J jnl
NeRTCAM: CAM-Based CMOS Implementation of Reference Frames for Neuromorphic Processors.
CoRR
Harideep Nair, William Leyman, Agastya Sampath, Quinn Jacobson, John Paul Shen
2024 J jnl
OzMAC: An Energy-Efficient Sparsity-Exploiting Multiply-Accumulate-Unit Design for DL Inference.
CoRR
Harideep Nair, Prabhu Vellaisamy, Tsung-Han Lin, Perry H. Wang, Ronald Shawn Blanton, John Paul Shen
2024 — conf
Realtime Person Identification via Gait Analysis Using IMU Sensors on Edge Devices.
ICONS
Shanmuga Venkatachalam, Harideep Nair, Prabhu Vellaisamy, Yongqi Zhou, Ziad Youssfi, John Paul Shen
2024 J jnl
Realtime Person Identification via Gait Analysis.
CoRR
Shanmuga Venkatachalam, Harideep Nair, Prabhu Vellaisamy, Yongqi Zhou, Ziad Youssfi, John Paul Shen
2024 — conf
TNN-CIM: An In-SRAM CMOS Implementation of TNN-Based Synaptic Arrays with STDP Learning.
AICAS
Harideep Nair, David Barajas-Jasso, Quinn Jacobson, John Paul Shen
2024 J jnl
TNNGen: Automated Design of Neuromorphic Sensory Processing Units for Time-Series Clustering.
CoRR
Prabhu Vellaisamy, Harideep Nair, Vamsikrishna Ratnakaram, Dhruv Gupta, John Paul Shen
2024 J jnl
TNNGen: Automated Design of Neuromorphic Sensory Processing Units for Time-Series Clustering.
IEEE Trans. Circuits Syst. II Express Briefs
Prabhu Vellaisamy, Harideep Nair, Vamsikrishna Ratnakaram, Dhruv Gupta, John Paul Shen
2024 J jnl
Tempus Core: Area-Power Efficient Temporal-Unary Convolution Core for Low-Precision Edge DLAs.
CoRR
Prabhu Vellaisamy, Harideep Nair, Thomas Kang, Yichen Ni, Haoyang Fan, Bin Qi, Jeff Chen, R. D. Shawn Blanton, John Paul Shen
2024 J jnl
tuGEMM: Area-Power-Efficient Temporal Unary GEMM Architecture for Low-Precision Edge AI.
CoRR
Harideep Nair, Prabhu Vellaisamy, Albert Chen, Joseph Finn, Anna Li, Manav Trivedi, John Paul Shen
2024 J jnl
tubGEMM: Energy-Efficient and Sparsity-Effective Temporal-Unary-Binary Based Matrix Multiply Unit.
CoRR
Prabhu Vellaisamy, Harideep Nair, Joseph Finn, Manav Trivedi, Albert Chen, Anna Li, Tsung-Han Lin, Perry H. Wang, R. D. (Shawn) Blanton, John Paul Shen
2023 C conf
tuGEMM: Area-Power-Efficient Temporal Unary GEMM Architecture for Low-Precision Edge AI.
ISCAS
Harideep Nair, Prabhu Vellaisamy, Albert Chen, Joseph Finn, Anna Li, Manav Trivedi, John Paul Shen
2023 — conf
tubGEMM: Energy-Efficient and Sparsity-Effective Temporal-Unary-Binary Based Matrix Multiply Unit.
ISVLSI
Prabhu Vellaisamy, Harideep Nair, Joseph Finn, Manav Trivedi, Albert Chen, Anna Li, Tsung-Han Lin, Perry H. Wang, Ronald Shawn Blanton, John Paul Shen
2022 J jnl
SemNet: Learning semantic attributes for human activity recognition with deep belief networks.
Frontiers Big Data
Shanmuga Venkatachalam, Harideep Nair, Ming Zeng, Cathy Tan, Ole J. Mengshoel, John Paul Shen
2022 — conf
TNN7: A Custom Macro Suite for Implementing Highly Optimized Designs of Neuromorphic TNNs.
ISVLSI
Harideep Nair, Prabhu Vellaisamy, Santha Bhasuthkar, John Paul Shen
2022 J jnl
TNN7: A Custom Macro Suite for Implementing Highly Optimized Designs of Neuromorphic TNNs.
CoRR
Harideep Nair, Prabhu Vellaisamy, Santha Bhasuthkar, John Paul Shen
2021 — conf
A Microarchitecture Implementation Framework for Online Learning with Temporal Neural Networks.
ISVLSI
Harideep Nair, John Paul Shen, James E. Smith
2021 J jnl
A Microarchitecture Implementation Framework for Online Learning with Temporal Neural Networks.
CoRR
Harideep Nair, John Paul Shen, James E. Smith
2021 Misc conf
Unsupervised Clustering of Time Series Signals Using Neuromorphic Energy-Efficient Temporal Neural Networks.
ICASSP
Shreyas Chaudhari, Harideep Nair, José M. F. Moura, John Paul Shen
2021 J jnl
Unsupervised Clustering of Time Series Signals using Neuromorphic Energy-Efficient Temporal Neural Networks.
CoRR
Shreyas Chaudhari, Harideep Nair, José M. F. Moura, John Paul Shen
2020 J jnl
Direct CMOS Implementation of Neuromorphic Temporal Neural Networks for Sensory Processing.
CoRR
Harideep Nair, John Paul Shen, James E. Smith
2019 — conf
AttriNet: learning mid-level features for human activity recognition with deep belief networks.
UbiComp/ISWC Adjunct
Harideep Nair, Cathy Tan, Ming Zeng, Ole J. Mengshoel, John Paul Shen
2019 C conf
Freeflow Core: Enhancing Performance of In-Order Cores with Energy Efficiency.
ICCD
Raj Kumar Choudhary, Newton Singh, Harideep Nair, Rishabh Rawat, Virendra Singh
2019 J jnl
Hardware Aware Neural Network Architectures using FbNet.
CoRR
Sai Vineeth Kalluru Srinivas, Harideep Nair, Vinay Vidyasagar