Hari Cherupalli

15 papers A* 7A 3Journal 4Unranked 1
YearRankTypeTitle / Venue / Authors
2025 J jnl
Pre-cache: A Microarchitectural Solution to prevent Meltdown and Spectre.
CoRR
Subhash Sethumurugan, Hari Cherupalli, Kangjie Lu, John Sartori
2024 A* conf
Late Breaking Results: On the One-Key Premise of Logic Locking.
DAC
Yinghua Hu, Hari Cherupalli, Mike Borza, Deepak D. Sherlekar
2024 J jnl
Late Breaking Results: On the One-Key Premise of Logic Locking.
CoRR
Yinghua Hu, Hari Cherupalli, Mike Borza, Deepak D. Sherlekar
2022 A* conf
A scalable symbolic simulation tool for low power embedded systems.
DAC
Subhash Sethumurugan, Shashank Hegde, Hari Cherupalli, John Sartori
2021 — conf
Constrained Conservative State Symbolic Co-analysis for Ultra-low-power Embedded Systems.
ASP-DAC
Shashank Hegde, Subhash Sethumurugan, Hari Cherupalli, Henry Duwe, John Sartori
2018 J jnl
Bespoke Processors for Applications with Ultra-Low Area and Power Constraints.
IEEE Micro
Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori
2017 A* conf
Bespoke Processors for Applications with Ultra-low Area and Power Constraints.
ISCA
Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori
2017 J jnl
Determining Application-Specific Peak Power and Energy Requirements for Ultra-Low-Power Processors.
ACM Trans. Comput. Syst.
Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori
2017 A* conf
Determining Application-specific Peak Power and Energy Requirements for Ultra-low Power Processors.
ASPLOS
Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori
2017 A* conf
Enabling Effective Module-Oblivious Power Gating for Embedded Processors.
HPCA
Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori
2017 A conf
Scalable N-worst algorithms for dynamic timing and activity analysis.
ICCAD
Hari Cherupalli, John Sartori
2017 A* conf
Software-based gate-level information flow security for IoT systems.
MICRO
Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori
2016 A conf
Automated error prediction for approximate sequential circuits.
ICCAD
Amrut Kapare, Hari Cherupalli, John Sartori
2016 A* conf
Exploiting Dynamic Timing Slack for Energy Efficiency in Ultra-Low-Power Embedded Systems.
ISCA
Hari Cherupalli, Rakesh Kumar, John Sartori
2015 A conf
Graph-based Dynamic Analysis: Efficient Characterization of Dynamic Timing and Activity Distributions.
ICCAD
Hari Cherupalli, John Sartori