Harald P. E. Vranken

38 papers A* 1A 8B 3C 3Misc 1Journal 8Unranked 14
YearRankTypeTitle / Venue / Authors
2019 J jnl
A Virtual Classroom for Cybersecurity Education.
Trans. Edutainment
Jens Haag, Harald P. E. Vranken, Marko C. J. D. van Eekelen
2019 — conf
Deep in the Dark: A Novel Threat Detection System using Darknet Traffic.
IEEE BigData
Sanjay Kumar, Harald P. E. Vranken, Joost van Dijk, Timo Hämäläinen
2018 Misc conf
Applying deep learning on packet flows for botnet detection.
SAC
Jos van Roosmalen, Harald P. E. Vranken, Marko C. J. D. van Eekelen
2018 B conf
Denial-of-Service Attacks on LoRaWAN.
ARES
Eef van Es, Harald P. E. Vranken, Arjen Hommersom
2018 B conf
Discovering software vulnerabilities using data-flow analysis and machine learning.
ARES
Jorrit Kronjee, Arjen Hommersom, Harald P. E. Vranken
2018 J jnl
Evaluation of transaction authentication methods for online banking.
Future Gener. Comput. Syst.
Sven Kiljan, Harald P. E. Vranken, Marko C. J. D. van Eekelen
2018 J jnl
Resilience of the Domain Name System: A case study of the .nl-domain.
Comput. Networks
Lars Kröhnke, Jelte Jansen, Harald P. E. Vranken
2017 J jnl
A Survey of Authentication and Communications Security in Online Banking.
ACM Comput. Surv.
Sven Kiljan, Koen Simoens, Danny De Cock, Marko C. J. D. van Eekelen, Harald P. E. Vranken
2016 — conf
The Role of Internet Service Providers in Botnet Mitigation.
EISIC
Jeroen Pijpker, Harald P. E. Vranken
2016 C conf
User-friendly Manual Transfer of Authenticated Online Banking Transaction Data - A Case Study that Applies the What You Enter Is What You Sign Transaction Authorization Information Scheme.
SECRYPT
Sven Kiljan, Harald P. E. Vranken, Marko C. J. D. van Eekelen
2014 — conf
An Exercise Assistant for Practical Networking Courses.
CSEDU (1)
Jens Haag, Christian Witte, Stefan Karsch, Harald P. E. Vranken, Marko C. J. D. van Eekelen
2014 — conf
An Exercise Assistant for Practical Networking and IT Security Courses in Higher Education.
CSEDU (Selected Papers)
Jens Haag, Stefan Karsch, Harald P. E. Vranken, Marko C. J. D. van Eekelen
2014 — conf
What You Enter Is What You Sign: Input Integrity in an Online Banking Environment.
STAST
Sven Kiljan, Harald P. E. Vranken, Marko C. J. D. van Eekelen
2013 — conf
Counter botnet activities in the Netherlands a study on organisation and effectiveness.
ICITST
Timo Schless, Harald P. E. Vranken
2011 — conf
A Distributed Virtual Computer Security Lab.
CSEDU (1)
Harald P. E. Vranken, Jens Haag, Tobias Horsmann, Stefan Karsch
2011 — conf
A distributed virtual computer security lab with central authority.
CSERC
Jens Haag, Tobias Horsmann, Stefan Karsch, Harald P. E. Vranken
2011 C conf
The Impact of Server Virtualization on ITIL Processes.
CLOSER
Jurriaan Kamer, Harald P. E. Vranken
2008 B conf
Experiences with a synchronous virtual classroom in distance education.
ITiCSE
Herman Koppelman, Harald P. E. Vranken
2006 A* conf
Fault detection and diagnosis with parity trees for space compaction of test responses.
DAC
Harald P. E. Vranken, Sandeep Kumar Goel, Andreas Glowatz, Jürgen Schlöffel, Friedrich Hapke
2004 A conf
Efficient Pattern Mapping for Deterministic Logic BIST.
ITC
Valentin Gherman, Hans-Joachim Wunderlich, Harald P. E. Vranken, Friedrich Hapke, Michael Wittke, Michael Garbers
2004 A conf
Impact of Test Point Insertion on Silicon Area and Timing during Layout.
DATE
Harald P. E. Vranken, Ferry Syafei Sapei, Hans-Joachim Wunderlich
2004 A conf
X-Masking During Logic BIST and Its Impact on Defect Coverage.
ITC
Yuyi Tang, Hans-Joachim Wunderlich, Harald P. E. Vranken, Friedrich Hapke, Michael Wittke, Piet Engelke, Ilia Polian, Bernd Becker
2003 A conf
ATPG Padding And ATE Vector Repeat Per Port For Reducing Test Data Volume.
ITC
Harald P. E. Vranken, Friedrich Hapke, Soenke Rogge, Domenico Chindamo, Erik H. Volkerink
2003 — conf
Yield analysis for repairable embedded memories.
ETW
Anuja Sehgal, Aishwarya Dubey, Erik Jan Marinissen, Clemens Wouters, Harald P. E. Vranken, Krishnendu Chakrabarty
2002 — conf
Combining deterministic logic BIST with test point insertion.
ETW
Harald P. E. Vranken, Florian Meister, Hans-Joachim Wunderlich
2002 J jnl
Enhanced Reduced Pin-Count Test for Full-Scan Design.
J. Electron. Test.
Harald P. E. Vranken, Tom Waayers, Hérvé Fleury, David Lelouvier
2001 J jnl
Application of Deterministic Logic BIST on Industrial Circuits.
J. Electron. Test.
Gundolf Kiefer, Harald P. E. Vranken, Erik Jan Marinissen, Hans-Joachim Wunderlich
2001 A conf
Circuit partitioning for efficient logic BIST synthesis.
DATE
Alexander Irion, Gundolf Kiefer, Harald P. E. Vranken, Hans-Joachim Wunderlich
2001 A conf
Enhanced reduced pin-count test for full-scan design.
ITC
Harald P. E. Vranken, Tom Waayers, Hérvé Fleury, David Lelouvier
2000 A conf
Application of deterministic logic BIST on industrial circuits.
ITC
Gundolf Kiefer, Hans-Joachim Wunderlich, Harald P. E. Vranken, Erik Jan Marinissen
2000 — conf
Behavior-Preserving Transformations for Design-for-Test.
EUROMICRO
Jeroen Voeten, Harald P. E. Vranken
2000 J jnl
Debug Facilities in the TriMedia CPU64 Architecture.
J. Electron. Test.
Harald P. E. Vranken
2000 — conf
IC Design Validation Using Message Sequence Charts.
EUROMICRO
Harald P. E. Vranken, Tomás Garciá Garciá, Sjouke Mauw, Loe M. G. Feijs
1999 — conf
Debug facilities in the TriMedia CPU64 architecture.
ETW
Harald P. E. Vranken
1999 C conf
TriMedia CPU64 Architecture.
ICCD
Jos T. J. van Eijndhoven, Kees A. Vissers, Evert-Jan D. Pol, P. Struik, R. H. J. Bloks, Pieter van der Wolf, Harald P. E. Vranken, Frans Sijstermans, M. J. A. Tromp, Andy D. Pimentel
1997 — conf
Design-For-Debug in Hardware/Software Co-Design.
CODES
Harald P. E. Vranken, M. P. J. Stevens, M. T. M. Segers
1996 J jnl
Design for Testability in Hardware-Software Systems.
IEEE Des. Test Comput.
Harald P. E. Vranken, Marc F. Witteman, Ronald C. van Wuijtswinkel
1994 A conf
System-Level Testability of Hardware/Software Systems.
ITC
Harald P. E. Vranken, M. P. J. Stevens, M. T. M. Segers, J. H. M. M. van Rhee