Haozhe Zhu - RankMe

47 papers A* 5A 3C 5Journal 19Unranked 15

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	A 22-nm 109.3-to-249.5-TFLOPS/W Outlier-Aware Floating-Point SRAM Compute-in-Memory Macro for Large Language Models. IEEE J. Solid State Circuits Siqi He, Haozhe Zhu, Hongyi Zhang, Yujie Ma, Zexing Chen, Mengjie Li, Danfeng Zhai, Chixiao Chen, Qi Liu, Xiaoyang Zeng, Ming Liu
2026	J	`jnl`	AttriGuard: Defeating Indirect Prompt Injection in LLM Agents via Causal Attribution of Tool Invocations. CoRR Yu He, Haozhe Zhu, Yiming Li, Shuo Shao, Hongwei Yao, Zhihao Liu, Zhan Qin
2026	J	`jnl`	COPIC: A Codesigned Accelerator for Efficient Octree-Based Learned Point Cloud Compression at Edge. IEEE Trans. Very Large Scale Integr. Syst. Jiapei Zheng, Yutong Su, Siqi He, Jie Yang, Haozhe Zhu, Qi Liu, Chixiao Chen
2026	J	`jnl`	SHINSAI: A 586 mm IEEE J. Solid State Circuits Haozhe Zhu, Bo Jiao, Yuman Zeng, Yongjiang Li, Jie Liao, Siyao Jia, Zexing Chen, Liyu Lin, Xuanda Lin, Suchang Huang, Mochen Tian, Jundong Zhu, Dexin Wen, Yan Wang, Yu Wang, Jian Xu, Feng Wang, Jun Tao, Chixiao Chen, Qi Liu, Ming Liu
2025	—	`conf`	37.4 SHINSAI: A 586mm ISSCC Bo Jiao, Haozhe Zhu, Yuman Zeng, Yongjiang Li, Jie Liao, Siyao Jia, Mochen Tian, Zexing Chen, Jundong Zhu, Dexin Wen, Yan Wang, Yu Wang, Jian Xu, Feng Wang, Jun Tao, Chixiao Chen, Qi Liu, Ming Liu
2025	C	`conf`	A 0.22 pJ/bit Processing-in-Controller GEMV Macro with Weight Prefetch for Efficient Near-Memory Computing. ISCAS Jie Yang, Jiapei Zheng, Siqi He, Lizhou Wu, Chen Mu, Haozhe Zhu, Liyu Lin, Qi Liu, Chixiao Chen
2025	J	`jnl`	A 28-nm RRAM/SRAM Collaborative CIM Accelerator Supporting RRAM-Endurance-Latency Awareness for Edge Fine-Tuning. IEEE J. Solid State Circuits Chen Mu, Zhirui Huang, Hao Jiang, Jie Liao, Yuliang Zhou, Liang Chen, Yechu Zhang, Haozhe Zhu, Jianguo Yang, Qi Liu, Chixiao Chen
2025	J	`jnl`	An optimization architecture for multi-timescale energy scheduling under renewable uncertainty. Comput. Ind. Eng. Qingcheng Lin, Haozhe Zhu, Xuefeng Li, Hui Xiao
2025	A*	`conf`	DRAFT: Decoupling Backpropagation from Pre-trained Backbone for Efficient Transformer Fine-Tuning on Edge. DAC Zhirui Huang, Shiwei Liu, Haozhe Zhu, Qi Liu, Chixiao Chen
2025	A*	`conf`	EIGEN: Enabling Efficient 3DIC Interconnect with Heterogeneous Dual-Layer Network-on-Active-Interposer. HPCA Siyao Jia, Bo Jiao, Haozhe Zhu, Chixiao Chen, Qi Liu, Ming Liu
2025	J	`jnl`	FIT-Print: Towards False-claim-resistant Model Ownership Verification via Targeted Fingerprint. CoRR Shuo Shao, Haozhe Zhu, Hongwei Yao, Yiming Li, Tianwei Zhang, Zhan Qin, Kui Ren
2025	A	`conf`	Federated-Continual Dynamic Segmentation of Histopathology Guided by Barlow Continuity. WACV Niklas Babendererde, Haozhe Zhu, Moritz Fuchs, Jonathan Stieber, Anirban Mukhopadhyay
2025	J	`jnl`	Federated-Continual Dynamic Segmentation of Histopathology guided by Barlow Continuity. CoRR Niklas Babendererde, Haozhe Zhu, Moritz Fuchs, Jonathan Stieber, Anirban Mukhopadhyay
2025	A	`conf`	GauPRE: A Pattern-based Rendering Engine for Gaussian Splatting on Edge Device. ICCAD Yuzheng Lin, Lizhou Wu, Chixiao Chen, Xiaoyang Zeng, Haozhe Zhu
2025	A*	`conf`	Hydra: Harnessing Expert Popularity for Efficient Mixture-of-Expert Inference on Chiplet System. DAC Siqi He, Haozhe Zhu, Jiapei Zheng, Lizhou Wu, Bo Jiao, Qi Liu, Xiaoyang Zeng, Chixiao Chen
2025	A*	`conf`	PIMoE: Towards Efficient MoE Transformer Deployment on NPU-PIM System through Throttle-Aware Task Offloading. DAC Lizhou Wu, Haozhe Zhu, Siqi He, Xuanda Lin, Xiaoyang Zeng, Chixiao Chen
2025	J	`jnl`	RT-FLOW: FPGA Implementation of Real-Time Optical-Flow-Based SLAM for High-Speed Tracking and High-Quality Mapping. IEEE Trans. Circuits Syst. I Regul. Pap. Mengjie Li, Yiming Zhang, Siqi He, Qi Liu, Xiaoyang Zeng, Chixiao Chen, Haozhe Zhu
2025	J	`jnl`	SSDM: Generated image interaction method based on spatial sparsity for diffusion models. Neurocomputing Zhuochao Yang, Jingjing Liu, Haozhe Zhu, Jianhua Zhang, Wanquan Liu
2024	C	`conf`	A 19.7 TFLOPS/W Multiply-less Logarithmic Floating-Point CIM Architecture with Error-Reduced Compensated Approximate Adder. ISCAS Mengjie Li, Hongyi Zhang, Siqi He, Haozhe Zhu, Hao Zhang, Jinglei Liu, Jiayuan Chen, Zhenping Hu, Xiaoyang Zeng, Chixiao Chen
2024	—	`conf`	A 28nm 76.25TOPS/W RRAM/SRAM-Collaborative CIM Fine-Tuning Accelerator with RRAM-Endurance/Latency-Aware Weight Allocation for CNN and Transformer. A-SSCC Chen Mu, Zhirui Huang, Hao Jiang, Jie Liao, Bo Jiao, Yuliang Zhou, Haozhe Zhu, Jianguo Yang, Qi Liu, Chixiao Chen
2024	—	`conf`	A Real-Time Optical-Flow-based SLAM FPGA Accelerator with Inter-Frame Similarity Exploitation and Correlation-Guided Mixed-Precision Flow Update. A-SSCC Mengjie Li, Haozhe Zhu, Yiming Zhang, Siqi He, Qi Liu, Xiaoyang Zeng, Chixiao Chen
2024	A	`conf`	ARCTIC: Agile and Robust Compute-In-Memory Compiler with Parameterized INT/FP Precision and Built-In Self Test. DATE Hongyi Zhang, Haozhe Zhu, Siqi He, Mengjie Li, Chengchen Wang, Xiankui Xiong, Haidong Tian, Xiaoyang Zeng, Chixiao Chen
2024	J	`jnl`	FAM-Former: Global Transformer and Feature Aggregation Module for Knee MRI Age Estimation. IEEE Trans. Instrum. Meas. Linchao He, Haozhe Zhu, Xiaodong Deng, Fei Fan, Peixi Liao, Wenchao Du, Hu Chen, Zhenhua Deng, Yi Zhang
2024	J	`jnl`	FPIA: Communication-Aware Multi-Chiplet Integration With Field-Programmable Interconnect Fabric on Reusable Silicon Interposer. IEEE Trans. Circuits Syst. I Regul. Pap. Bo Jiao, Lei Xu, Xinyu Yu, Haitao Yang, Haozhe Zhu, Yu Wang, Jundong Zhu, Dexin Wen, Lingli Wang, Jun Tao, Chixiao Chen, Yinhe Han, Qi Liu, Ninghui Sun, Ming Liu
2024	A*	`conf`	GauSPU: 3D Gaussian Splatting Processor for Real-Time SLAM Systems. MICRO Lizhou Wu, Haozhe Zhu, Siqi He, Jiapei Zheng, Chixiao Chen, Xiaoyang Zeng
2024	J	`jnl`	Hi-NeRF: A Multicore NeRF Accelerator With Hierarchical Empty Space Skipping for Edge 3-D Rendering. IEEE Trans. Very Large Scale Integr. Syst. Lizhou Wu, Haozhe Zhu, Jiapei Zheng, Mengjie Li, Yinuo Cheng, Qi Liu, Xiaoyang Zeng, Chixiao Chen
2024	J	`jnl`	SLAM-CIM: A Visual SLAM Backend Processor With Dynamic-Range-Driven-Skipping Linear-Solving FP-CIM Macros. IEEE J. Solid State Circuits Mengjie Li, Haozhe Zhu, Siqi He, Hongyi Zhang, Jie Liao, Danfeng Zhai, Chixiao Chen, Qi Liu, Xiaoyang Zeng, Ninghui Sun, Ming Liu
2024	—	`conf`	ST-BPTT: A Memory-efficient BPTT SNN Training Approach through Gradient-Contribution-Driven Time-Step Selection. BioCAS Jiajun Lu, Haozhe Zhu, Xiaoyang Zeng, Chixiao Chen
2024	J	`jnl`	Trident-CIM: A LUT-Based Compute-in-Memory Macro With Trident Read Bit-Line and Partial Product Pruning. IEEE Trans. Circuits Syst. II Express Briefs Haozhe Zhu, Hongyi Zhang, Siqi He, Mengjie Li, Xiaoyang Zeng, Chixiao Chen
2023	C	`conf`	A $2.53 \mu \mathrm{W}/\text{channel}$ Event-Driven Neural Spike Sorting Processor with Sparsity-Aware Computing-In-Memory Macros. ISCAS Hao Jiang, Jiapei Zheng, Yunzhengmao Wang, Jinshan Zhang, Haozhe Zhu, Liangjian Lyu, Yingping Chen, Chixiao Chen, Qi Liu
2023	—	`conf`	A 28nm 53.8TOPS/W 8b Sparse Transformer Accelerator with In-Memory Butterfly Zero Skipper for Unstructured-Pruned NN and CIM-Based Local-Attention-Reusable Engine. ISSCC Shiwei Liu, Peizhe Li, Jinshan Zhang, Yunzhengmao Wang, Haozhe Zhu, Wenning Jiang, Shan Tang, Chixiao Chen, Qi Liu, Ming Liu
2023	C	`conf`	A Scalable Die-to-Die Interconnect with Replay and Repair Schemes for 2.5D/3D Integration. ISCAS Jie Liao, Bo Jiao, Jinshan Zhang, Shiwei Liu, Hao Jiang, Jun Tao, Wenning Jiang, Qi Liu, Lihua Zhang, Haozhe Zhu, Chixiao Chen
2023	—	`conf`	Bit-Offsetter: A Bit-serial DNN Accelerator with Weight-offset MAC for Bit-wise Sparsity Exploitation. AICAS Siqi He, Hongyi Zhang, Mengjie Li, Haozhe Zhu, Chixiao Chen, Qi Liu, Xiaoyang Zeng
2022	C	`conf`	A 11.6μ W Computing-on-Memory-Boundary Keyword Spotting Processor with Joint MFCC-CNN Ternary Quantization. ISCAS Xinru Jia, Haozhe Zhu, Yunzheng Wang, Jinshan Zhang, Feng Lin, Xiankui Xiong, Dong Xu, Chixiao Chen, Qi Liu
2022	J	`jnl`	A 28 nm 81 Kb 59-95.3 TOPS/W 4T2R ReRAM Computing-in-Memory Accelerator With Voltage-to-Time-to-Digital Based Output. IEEE J. Emerg. Sel. Topics Circuits Syst. Keji Zhou, Xinru Jia, Chenyang Zhao, Xumeng Zhang, Guangjian Wu, Chen Mu, Haozhe Zhu, Yanting Ding, Chixiao Chen, Xiaoyong Xue, Xiaoyang Zeng, Qi Liu
2022	—	`conf`	COMB-MCM: Computing-on-Memory-Boundary NN Processor with Bipolar Bitwise Sparsity Optimization for Scalable Multi-Chiplet-Module Edge Machine Learning. ISSCC Haozhe Zhu, Bo Jiao, Jinshan Zhang, Xinru Jia, Yunzhengmao Wang, Tianchan Guan, Shengcheng Wang, Dimin Niu, Hongzhong Zheng, Chixiao Chen, Mingyu Wang, Lihua Zhang, Xiaoyang Zeng, Qi Liu, Yuan Xie, Ming Liu
2022	—	`conf`	Road Defect Detection Based on Semantic Transformed Disparity Image Segmentation. ROBIO Li Wang, Wenbo Shi, Haozhe Zhu, Denghuang Zhang, Yikang Zhang, Jiahe Fan, Mohammud Junaid Bocus
2021	—	`conf`	A 0.57-GOPS/DSP Object Detection PIM Accelerator on FPGA. ASP-DAC Bo Jiao, Jinshan Zhang, Yuanyuan Xie, Shunli Wang, Haozhe Zhu, Xiaoyang Kang, Zhiyan Dong, Lihua Zhang, Chixiao Chen
2021	—	`conf`	ALPINE: An Agile Processing-in-Memory Macro Compilation Framework. ACM Great Lakes Symposium on VLSI Jinshan Zhang, Bo Jiao, Yunzhengmao Wang, Haozhe Zhu, Lihua Zhang, Chixiao Chen
2021	—	`conf`	An Efficient Markov Random Field Based Denoising Approach for Dynamic Vision Sensor. ASICON Xi Cheng, Haozhe Zhu, Jingjing Liu, Mingyu Wang, Xiaoyang Zeng
2021	—	`conf`	Computing Utilization Enhancement for Chiplet-based Homogeneous Processing-in-Memory Deep Learning Processors. ACM Great Lakes Symposium on VLSI Bo Jiao, Haozhe Zhu, Jinshan Zhang, Shunli Wang, Xiaoyang Kang, Lihua Zhang, Mingyu Wang, Chixiao Chen
2020	J	`jnl`	A Communication-Aware DNN Accelerator on ImageNet Using In-Memory Entry-Counting Based Algorithm-Circuit-Architecture Co-Design in 65-nm CMOS. IEEE J. Emerg. Sel. Topics Circuits Syst. Haozhe Zhu, Chixiao Chen, Shiwei Liu, Qiaosha Zou, Mingyu Wang, Lihua Zhang, Xiaoyang Zeng, Chuanjin Richard Shi
2020	J	`jnl`	Tanji: a General-purpose Neural Network Accelerator with Unified Crossbar Architecture. IEEE Des. Test Haozhe Zhu, Yu Wang, Chuanjin Richard Shi
2020	—	`conf`	XNORAM: An Efficient Computing-in-Memory Architecture for Binary Convolutional Neural Networks with Flexible Dataflow Mapping. AICAS Shiwei Liu, Haozhe Zhu, Chixiao Chen, Lihua Zhang, Chuanjin Richard Shi
2019	—	`conf`	TRPN: Matrix Factorization Meets Recurrent Neural Network for Temporal Rating Prediction. APWeb/WAIM (2) Haozhe Zhu, Yanyan Shen, Xian Zhou
2018	J	`jnl`	OCEAN: An On-Chip Incremental-Learning Enhanced Artificial Neural Network Processor With Multiple Gated-Recurrent-Unit Accelerators. IEEE J. Emerg. Sel. Topics Circuits Syst. Chixiao Chen, Hongwei Ding, Huwan Peng, Haozhe Zhu, Yu Wang, Chuanjin Richard Shi
2017	—	`conf`	OCEAN: An on-chip incremental-learning enhanced processor with gated recurrent neural network accelerators. ESSCIRC Chixiao Chen, Hongwei Ding, Huwan Peng, Haozhe Zhu, Rui Ma, Peiyong Zhang, Xiaolang Yan, Yu Wang, Mingyu Wang, Hao Min, Chuanjin Richard Shi