Haoxing Ren

179 papers A* 24A 34B 1Misc 2Journal 71Unranked 45
YearRankTypeTitle / Venue / Authors
2026 J jnl
ACE-RTL: When Agentic Context Evolution Meets RTL-Specialized LLMs.
CoRR
Chenhui Deng, Zhongzhi Yu, Guan-Ting Liu, Nathaniel Ross Pinckney, Haoxing Ren
2026 — conf
C3PO: Commercial-Quality Global Placement via Coherent, Concurrent Timing, Routability, and Wirelength Optimization.
ASP-DAC
Yi-Chen Lu, Hao-Hsiang Hsiao, Rongjian Liang, Wen-Hao Liu, Haoxing Ren
2026 — conf
Code, Not Canvas: Multi-Agent Layout Generation Beyond Vision Models.
ASP-DAC
Haoyu Yang, Haoxing Ren
2026 — conf
Differentiable Tier Assignment for Timing and Congestion-Aware Routing in 3D ICs.
ASP-DAC
Yuan-Hsiang Lu, Hao-Hsiang Hsiao, Yi-Chen Lu, Haoxing Ren, Sung Kyu Lim
2026 J jnl
GRPO with State Mutations: Improving LLM-Based Hardware Test Plan Generation.
CoRR
Dimple Vijay Kochar, Nathaniel Ross Pinckney, Guan-Ting Liu, Chia-Tung Ho, Chenhui Deng, Haoxing Ren, Brucek Khailany
2026 J jnl
GaloisSAT: Differentiable Boolean Satisfiability Solving via Finite Field Algebra.
CoRR
Curie Kim, Carsten Portner, Mingju Liu, Steve Dai, Haoxing Ren, Brucek Khailany, Alvaro Velasquez, Ismail Alkhouri, Cunxi Yu
2026 — conf
GrandPlan: Differentiable, Simultaneous Top-Level Floorplanning and Partition-Level Cell Placement for Large-Scale IP-Cores.
ISPD
Zhili Xiong, Yi-Chen Lu, David Z. Pan, Haoxing Ren
2026 — conf
Invited: Polymath: Self-Improving Hierarchical Workflow for Multi-Domain Problem Solving.
ISPD
Chia-Tung Ho, Jing Gong, Haoyu Yang, Abhishek B. Akkur, Haoxing Ren
2026 J jnl
LLM4Cov: Execution-Aware Agentic Learning for High-coverage Testbench Generation.
CoRR
Hejia Zhang, Zhongming Yu, Chia-Tung Ho, Haoxing Ren, Brucek Khailany, Jishen Zhao
2026 — conf
LiDAR 3.0: Photonics-Aware Planning-Guided Automated Electrical Routing for Large-Scale Active Photonic Integrated Circuits.
ISPD
Hongjian Zhou, Haoyu Yang, Nicholas Gangi, Bowen Liu, Meng Zhang, Haoxing Ren, Xu Wang, Rena Huang, Jiaqi Gu
2026 J jnl
MapTune: Versatile ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning.
ACM Trans. Design Autom. Electr. Syst.
Mingju Liu, Daniel Robinson, Yingjie Li, Johannes Maximilian Kühn, Rongjian Liang, Haoxing Ren, Cunxi Yu
2026 J jnl
Pushing the Limits of Inverse Lithography with Generative Reinforcement Learning.
CoRR
Haoyu Yang, Haoxing Ren
2025 — conf
ASPEN: LLM-Guided E-Graph Rewriting for RTL Datapath Optimization.
MLCAD
Niansong Zhang, Chenhui Deng, Johannes Maximilian Kühn, Chia-Tung Ho, Cunxi Yu, Zhiru Zhang, Haoxing Ren
2025 A conf
Apollo: Automated Routing-Informed Placement for Large-Scale Photonic Integrated Circuits.
ICCAD
Hongjian Zhou, Haoyu Yang, Nicholas Gangi, Zhaoran Rena Huang, Haoxing Ren, Jiaqi Gu
2025 J jnl
AssertionForge: Enhancing Formal Verification Assertion Generation with Structured Representation of Specifications and RTL.
CoRR
Yunsheng Bai, Ghaith Bany Hamad, Syed Suhaib, Haoxing Ren
2025 J jnl
Automated Routing-Informed Placement for Large-Scale Photonic Integrated Circuits.
CoRR
Hongjian Zhou, Haoyu Yang, Nicholas Gangi, Haoxing Ren, Z. Rena Huang, Jiaqi Gu
2025 J jnl
Autonomous Code Evolution Meets NP-Completeness.
CoRR
Cunxi Yu, Rongjian Liang, Chia-Tung Ho, Haoxing Ren
2025 A conf
BOSON
DATE
Pingchuan Ma, Zhengqi Gao, Amir Begovic, Meng Zhang, Haoyu Yang, Haoxing Ren, Z. Rena Huang, Duane S. Boning, Jiaqi Gu
2025 A conf
BUFFALO: PPA-Configurable, LLM-based Buffer Tree Generation via Group Relative Policy Optimization.
ICCAD
Hao-Hsiang Hsiao, Yi-Chen Lu, Sung Kyu Lim, Haoxing Ren
2025 A* conf
ChipAlign: Instruction Alignment in Large Language Models for Chip Design via Geodesic Interpolation.
DAC
Chenhui Deng, Yunsheng Bai, Haoxing Ren
2025 A conf
ChipVQA: Benchmarking Visual Language Models for Chip Design.
DATE
Haoyu Yang, Qijing Huang, Nathaniel Ross Pinckney, Walker J. Turner, Wenfei Zhou, Yanqing Zhang, Chia-Tung Ho, Chen-Chia Chang, Haoxing Ren
2025 J jnl
Comprehensive Verilog Design Problems: A Next-Generation Benchmark Dataset for Evaluating Large Language Models and Agents on RTL Design and Verification.
CoRR
Nathaniel Ross Pinckney, Chenhui Deng, Chia-Tung Ho, Yun-Da Tsai, Mingjie Liu, Wenfei Zhou, Brucek Khailany, Haoxing Ren
2025 A* conf
CraftRTL: High-quality Synthetic Data Generation for Verilog Code Models with Correct-by-Construction Non-Textual Representations and Targeted Code Repair.
ICLR
Mingjie Liu, Yun-Da Tsai, Wenfei Zhou, Haoxing Ren
2025 — conf
Cypress: VLSI-Inspired PCB Placement with GPU Acceleration.
ISPD
Niansong Zhang, Anthony Agnesina, Noor Shbat, Yuval Leader, Zhiru Zhang, Haoxing Ren
2025 A* conf
DCO-3D: Differentiable Congestion Optimization in 3D ICs.
DAC
Hao-Hsiang Hsiao, Yi-Chen Lu, Pruek Vanna-Iampikul, Anthony Agnesina, Rongjian Liang, Yuan-Hsiang Lu, Haoxing Ren, Sung Kyu Lim
2025 — conf
DRC-Coder: Automated DRC Checker Code Generation Using LLM Autonomous Agent.
ISPD
Chen-Chia Chang, Chia-Tung Ho, Yaguang Li, Yiran Chen, Haoxing Ren
2025 J jnl
Deep Physics Prior for First Order Inverse Optimization.
CoRR
Haoyu Yang, Kamyar Azizzadenesheli, Haoxing Ren
2025 J jnl
FVDebug: An LLM-Driven Debugging Assistant for Automated Root Cause Analysis of Formal Verification Failures.
CoRR
Yunsheng Bai, Ghaith Bany Hamad, Chia-Tung Ho, Syed Suhaib, Haoxing Ren
2025 A conf
FVEval: Understanding Language Model Capabilities in Formal Verification of Digital Hardware.
DATE
Minwoo Kang, Mingjie Liu, Ghaith Bany Hamad, Syed M. Suhaib, Haoxing Ren
2025 A* conf
GEM: GPU-Accelerated Emulator-Inspired RTL Simulation.
DAC
Zizheng Guo, Yanqing Zhang, Runsheng Wang, Yibo Lin, Haoxing Ren
2025 — conf
GOALPlace: Begin with the End in Mind.
ISPD
Anthony Agnesina, Rongjian Liang, Geraldo Pradipta, Anand Rajaram, Haoxing Ren
2025 — conf
GPU-Accelerated Inverse Lithography Towards High Quality Curvy Mask Generation.
ISPD
Haoyu Yang, Haoxing Ren
2025 J jnl
HeaRT: A Hierarchical Circuit Reasoning Tree-Based Agentic Framework for AMS Design Optimization.
CoRR
Souradip Poddar, Chia-Tung Ho, Ziming Wei, Weidong Cao, Haoxing Ren, David Z. Pan
2025 J jnl
HeuriGym: An Agentic Benchmark for LLM-Crafted Heuristics in Combinatorial Optimization.
CoRR
Hongzheng Chen, Yingheng Wang, Yaohui Cai, Hins Hu, Jiajie Li, Shirley Huang, Chenhui Deng, Rongjian Liang, Shufeng Kong, Haoxing Ren, Samitha Samaranayake, Carla P. Gomes, Zhiru Zhang
2025 A* conf
INSTA: An Ultra-Fast, Differentiable, Statistical Static Timing Analysis Engine for Industrial Physical Design Applications.
DAC
Yi-Chen Lu, Zhizheng Guo, Kishor Kunal, Rongjian Liang, Haoxing Ren
2025 A* conf
Intelligent OPC Engineer Assistant for Semiconductor Manufacturing.
AAAI
Guojin Chen, Haoyu Yang, Bei Yu, Haoxing Ren
2025 A conf
Invited Paper: 2025 ICCAD CAD Contest Problem C: Incremental Placement Optimization Beyond Detailed Placement: Simultaneous Gate Sizing, Buffering, and Cell Relocation.
ICCAD
Yi-Chen Lu, Rongjian Liang, Wen-Hao Liu, Haoxing Ren
2025 A conf
Invited Paper: LLM-Enhanced GPU-Optimized Physical Design at Scale.
ICCAD
Yi-Chen Lu, Hao-Hsiang Hsiao, Haoxing Ren
2025 — conf
Invited Paper: MLCAD 2025 Contest on ReSynthAI: Physical-aware Logic Resynthesis using AI.
MLCAD
Vikram Gopalakrishnan, Atmadip Dey, Rongjian Liang, Yanqing Zhang, Haoxing Ren, Vidya A. Chhabria
2025 — conf
Invited: ISPD 2025 Performance-Driven Large Scale Global Routing Contest.
ISPD
Rongjian Liang, Anthony Agnesina, Wen-Hao Liu, Matt Liberty, Hsin-Tzu Chang, Haoxing Ren
2025 J jnl
JARVIS: A Multi-Agent Code Assistant for High-Quality EDA Script Generation.
CoRR
Ghasem Pasandi, Kishor Kunal, Varun Tej, Kunjal Shan, Hanfei Sun, Sumit Jain, Chunhui Li, Chenhui Deng, Teodor-Dumitru Ene, Haoxing Ren, Sreedhar Pratty
2025 — conf
LEGO-Size: LLM-Enhanced GPU-Optimized Signoff-Accurate Differentiable VLSI Gate Sizing in Advanced Nodes.
ISPD
Yi-Chen Lu, Kishor Kunal, Geraldo Pradipta, Rongjian Liang, Ravikishore Gandikota, Haoxing Ren
2025 A conf
LLM4Verilog: Building Large-Scale, High-Quality Data Infrastructure for Verilog Code Generation via Community Efforts.
ICCAD
Zhongzhi Yu, Chaojian Li, Yongan Zhang, Mingjie Liu, Nathaniel Ross Pinckney, Wenfei Zhou, Rongjian Liang, Haoyu Yang, Haoxing Ren, Yingyan Celine Lin
2025 J jnl
Learning Library Cell Representations in Vector Space.
CoRR
Rongjian Liang, Yi-Chen Lu, Wen-Hao Liu, Haoxing Ren
2025 J jnl
Learning to Debug: LLM-Organized Knowledge Trees for Solving RTL Assertion Failures.
CoRR
Yunsheng Bai, Haoxing Ren
2025 A conf
Leveraging GPU for Better Detailed Placement Quality.
ICCAD
Chen-Han Lu, Wen-Hao Liu, Haoxing Ren, Ting-Chi Wang
2025 J jnl
LiDAR 2.0: Hierarchical Curvy Waveguide Detailed Routing for Large-Scale Photonic Integrated Circuits.
CoRR
Hongjian Zhou, Haoyu Yang, Ziang Yin, Nicholas Gangi, Zhaoran Huang, Haoxing Ren, Joaquin Matres, Jiaqi Gu
2025 J jnl
Marco: Configurable Graph-Based Task Solving and Multi-AI Agents Framework for Hardware Design.
CoRR
Chia-Tung Ho, Jing Gong, Yunsheng Bai, Chenhui Deng, Haoxing Ren, Brucek Khailany
2025 J jnl
Multimodal Chip Physical Design Engineer Assistant.
CoRR
Yun-Da Tsai, Chang-Yu Chao, Liang-Yeh Shen, Tsung-Han Lin, Haoyu Yang, Mark Ho, Yi-Chen Lu, Wen-Hao Liu, Shou-De Lin, Haoxing Ren
2025 — conf
Netlistify: Transforming Circuit Schematics into Netlists with Deep Learning.
MLCAD
Chun-Yen Huang, Hsuan-I Chen, Hao-Wen Ho, Pei-Hsin Kang, Mark Po-Hung Lin, Wen-Hao Liu, Haoxing Ren
2025 J jnl
PRO-V: An Efficient Program Generation Multi-Agent System for Automatic RTL Verification.
CoRR
Yujie Zhao, Zhijing Wu, Hejia Zhang, Zhongming Yu, Wentao Ni, Chia-Tung Ho, Haoxing Ren, Jishen Zhao
2025 J jnl
Photonics-Aware Planning-Guided Automated Electrical Routing for Large-Scale Active Photonic Integrated Circuits.
CoRR
Hongjian Zhou, Haoyu Yang, Nicholas Gangi, Bowen Liu, Meng Zhang, Haoxing Ren, Xu Wang, Z. Rena Huang, Jiaqi Gu
2025 J jnl
Polymath: A Self-Optimizing Agent with Dynamic Hierarchical Workflow.
CoRR
Chia-Tung Ho, Jing Gong, Xufeng Yao, Yunsheng Bai, Abhishek B. Akkur, Haoxing Ren
2025 A* conf
Reinforcement Learning-Driven Window Selection for Enhanced Window-Based Rip-up and Reroute in Chip Detailed Routing.
DAC
Yu-Chan Keng, Yu-Chun Pai, Wen-Hao Liu, Haoxing Ren, Danny Liu, Rongjian Liang, Mark Ho, Anthony Agnesina, Yih-Lang Li
2025 J jnl
Revisiting VerilogEval: A Year of Improvements in Large-Language Models for Hardware Code Generation.
ACM Trans. Design Autom. Electr. Syst.
Nathaniel Ross Pinckney, Christopher Batten, Mingjie Liu, Haoxing Ren, Brucek Khailany
2025 — conf
ScaleRTL: Scaling LLMs with Reasoning Data and Test-Time Compute for Accurate RTL Code Generation.
MLCAD
Chenhui Deng, Yun-Da Tsai, Guan-Ting Liu, Zhongzhi Yu, Haoxing Ren
2025 J jnl
ScaleRTL: Scaling LLMs with Reasoning Data and Test-Time Compute for Accurate RTL Code Generation.
CoRR
Chenhui Deng, Yun-Da Tsai, Guan-Ting Liu, Zhongzhi Yu, Haoxing Ren
2025 J jnl
SchemaCoder: Automatic Log Schema Extraction Coder with Residual Q-Tree Boosting.
CoRR
Lily Jiaxin Wan, Chia-Tung Ho, Rongjian Liang, Cunxi Yu, Deming Chen, Haoxing Ren
2025 — conf
SimPart: A Simple Yet Effective Replication-Aided Partitioning Algorithm for Logic Simulation on GPU.
Euro-Par (3)
Yi-Hua Chung, Shui Jiang, Wan-Luan Lee, Yanqing Zhang, Haoxing Ren, Tsung-Yi Ho, Tsung-Wei Huang
2025 J jnl
Spec2RTL-Agent: Automated Hardware Code Generation from Complex Specifications Using LLM Agent Systems.
CoRR
Zhongzhi Yu, Mingjie Liu, Michael Zimmer, Yingyan Celine Lin, Yong Liu, Haoxing Ren
2025 J jnl
Timing Analysis Agent: Autonomous Multi-Corner Multi-Mode (MCMM) Timing Debugging with Timing Debug Relation Graph.
CoRR
Jatin Nainani, Chia-Tung Ho, Anirudh Dhurka, Haoxing Ren
2025 A* conf
VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool.
AAAI
Chia-Tung Ho, Haoxing Ren, Brucek Khailany
2024 A conf
2024 ICCAD CAD Contest Problem C: Scalable Logic Gate Sizing Using ML Techniques and GPU Acceleration.
ICCAD
Bing-Yue Wu, Rongjian Liang, Geraldo Pradipta, Anthony Agnesina, Haoxing Ren, Vidya A. Chhabria
2024 J jnl
Assessing Economic Viability: A Comparative Analysis of Total Cost of Ownership for Domain-Adapted Large Language Models versus State-of-the-art Counterparts in Chip Design Coding Assistance.
CoRR
Amit Sharma, Teodor-Dumitru Ene, Kishor Kunal, Mingjie Liu, Zafar Hasan, Haoxing Ren
2024 J jnl
BOSON
CoRR
Pingchuan Ma, Zhengqi Gao, Amir Begovic, Meng Zhang, Haoyu Yang, Haoxing Ren, Zhaoran Rena Huang, Duane S. Boning, Jiaqi Gu
2024 A conf
BoolGebra: Attributed Graph-Learning for Boolean Algebraic Manipulation.
DATE
Yingjie Li, Anthony Agnesina, Yanqing Zhang, Haoxing Ren, Cunxi Yu
2024 J jnl
BoolGebra: Attributed Graph-learning for Boolean Algebraic Manipulation.
CoRR
Yingjie Li, Anthony Agnesina, Yanqing Zhang, Haoxing Ren, Cunxi Yu
2024 J jnl
ChipAlign: Instruction Alignment in Large Language Models for Chip Design via Geodesic Interpolation.
CoRR
Chenhui Deng, Yunsheng Bai, Haoxing Ren
2024 J jnl
Code Less, Align More: Efficient LLM Fine-tuning for Code Generation with Data Pruning.
CoRR
Yun-Da Tsai, Mingjie Liu, Haoxing Ren
2024 J jnl
CraftRTL: High-quality Synthetic Data Generation for Verilog Code Models with Correct-by-Construction Non-Textual Representations and Targeted Code Repair.
CoRR
Mingjie Liu, Yun-Da Tsai, Wenfei Zhou, Haoxing Ren
2024 J jnl
DAG-Aware Synthesis Orchestration.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yingjie Li, Mingju Liu, Haoxing Ren, Alan Mishchenko, Cunxi Yu
2024 A* conf
DGR: Differentiable Global Router.
DAC
Wei Li, Rongjian Liang, Anthony Agnesina, Haoyu Yang, Chia-Tung Ho, Anand Rajaram, Haoxing Ren
2024 J jnl
DRC-Coder: Automated DRC Checker Code Generation Using LLM Autonomous Agent.
CoRR
Chen-Chia Chang, Chia-Tung Ho, Yaguang Li, Yiran Chen, Haoxing Ren
2024 J jnl
Differentiable Edge-based OPC.
CoRR
Guojin Chen, Haoyu Yang, Haoxing Ren, Bei Yu, David Z. Pan
2024 Misc conf
Domain-Adapted LLMs for VLSI Design and Verification: A Case Study on Formal Verification.
VTS
Mingjie Liu, Minwoo Kang, Ghaith Bany Hamad, Syed Suhaib, Haoxing Ren
2024 J jnl
FVEval: Understanding Language Model Capabilities in Formal Verification of Digital Hardware.
CoRR
Minwoo Kang, Mingjie Liu, Ghaith Bany Hamad, Syed Suhaib, Haoxing Ren
2024 J jnl
GAN-Place: Advancing Open Source Placers to Commercial-quality Using Generative Adversarial Networks and Transfer Learning.
ACM Trans. Design Autom. Electr. Syst.
Yi-Chen Lu, Haoxing Ren, Hao-Hsiang Hsiao, Sung Kyu Lim
2024 A conf
GL0AM: GPU Logic Simulation Using 0-Delay and Re-simulation Acceleration Method.
ICCAD
Yanqing Zhang, Haoxing Ren, Brucek Khailany
2024 J jnl
GOALPlace: Begin with the End in Mind.
CoRR
Anthony Agnesina, Rongjian Liang, Geraldo Pradipta, Anand Rajaram, Haoxing Ren
2024 J jnl
GPU-Accelerated Inverse Lithography Towards High Quality Curvy Mask Generation.
CoRR
Haoyu Yang, Haoxing Ren
2024 — conf
GPU/ML-Enhanced Large Scale Global Routing Contest.
ISPD
Rongjian Liang, Anthony Agnesina, Wen-Hao Liu, Haoxing Ren
2024 A* conf
ILILT: Implicit Learning of Inverse Lithography Technologies.
ICML
Haoyu Yang, Haoxing Ren
2024 J jnl
ILILT: Implicit Learning of Inverse Lithography Technologies.
CoRR
Haoyu Yang, Haoxing Ren
2024 J jnl
Intelligent OPC Engineer Assistant for Semiconductor Manufacturing.
CoRR
Guojin Chen, Haoyu Yang, Bei Yu, Haoxing Ren
2024 A conf
Invited Paper: LLM4HWDesign Contest: Constructing a Comprehensive Dataset for LLM-Assisted Hardware Code Generation with Community Efforts.
ICCAD
Zhongzhi Yu, Chaojian Li, Yongan Zhang, Mingjie Liu, Nathaniel Ross Pinckney, Wenfei Zhou, Haoyu Yang, Rongjian Liang, Haoxing Ren, Yingyan Celine Lin
2024 J jnl
Large Language Model (LLM) for Standard Cell Layout Design Optimization.
CoRR
Chia-Tung Ho, Haoxing Ren
2024 — conf
Learning to Compare Hardware Designs for High-Level Synthesis.
MLCAD
Yunsheng Bai, Atefeh Sohrabizadeh, Zijian Ding, Rongjian Liang, Weikai Li, Ding Wang, Haoxing Ren, Yizhou Sun, Jason Cong
2024 J jnl
Learning to Compare Hardware Designs for High-Level Synthesis.
CoRR
Yunsheng Bai, Atefeh Sohrabizadeh, Zijian Ding, Rongjian Liang, Weikai Li, Ding Wang, Haoxing Ren, Yizhou Sun, Jason Cong
2024 — conf
MedPart: A Multi-Level Evolutionary Differentiable Hypergraph Partitioner.
ISPD
Rongjian Liang, Anthony Agnesina, Haoxing Ren
2024 — conf
Novel Transformer Model Based Clustering Method for Standard Cell Design Automation.
ISPD
Chia-Tung Ho, Ajay Chandna, David Guan, Alvin Ho, Minsoo Kim, Yaguang Li, Haoxing Ren
2024 Misc conf
OpenROAD and CircuitOps: Infrastructure for ML EDA Research and Education.
VTS
Vidya A. Chhabria, Wenjing Jiang, Andrew B. Kahng, Rongjian Liang, Haoxing Ren, Sachin S. Sapatnekar, Bing-Yue Wu
2024 — conf
Optimizing Predictive AI in Physical Design Flows with Mini Pixel Batch Gradient Descent.
MLCAD
Haoyu Yang, Anthony Agnesina, Haoxing Ren
2024 J jnl
Optimizing Predictive AI in Physical Design Flows with Mini Pixel Batch Gradient Descent.
CoRR
Haoyu Yang, Anthony Agnesina, Haoxing Ren
2024 — conf
PyHDL-Eval: An LLM Evaluation Framework for Hardware Design Using Python-Embedded DSLs.
MLCAD
Christopher Batten, Nathaniel Ross Pinckney, Mingjie Liu, Haoxing Ren, Brucek Khailany
2024 A* conf
RTLFixer: Automatically Fixing RTL Syntax Errors with Large Language Model.
DAC
Yunda Tsai, Mingjie Liu, Haoxing Ren
2024 — conf
ReLS: Retrieval Is Efficient Knowledge Transfer For Logic Synthesis.
MLCAD
Rongjian Liang, Chia-Tung Ho, Anthony Agnesina, Wen-Hao Liu, Haoxing Ren
2024 J jnl
Revisiting VerilogEval: Newer LLMs, In-Context Learning, and Specification-to-RTL Tasks.
CoRR
Nathaniel Ross Pinckney, Christopher Batten, Mingjie Liu, Haoxing Ren, Brucek Khailany
2024 J jnl
VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool.
CoRR
Chia-Tung Ho, Haoxing Ren, Brucek Khailany
2023 A conf
An Adversarial Active Sampling-Based Data Augmentation Framework for AI-Assisted Lithography Modeling.
ICCAD
Mingjie Liu, Haoyu Yang, Brucek Khailany, Haoxing Ren
2023 — conf
AutoDMP: Automated DREAMPlace-based Macro Placement.
ISPD
Anthony Agnesina, Puranjay Rajvanshi, Tian Yang, Geraldo Pradipta, Austin Jiao, Ben Keller, Brucek Khailany, Haoxing Ren
2023 — conf
BufFormer: A Generative ML Framework for Scalable Buffering.
ASP-DAC
Rongjian Liang, Siddhartha Nath, Anand Rajaram, Jiang Hu, Haoxing Ren
2023 J jnl
ChipNeMo: Domain-Adapted LLMs for Chip Design.
CoRR
Mingjie Liu, Teodor-Dumitru Ene, Robert Kirby, Chris Cheng, Nathaniel Ross Pinckney, Rongjian Liang, Jonah Alben, Himyanshu Anand, Sanmitra Banerjee, Ismet Bayraktaroglu, Bonita Bhaskaran, Bryan Catanzaro, Arjun Chaudhuri, Sharon Clay, Bill Dally, Laura Dang, Parikshit Deshpande, Siddhanth Dhodhi, Sameer Halepete, Eric Hill, Jiashang Hu, Sumit Jain, Brucek Khailany, Kishor Kunal, Xiaowei Li, Hao Liu, Stuart F. Oberman, Sujeet Omar, Sreedhar Pratty, Jonathan Raiman, Ambar Sarkar, Zhengjiang Shao, Hanfei Sun, Pratik P. Suthar, Varun Tej, Kaizhe Xu, Haoxing Ren
2023 — conf
DREAM-GAN: Advancing DREAMPlace towards Commercial-Quality using Generative Adversarial Learning.
ISPD
Yi-Chen Lu, Haoxing Ren, Hao-Hsiang Hsiao, Sung Kyu Lim
2023 — conf
Enabling Scalable AI Computational Lithography with Physics-Inspired Models.
ASP-DAC
Haoyu Yang, Haoxing Ren
2023 A* conf
GenFuzz: GPU-accelerated Hardware Fuzzing using Genetic Algorithm with Multiple Inputs.
DAC
Dian-Lun Lin, Yanqing Zhang, Haoxing Ren, Brucek Khailany, Shih-Hsin Wang, Tsung-Wei Huang
2023 J jnl
Introduction to the Special Issue on Machine Learning for CAD/EDA.
ACM Trans. Design Autom. Electr. Syst.
Yibo Lin, Avi Ziv, Haoxing Ren
2023 A conf
Invited Paper: CircuitOps: An ML Infrastructure Enabling Generative AI for VLSI Circuit Optimization.
ICCAD
Rongjian Liang, Anthony Agnesina, Geraldo Pradipta, Vidya A. Chhabria, Haoxing Ren
2023 A conf
Invited Paper: VerilogEval: Evaluating Large Language Models for Verilog Code Generation.
ICCAD
Mingjie Liu, Nathaniel Ross Pinckney, Brucek Khailany, Haoxing Ren
2023 J jnl
Machine Learning and Algorithms: Let Us Team Up for EDA.
IEEE Des. Test
Haoxing Ren, Brucek Khailany, Matthew Fojtik, Yanqing Zhang
2023 — conf
NVCell 2: Routability-Driven Standard Cell Layout in Advanced Nodes with Lattice Graph Routability Model.
ISPD
Chia-Tung Ho, Alvin Ho, Matthew Fojtik, Minsoo Kim, Shang Wei, Yaguang Li, Brucek Khailany, Haoxing Ren
2023 J jnl
RTLFixer: Automatically Fixing RTL Syntax Errors with Large Language Models.
CoRR
Yun-Da Tsai, Mingjie Liu, Haoxing Ren
2023 — conf
Reinforcement Learning Guided Detailed Routing for Custom Circuits.
ISPD
Hao Chen, Kai-Chieh Hsu, Walker J. Turner, Po-Hsuan Wei, Keren Zhu, David Z. Pan, Haoxing Ren
2023 J jnl
VerilogEval: Evaluating Large Language Models for Verilog Code Generation.
CoRR
Mingjie Liu, Nathaniel Ross Pinckney, Brucek Khailany, Haoxing Ren
2022 J jnl
An Adversarial Active Sampling-based Data Augmentation Framework for Manufacturable Chip Design.
CoRR
Mingjie Liu, Haoyu Yang, Zongyi Li, Kumara Sastry, Saumyadip Mukhopadhyay, Selim Dogru, Anima Anandkumar, David Z. Pan, Brucek Khailany, Haoxing Ren
2022 — conf
AutoCRAFT: Layout Automation for Custom Circuits in Advanced FinFET Technologies.
ISPD
Hao Chen, Walker J. Turner, Sanquan Song, Keren Zhu, George F. Kokai, Brian Zimmer, C. Thomas Gray, Brucek Khailany, David Z. Pan, Haoxing Ren
2022 — conf
Embracing Machine Learning in EDA.
ISPD
Haoxing Ren
2022 B conf
From RTL to CUDA: A GPU Acceleration Flow for RTL Simulation with Batch Stimulus.
ICPP
Dian-Lun Lin, Haoxing Ren, Yanqing Zhang, Brucek Khailany, Tsung-Wei Huang
2022 J jnl
GATSPI: GPU Accelerated Gate-Level Simulation for Power Improvement.
CoRR
Yanqing Zhang, Haoxing Ren, Akshay Sridharan, Brucek Khailany
2022 A* conf
GATSPI: GPU accelerated gate-level simulation for power improvement.
DAC
Yanqing Zhang, Haoxing Ren, Akshay Sridharan, Brucek Khailany
2022 A* conf
Generative self-supervised learning for gate sizing: invited.
DAC
Siddhartha Nath, Geraldo Pradipta, Corey Hu, Tian Yang, Brucek Khailany, Haoxing Ren
2022 J jnl
Generic Lithography Modeling with Dual-band Optics-Inspired Neural Networks.
CoRR
Haoyu Yang, Zongyi Li, Kumara Sastry, Saumyadip Mukhopadhyay, Mark Kilgard, Anima Anandkumar, Brucek Khailany, Vivek Singh, Haoxing Ren
2022 A* conf
Generic lithography modeling with dual-band optics-inspired neural networks.
DAC
Haoyu Yang, Zongyi Li, Kumara Sastry, Saumyadip Mukhopadhyay, Mark Kilgard, Anima Anandkumar, Brucek Khailany, Vivek Singh, Haoxing Ren
2022 J jnl
Large Scale Mask Optimization Via Convolutional Fourier Neural Operator and Litho-Guided Self Training.
CoRR
Haoyu Yang, Zongyi Li, Kumara Sastry, Saumyadip Mukhopadhyay, Anima Anandkumar, Brucek Khailany, Vivek Singh, Haoxing Ren
2022 — conf
Placement Optimization via PPA-Directed Graph Clustering.
MLCAD
Yi-Chen Lu, Tian Yang, Sung Kyu Lim, Haoxing Ren
2022 A conf
Routability-Aware Placement for Advanced FinFET Mixed-Signal Circuits using Satisfiability Modulo Theories.
DATE
Hao Chen, Walker J. Turner, David Z. Pan, Haoxing Ren
2022 J jnl
TAG: Learning Circuit Spatial Embedding From Layouts.
CoRR
Keren Zhu, Hao Chen, Walker J. Turner, George F. Kokai, Po-Hsuan Wei, David Z. Pan, Haoxing Ren
2022 A conf
TAG: Learning Circuit Spatial Embedding from Layouts.
ICCAD
Keren Zhu, Hao Chen, Walker J. Turner, George F. Kokai, Po-Hsuan Wei, David Z. Pan, Haoxing Ren
2022 A conf
TransSizer: A Novel Transformer-Based Fast Gate Sizer.
ICCAD
Siddhartha Nath, Geraldo Pradipta, Corey Hu, Tian Yang, Brucek Khailany, Haoxing Ren
2022 A conf
Why are Graph Neural Networks Effective for EDA Problems?: (Invited Paper).
ICCAD
Haoxing Ren, Siddhartha Nath, Yanqing Zhang, Hao Chen, Mingjie Liu
2022 — conf
XT-PRAGGMA: Crosstalk Pessimism Reduction Achieved with GPU Gate-level Simulations and Machine Learning.
MLCAD
Vidya A. Chhabria, Ben Keller, Yanqing Zhang, Sandeep Vollala, Sreedhar Pratty, Haoxing Ren, Brucek Khailany
2021 A conf
2021 ICCAD CAD Contest Problem C: GPU Accelerated Logic Rewriting.
ICCAD
Ghasem Pasandi, Sreedhar Pratty, David Brown, Yanqing Zhang, Haoxing Ren, Brucek Khailany
2021 J jnl
DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yibo Lin, Zixuan Jiang, Jiaqi Gu, Wuxi Li, Shounak Dhar, Haoxing Ren, Brucek Khailany, David Z. Pan
2021 A* conf
Invited- NVCell: Standard Cell Layout in Advanced Technology Nodes with Reinforcement Learning.
DAC
Haoxing Ren, Matthew Fojtik
2021 A conf
MAVIREC: ML-Aided Vectored IR-Drop Estimation and Classification.
DATE
Vidya A. Chhabria, Yanqing Zhang, Haoxing Ren, Ben Keller, Brucek Khailany, Sachin S. Sapatnekar
2021 J jnl
NVCell: Standard Cell Layout in Advanced Technology Nodes with Reinforcement Learning.
CoRR
Haoxing Ren, Matthew Fojtik, Brucek Khailany
2021 A conf
Optimizing VLSI Implementation with Reinforcement Learning - ICCAD Special Session Paper.
ICCAD
Haoxing Ren, Saad Godil, Brucek Khailany, Robert Kirby, Haiguang Liao, Siddhartha Nath, Jonathan Raiman, Rajarshi Roy
2021 A conf
Parasitic-Aware Analog Circuit Sizing with Graph Neural Networks and Bayesian Optimization.
DATE
Mingjie Liu, Walker J. Turner, George F. Kokai, Brucek Khailany, David Z. Pan, Haoxing Ren
2021 — conf
Standard Cell Routing with Reinforcement Learning and Genetic Algorithm in Advanced Technology Nodes.
ASP-DAC
Haoxing Ren, Matthew Fojtik
2021 J jnl
VS-Quant: Per-vector Scaled Quantization for Accurate Low-Precision Neural Network Inference.
CoRR
Steve Dai, Rangharajan Venkatesan, Haoxing Ren, Brian Zimmer, William J. Dally, Brucek Khailany
2021 J jnl
Verifying High-Level Latency-Insensitive Designs with Formal Model Checking.
CoRR
Steve Dai, Alicia Klinefelter, Haoxing Ren, Rangharajan Venkatesan, Ben Keller, Nathaniel Ross Pinckney, Brucek Khailany
2020 J jnl
ABCDPlace: Accelerated Batch-Based Concurrent Detailed Placement on Multithreaded CPUs and GPUs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yibo Lin, Wuxi Li, Jiaqi Gu, Haoxing Ren, Brucek Khailany, David Z. Pan
2020 J jnl
Accelerating Chip Design With Machine Learning.
IEEE Micro
Brucek Khailany, Haoxing Ren, Steve Dai, Saad Godil, Ben Keller, Robert Kirby, Alicia Klinefelter, Rangharajan Venkatesan, Yanqing Zhang, Bryan Catanzaro, William J. Dally
2020 — conf
FIST: A Feature-Importance Sampling and Tree-Based Method for Automatic Design Flow Parameter Tuning.
ASP-DAC
Zhiyao Xie, Guan-Qi Fang, Yu-Hung Huang, Haoxing Ren, Yanqing Zhang, Brucek Khailany, Shao-Yun Fang, Jiang Hu, Yiran Chen, Erick Carvajal Barboza
2020 J jnl
FIST: A Feature-Importance Sampling and Tree-Based Method for Automatic Design Flow Parameter Tuning.
CoRR
Zhiyao Xie, Guan-Qi Fang, Yu-Hung Huang, Haoxing Ren, Yanqing Zhang, Brucek Khailany, Shao-Yun Fang, Jiang Hu, Yiran Chen, Erick Carvajal Barboza
2020 A* conf
GRANNITE: Graph Neural Network Inference for Transferable Power Estimation.
DAC
Yanqing Zhang, Haoxing Ren, Brucek Khailany
2020 J jnl
MAVIREC: ML-Aided Vectored IR-DropEstimation and Classification.
CoRR
Vidya A. Chhabria, Yanqing Zhang, Haoxing Ren, Ben Keller, Brucek Khailany, Sachin S. Sapatnekar
2020 — conf
ML for CAD - Where is the Treasure Hiding?
MLCAD
Raviv Gal, David Z. Pan, Haoxing Ren, Manish Pandey, Marilyn Wolf, Avi Ziv
2020 A conf
Opportunities for RTL and Gate Level Simulation using GPUs (Invited Talk).
ICCAD
Yanqing Zhang, Haoxing Ren, Brucek Khailany
2020 A* conf
ParaGraph: Layout Parasitics and Device Parameter Prediction using Graph Neural Networks.
DAC
Haoxing Ren, George F. Kokai, Walker J. Turner, Ting-Sheng Ku
2020 — conf
PowerNet: Transferable Dynamic IR Drop Estimation via Maximum Convolutional Neural Network.
ASP-DAC
Zhiyao Xie, Haoxing Ren, Brucek Khailany, Ye Sheng, Santosh Santosh, Jiang Hu, Yiran Chen
2020 J jnl
PowerNet: Transferable Dynamic IR Drop Estimation via Maximum Convolutional Neural Network.
CoRR
Zhiyao Xie, Haoxing Ren, Brucek Khailany, Ye Sheng, Santosh Santosh, Jiang Hu, Yiran Chen
2020 A conf
Problem C: GPU Accelerated Logic Re-simulation : (Invited Talk).
ICCAD
Yanqing Zhang, Haoxing Ren, Ben Keller, Brucek Khailany
2019 A* conf
DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement.
DAC
Yibo Lin, Shounak Dhar, Wuxi Li, Haoxing Ren, Brucek Khailany, David Z. Pan
2019 A* conf
High Performance Graph Convolutional Networks with Applications in Testability Analysis.
DAC
Yuzhe Ma, Haoxing Ren, Brucek Khailany, Harbinder Sikka, Lijuan Luo, Karthikeyan Natarajan, Bei Yu
2019 A* conf
PRIMAL: Power Inference using Machine Learning.
DAC
Yuan Zhou, Haoxing Ren, Yanqing Zhang, Ben Keller, Brucek Khailany, Zhiru Zhang
2019 A conf
Routability-Driven Macro Placement with Embedded CNN-Based Prediction Model.
DATE
Yu-Hung Huang, Zhiyao Xie, Guan-Qi Fang, Tao-Chun Yu, Haoxing Ren, Shao-Yun Fang, Yiran Chen, Jiang Hu
2019 — conf
Toward Intelligent Physical Design: Deep Learning and GPU Acceleration.
ISPD
Haoxing Ren
2018 A conf
RouteNet: routability prediction for mixed-size designs using convolutional neural network.
ICCAD
Zhiyao Xie, Yu-Hung Huang, Guan-Qi Fang, Haoxing Ren, Shao-Yun Fang, Yiran Chen, Jiang Hu
2014 — conf
A brief introduction on contemporary High-Level Synthesis.
ICICDT
Haoxing Ren
2013 A conf
Intuitive ECO synthesis for high performance circuits.
DATE
Haoxing Ren, Ruchir Puri, Lakshmi N. Reddy, Smita Krishnaswamy, Cindy Washburn, Joel Earl, Joachim Keinert
2013 A conf
LatchPlanner: latch placement algorithm for datapath-oriented high-performance VLSI designs.
ICCAD
Minsik Cho, Hua Xiang, Haoxing Ren, Matthew M. Ziegler, Ruchir Puri
2013 — conf
Network flow based datapath bit slicing.
ISPD
Hua Xiang, Minsik Cho, Haoxing Ren, Matthew M. Ziegler, Ruchir Puri
2011 J jnl
Design methodology for the IBM POWER7 microprocessor.
IBM J. Res. Dev.
Joshua Friedrich, Ruchir Puri, Uwe Brandt, Markus Bühler, Jack DiLullo, Jeremy Hopkins, Mozammel Hossain, Michael A. Kazda, Joachim Keinert, Zahi M. Kurzum, Douglass Lamb, Alice Lee, Frank Musante, Jens Noack, Peter J. Osler, Stephen D. Posluszny, Haifeng Qian, Shyam Ramji, Vasant B. Rao, Lakshmi N. Reddy, Haoxing Ren, Thomas E. Rosser, Benjamin R. Russell, Cliff C. N. Sze, Gustavo E. Téllez
2010 A* conf
History-based VLSI legalization using network flow.
DAC
Minsik Cho, Haoxing Ren, Hua Xiang, Ruchir Puri
2010 — conf
Logical and physical restructuring of fan-in trees.
ISPD
Hua Xiang, Haoxing Ren, Louise Trevillyan, Lakshmi N. Reddy, Ruchir Puri, Minsik Cho
2009 A conf
DeltaSyn: An efficient logic difference optimizer for ECO synthesis.
ICCAD
Smita Krishnaswamy, Haoxing Ren, Nilesh Modi, Ruchir Puri
2009 A conf
Low cost test point insertion without using extra registers for high performance design.
ITC
Haoxing Ren, Mary P. Kusko, Victor N. Kravets, Rona Yaari
2008 — ch.
Placement-Driven Synthesis Design Closure Tool.
Handbook of Algorithms for Physical Design Automation
Charles J. Alpert, Nathaniel Hieter, Arjen Mets, Ruchir Puri, Lakshmi N. Reddy, Haoxing Ren, Louise Trevillyan
2008 — ch.
Timing-Driven Placement.
Handbook of Algorithms for Physical Design Automation
David Z. Pan, Bill Halpin, Haoxing Ren
2007 J jnl
Diffusion-Based Placement Migration With Application on Legalization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Haoxing Ren, David Z. Pan, Charles J. Alpert, Paul G. Villarrubia, Gi-Joon Nam
2007 — conf
Hippocrates: First-Do-No-Harm Detailed Placement.
ASP-DAC
Haoxing Ren, David Z. Pan, Charles J. Alpert, Gi-Joon Nam, Paul G. Villarrubia
2007 A* conf
RQL: Global Placement via Relaxed Quadratic Spreading and Linearization.
DAC
Natarajan Viswanathan, Gi-Joon Nam, Charles J. Alpert, Paul Villarrubia, Haoxing Ren, Chris C. N. Chu
2007 J jnl
Techniques for Fast Physical Synthesis.
Proc. IEEE
Charles J. Alpert, Shrirang K. Karandikar, Zhuo Li, Gi-Joon Nam, Stephen T. Quay, Haoxing Ren, Cliff C. N. Sze, Paul G. Villarrubia, Mehmet Can Yildiz
2007 — conf
The nuts and bolts of physical synthesis.
SLIP
Charles J. Alpert, Shrirang K. Karandikar, Zhuo Li, Gi-Joon Nam, Stephen T. Quay, Haoxing Ren, Cliff C. N. Sze, Paul G. Villarrubia, Mehmet Can Yildiz
2005 A conf
Computational geometry based placement migration.
ICCAD
Tao Luo, Haoxing Ren, Charles J. Alpert, David Zhigang Pan
2005 A* conf
Diffusion-based placement migration.
DAC
Haoxing Ren, David Zhigang Pan, Charles J. Alpert, Paul Villarrubia
2005 J jnl
Sensitivity guided net weighting for placement-driven synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Haoxing Ren, David Zhigang Pan, David S. Kung
2004 — conf
Sensitivity guided net weighting for placement driven synthesis.
ISPD
Haoxing Ren, David Zhigang Pan, David S. Kung
2004 A conf
True crosstalk aware incremental placement with noise map.
ICCAD
Haoxing Ren, David Zhigang Pan, Paul Villarrubia