| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2020 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2020 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2019 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2018 | A | conf |
ICCAD
|
| 2018 | C | conf |
ICCD
|
| 2018 | — | conf |
HPCC/SmartCity/DSS
|
| 2018 | — | conf |
ASP-DAC
|
| 2018 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2017 | A | conf |
DATE
|
| 2017 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2017 | A* | conf |
DAC
|
| 2017 | — | conf |
Modular reinforcement learning for self-adaptive energy efficiency optimization in multicore system.
ASP-DAC
|
| 2016 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2016 | J | jnl |
Alleviate Chip Pin Constraint for Multicore Processor by On/Off-Chip Power Delivery System Codesign.
ACM J. Emerg. Technol. Comput. Syst.
|
| 2016 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2016 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2016 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2016 | — | conf |
AISTECS@HiPEAC
|
| 2015 | A | conf |
DATE
|
| 2015 | — | conf |
ASP-DAC
|