Hao San

48 papers C 1Misc 1Journal 18Unranked 28
YearRankTypeTitle / Venue / Authors
2025 J jnl
Foreword.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Hao San
2024 — conf
Asynchronous SAR ADC with Parallel Comparators Inspired by Hopfield Network.
ISPACS
Keita Noda, Hao San, Xueyan Bai, Shogo Katayama, Dan Yao, Anna Kuwana, Zifei Xu, Haruo Kobayashi
2023 J jnl
Thermal Noise Analysis of Ring Amplifier in Cyclic Analog-to-Digital Converter.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Eiki Kayama, Kenta Mori, Taichi Maebou, Yuanchi Chen, Hao San, Tatsuji Matsuura, Masao Hotta
2022 — conf
A Study on the Efficient Design of Adders Using Adiabatic Quantum-Flux-Parametron Circuits.
GCCE
Tomoharu Yamauchi, Hao San, Nobuyuki Yoshikawa, Olivia Chen
2021 — conf
A 0.7V 14bit Hybrid ADC in 65nm SOTB CMOS.
ISPACS
Taichi Maebou, Yuanchi Chen, Eiki Kayama, Kenta Mori, Hao San, Tatsuji Matsuura, Masao Hotta
2021 — conf
A 0.8V 14bit 294kSPS non-binary cyclic ADC in 65nm SOTB CMOS technology.
ISPACS
Eiki Kayama, Kenta Mori, Taichi Maebou, Yuanchi Chen, Hao San, Tatsuji Matsuura, Masao Hotta
2021 — conf
A Low-voltage Non-binary Cyclic ADC using Fully Differential Ring Amplifier.
ISPACS
Kenta Mori, Eiki Kayama, Taichi Maebou, Yuanchi Chen, Hao San, Tatsuji Matsuura, Masao Hotta
2021 — conf
Linearity Compensation for Conversion Error in Non-binary and Binary Hybrid ADC.
ISPACS
Yuanchi Chen, Hao San
2020 J jnl
Foreword.
IEICE Trans. Electron.
Hao San
2019 — conf
A 0.8V 14bit 62.5kSPS non-binary cyclic ADC using SOTB CMOS technology.
ISPACS
Shuichiro Yamada, Toshiki Ohtsu, Minami Sasaki, Hao San, Tatsuji Matsuura, Masao Hotta
2019 J jnl
A 6th-Order Quadrature Bandpass Delta Sigma AD Modulator Using Dynamic Amplifier and Noise Coupling SAR Quantizer.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Chunhui Pan, Hao San
2019 — conf
Analog / Mixed-Signal / RF Circuits for Complex Signal Processing.
ASICON
Haruo Kobayashi, Nene Kushita, Minh Tri Tran, Koji Asami, Hao San, Anna Kuwana, Akemi Hatta
2019 J jnl
Experimental implementation of delta sigma AD modulator using dynamic analog components with simplified operation phase.
IEICE Electron. Express
Chunhui Pan, Hao San
2018 J jnl
A 2nd-Order ΔΣAD Modulator Using Dynamic Analog Components with Simplified Operation Phase.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Chunhui Pan, Hao San
2018 — conf
A 6th-Order Complex Bandpass ΔΣ AD Modulator Using Dynamic Amplifier and Noise Coupling SAR Quantizer.
ISPACS
Chunhui Pan, Hao San
2018 — conf
A 720µW 77.93dB SNDR ΔΣ AD Modulator Using Dynamic Analog Components With Simplified Operation Phase.
ISPACS
Chunhui Pan, Hao San, Tsugumichi Shibata
2018 J jnl
A Noise Coupled ΔΣAD Modulator Using Passive Adder Embedded Noise Shaping SAR Quantizer.
IEICE Trans. Electron.
Chunhui Pan, Hao San
2017 — conf
A 12-Bit 3.3MS/S pipeline cyclic ADC with correlated level shifting technique.
ISPACS
Koken Chin, Yuta Mishima, Yuki Watanabe, Hiroyuki Tsuchiya, Hao San, Tatsuji Matsuura, Masao Hotta
2017 J jnl
A 12-bit 1.25MS/s Area-Efficient Radix-Value Self-Estimated Non-Binary Cyclic ADC with Relaxed Requirements on Analog Components.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Hao San, Rompei Sugawara, Masao Hotta, Tatsuji Matsuura, Kazuyuki Aihara
2017 — conf
A 14bit 80kSPS non-binary cyclic ADC without high accuracy analog components.
ASP-DAC
Yuki Watanabe, Hayato Narita, Hiroyuki Tsuchiya, Tatsuji Matsuura, Hao San, Masao Hotta
2017 — conf
A 2nd-order ΔΣAD modulator using ring amplifier and SAR quantizer with simplified operation mode.
MIXDES
Chunhui Pan, Hao San, Tsugumichi Shibata
2017 — conf
Experimental results of reconfigurable non-binary cyclic ADC.
ISPACS
Yuki Watanabe, Koken Chin, Hiroyuki Tsuchiya, Hao San, Tatsuji Matsuura, Masao Hotta
2017 — conf
Non-binary cyclic ADC with correlated level shifting technique.
ASP-DAC
Hiroyuki Tsuchiya, Asato Uchiyama, Yuta Misima, Yuki Watanabe, Tatsuji Matsuura, Hao San, Masao Hotta
2017 — conf
Non-binary cyclic and binary SAR hybrid ADC.
MIXDES
Kota Inoue, Tatsuji Matsuura, Akira Hyogo, Hao San
2017 — conf
The design of a 14-bit 400kSPS non-binary pipeline cyclic ADC.
ISPACS
Hiroyuki Tsuchiya, Yuki Watanabe, Koken Chin, Hao San, Tatsuji Matsuura, Masao Hotta
2016 — conf
A 2nd-order Delta Sigma AD modulator using dynamic amplifier and dynamic SAR quantizer.
ISPACS
Chunhui Pan, Hao San, Tsugumichi Shibata
2016 — conf
Leakage current compensation technique of ESD protection circuit for CMOS operational amplifier.
ISPACS
Koken Chin, Hao San, Atsushi Kitajima, Yoshiaki Arai, Jun Yamashita, Hisashi Ito
2015 — conf
A 10-bit 10Ms/s pipeline cyclic ADC based on β-expansion.
ISPACS
Yuta Mishima, Toshiki Yamada, Asato Uchiyama, Tatsuji Matsuura, Hao San, Masao Hotta
2015 — conf
A low-distortion delta-sigma modulator with ring amplifier and passive adder embedded SAR quantizer.
ISPACS
Chunhui Pan, Hao San
2014 — conf
An area-efficient 12-bit 1.25MS/s radix-value self-estimated non-binary ADC with relaxed requirements on analog components.
CICC
Hao San, Rompei Sugawara, Masao Hotta, Tatsuji Matsuura, Kazuyuki Aihara
2014 J jnl
Experimental Implementation of Non-binary Cyclic ADCs with Radix Value Estimation Algorithm.
IEICE Trans. Electron.
Rompei Sugawara, Hao San, Kazuyuki Aihara, Masao Hotta
2013 J jnl
Non-binary Pipeline Analog-to-Digital Converter Based on β-Expansion.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Hao San, Tomonari Kato, Tsubasa Maruyama, Kazuyuki Aihara, Masao Hotta
2013 C conf
Rigorous analysis of quantization error of an A/D converter based on β-map.
ISCAS
Takaki Makino, Yukiko Iwata, Yutaka Jitsumatsu, Masao Hotta, Hao San, Kazuyuki Aihara
2013 J jnl
Robust Cyclic ADC Architecture Based on β-Expansion.
IEICE Trans. Electron.
Rie Suzuki, Tsubasa Maruyama, Hao San, Kazuyuki Aihara, Masao Hotta
2010 J jnl
Noise-Coupled Image Rejection Architecture of Complex Bandpass DeltaSigmaAD Modulator.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Hao San, Haruo Kobayashi
2010 — conf
Non-binary SAR ADC with digital error correction for low power applications.
APCCAS
Tomohiko Ogawa, Tatsuji Matsuura, Haruo Kobayashi, Nobukazu Takai, Masao Hotta, Hao San, Akira Abe, Katsuyoshi Yagi, Toshihiko Mori
2010 J jnl
SAR ADC Algorithm with Redundancy and Digital Error Correction.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Tomohiko Ogawa, Haruo Kobayashi, Yosuke Takahashi, Nobukazu Takai, Masao Hotta, Hao San, Tatsuji Matsuura, Akira Abe, Katsuyoshi Yagi, Toshihiko Mori
2009 J jnl
Cross-Noise-Coupled Architecture of Complex Bandpass DeltaSigmaAD Modulator.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Hao San, Haruo Kobayashi
2008 — conf
High-resolution DPWM generator for digitally controlled DC-DC converters.
APCCAS
Ibuki Mori, Keigo Kimura, Yoshihisa Yamada, Haruo Kobayashi, Yasunori Kobori, Santhos Ario Wibowo, Kazuya Shimizu, Masashi Kono, Hao San
2008 J jnl
Novel Architecture of Feedforward Second-Order Multibit Delta-Sigma-AD Modulator.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Hao San, Hajime Konagaya, Feng Xu, Atsushi Motozawa, Haruo Kobayashi, Kazumasa Ando, Hiroshi Yoshida, Chieto Murayama, Kanichi Miyazawa
2008 — conf
SAR ADC algorithm with redundancy.
APCCAS
Tomohiko Ogawa, Haruo Kobayashi, Masao Hotta, Yosuke Takahashi, Hao San, Nobukazu Takai
2008 — conf
ΔΣAD modulator for low power application.
APCCAS
Hajime Konagaya, Haijun Lin, Hao San, Haruo Kobayashi, Kazumasa Ando, Hiroshi Yoshida, Chieto Murayama, Yukihiro Nisida
2007 — conf
A 2.8-V Multibit Complex Bandpass Delta-Sigma-AD Modulator in 0.18µm CMOS.
ASP-DAC
Hao San, Yoshitaka Jingu, Hiroki Wada, Hiroyuki Hagiwara, Akira Hayakawa, Haruo Kobayashi, Masao Hotta
2007 J jnl
A Second-Order Multibit Complex Bandpass DeltaSigmaAD Modulator with I, Q Dynamic Matching and DWA Algorithm.
IEICE Trans. Electron.
Hao San, Yoshitaka Jingu, Hiroki Wada, Hiroyuki Hagiwara, Akira Hayakawa, Haruo Kobayashi, Tatsuji Matsuura, Kouichi Yahagi, Junya Kudoh, Hideo Nakane, Masao Hotta, Toshiro Tsukada, Koichiro Mashiko, Atsushi Wada
2006 J jnl
Complex Bandpass DeltaSigmaAD Modulator Architecture without I, Q-Path Crossing Layout.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Hao San, Akira Hayakawa, Yoshitaka Jingu, Hiroki Wada, Hiroyuki Hagiwara, Kazuyuki Kobayashi, Haruo Kobayashi, Tatsuji Matsuura, Kouichi Yahagi, Junya Kudoh, Hideo Nakane, Masao Hotta, Toshiro Tsukada, Koichiro Mashiko, Atsushi Wada
2005 J jnl
Reducing Spurious Output of Balanced Modulators by Dynamic Matching of I, Q Quadrature Paths.
IEICE Trans. Electron.
Jun Otsuki, Hao San, Haruo Kobayashi, Takanori Komuro, Yoshihisa Yamada, Aiyan Liu
2004 Misc conf
An Element Rotation Algorithm for Multi-bit DAC Nonlinearities in Complex Bandpass \Delta\SigmaAD Modulators.
VLSI Design
Hao San, Haruo Kobayashi, Shinya Kawakami, Nobuyuki Kuroiwa
1999 — conf
A high-speed CMOS track/hold circuit.
ICECS
Mohd Asmawi Mohamed Zin, Haruo Kobayashi, Kazuya Kobayashi, Jun-ichi Ichimura, Hao San, Yoshitaka Onaya, Yasuyuki Kimura, Yasushi Yuminaka, Yoshisato Sasaki, Kouji Tanaka, Fuminori Abe