Hao-Yung Lo

11 papers C 1Misc 1Journal 8Unranked 1
YearRankTypeTitle / Venue / Authors
2003 J jnl
Built-in Test with Modified-Booth High-Speed Pipelined Multipliers and Dividers.
J. Electron. Test.
Hao-Yung Lo, Hsiu-Feng Lin, Chichyang Chen, Jenshiuh Liu, Chia-Cheng Liu
1997 Misc conf
A Parallel CORDIC Algorithm for Sine and Cosine Generation.
PDPTA
Hao-Yung Lo
1997 J jnl
A Uniform and Squared Direct Two's Complement Multiplier.
J. Inf. Sci. Eng.
Hao-Yung Lo
1996 — conf
Logarithmic Conversion by Four Partitioned Hybrid-ROMs.
ISPAN
Hao-Yung Lo, Hsiu-Feng Lin, Yue-Yuan Ho
1995 C conf
A New Method of Implementation of VLSI CORDIC for Sine and Cosine Computation.
ISCAS
Hao-Yung Lo, Hsiu-Feng Lin, Kuen-Shiuh Yang
1994 J jnl
An Optimal Matched and Parallel Mixed-Radix Converter.
J. Inf. Sci. Eng.
Hao-Yung Lo
1994 J jnl
Hybrid ROM Strategy (H-ROM) for Conversion Between Binary Numbers and Logarithms.
J. Inf. Sci. Eng.
Hao-Yung Lo, Hsiu-Feng Lin, Chiang-Shiang Wan
1990 J jnl
An Algorithm for Scaling and Single Residue Error Correction in Residue Number Systems.
IEEE Trans. Computers
Chien-Chun Su, Hao-Yung Lo
1990 J jnl
High-speed signed digital multipiers for VLSI.
Microprocessing and Microprogramming
Hao-Yung Lo
1987 J jnl
A Hardwired Generalized Algorithm for Generating the Logarithm Base-
IEEE Trans. Computers
Hao-Yung Lo, Jau-Ling Chen
1985 J jnl
Generation of a Precise Binary Logarithm with Difference Grouping Programmable Logic Array.
IEEE Trans. Computers
Hao-Yung Lo, Yoshinao Aoki