Hao-Yu Chi

13 papers A* 1A 6Journal 3Unranked 3
YearRankTypeTitle / Venue / Authors
2023 A conf
Invited Paper: 2023 ICCAD CAD Contest Problem B: 3D Placement with Macros.
ICCAD
Kai-Shun Hu, Hao-Yu Chi, I-Jye Lin, Yi-Hsuan Wu, Wei-Hsu Chen, Yi-Ting Hsieh
2023 J jnl
On Reducing LDE Variations in Modern Analog Placement.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
A. K. Thasreefa, Abhishek Patyal, Hao-Yu Chi, Mark Po-Hung Lin, Hung-Ming Chen
2022 A conf
2022 ICCAD CAD Contest Problem B: 3D Placement with D2D Vertical Connections.
ICCAD
Kai-Shun Hu, I-Jye Lin, Yu-Hui Huang, Hao-Yu Chi, Yi-Hsuan Wu, Cindy Chin-Fang Shen
2022 A conf
Practical Substrate Design Considering Symmetrical and Shielding Routes.
DATE
Hao-Yu Chi, Simon Yi-Hung Chen, Hung-Ming Chen, Chien-Nan Liu, Yun-Chih Kuo, Ya-Hsin Chang, Kuan-Hsien Ho
2021 J jnl
A Style-Based Analog Layout Migration Technique With Complete Routing Behavior Preservation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hao-Yu Chi, Zi-Jun Lin, Chia-Hao Hung, Chien-Nan Jimmy Liu, Hung-Ming Chen
2021 A conf
Performance-driven Routing Methodology with Incremental Placement Refinement for Analog Layout Design.
DATE
Hao-Yu Chi, Han-Chung Chang, Chih-Hsin Yang, Chien-Nan Liu, Jing-Yang Jou
2020 A conf
Achieving Analog Layout Integrity through Learning and Migration Invited Talk.
ICCAD
Mark Po-Hung Lin, Hao-Yu Chi, Abhishek Patyal, Zheng-Yao Liu, Jun-Jie Zhao, Chien-Nan Jimmy Liu, Hung-Ming Chen
2020 J jnl
Wire Load Oriented Analog Routing with Matching Constraints.
ACM Trans. Design Autom. Electr. Syst.
Hao-Yu Chi, Chien-Nan Jimmy Liu, Hung-Ming Chen
2019 — conf
A Structure-Based Methodology for Analog Layout Generation.
SMACD
Yu-Hsien Chen, Hao-Yu Chi, Ling-Yen Song, Chien-Nan Jimmy Liu, Hung-Ming Chen
2019 A conf
Achieving Routing Integrity in Analog Layout Migration via Cartesian Detection Lines.
ICCAD
Hao-Yu Chi, Zi-Jun Lin, Chia-Hao Hung, Chien-Nan Jimmy Liu, Hung-Ming Chen
2018 A* conf
Analog placement with current flow and symmetry constraints using PCP-SP.
DAC
Abhishek Patyal, Po-Cheng Pan, K. A. Asha, Hung-Ming Chen, Hao-Yu Chi, Chien-Nan Liu
2018 — conf
Performance-preserved analog routing methodology via wire load reduction.
ASP-DAC
Hao-Yu Chi, Hwa-Yi Tseng, Chien-Nan Jimmy Liu, Hung-Ming Chen
2017 — conf
A body sensor node SoC for ECG/EMG applications with compressed sensing and wireless powering.
VLSI-DAT
Yo-Hao Tu, Kai-Wen Yao, Minghao Huang, Yu-Yun Lin, Hao-Yu Chi, Po-Min Cheng, Pei-Yun Tsai, Muh-Tian Shiue, Chien-Nan Liu, Kuo-Hsing Cheng, Jia-Shiang Fu