Hanwool Jeong

35 papers Journal 29Unranked 6
YearRankTypeTitle / Venue / Authors
2025 J jnl
Bayesian Learning-Enhanced Embedded Memory Design With Automated Circuit Variant Generation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Dongho Kim, Junseo Lee, Seokhun Kim, Jihwan Park, Sangheon Lee, Hanwool Jeong
2025 J jnl
Simultaneous Optimization of Various-Sized SRAM Instances Through Machine Learning-Driven Transistor Sizing and Leafcell Circuit Pool Construction.
IEEE Trans. Circuits Syst. I Regul. Pap.
Seokhun Kim, Junseo Lee, Dongho Kim, Jihwan Park, Sangheon Lee, Hanwool Jeong
2024 J jnl
Design of High-Speed, Low-Power Sensing Circuits for Nano-Scale Embedded Memory.
Sensors
Sangheon Lee, Gwanwoo Park, Hanwool Jeong
2024 J jnl
High Efficiency Variation-Aware SRAM Timing Characterization via Machine-Learning-Assisted Netlist Extraction.
IEEE Trans. Circuits Syst. II Express Briefs
Inseong Jeon, Hyunho Park, Taehwan Yoon, Hanwool Jeong
2023 J jnl
Bayesian Learning Automated SRAM Circuit Design for Power and Performance Optimization.
IEEE Trans. Circuits Syst. I Regul. Pap.
Junseo Lee, Jihwan Park, Seokhun Kim, Hanwool Jeong
2023 J jnl
Cross-Coupled nFET Preamplifier for Low Voltage SRAM.
IEEE Trans. Circuits Syst. II Express Briefs
Sangheon Lee, Jaehyun Park, Hanwool Jeong
2023 J jnl
Energy-Efficient Wide-Range Level Shifter With a Logic Error Detection Circuit.
IEEE Trans. Very Large Scale Integr. Syst.
Jihwan Park, Hanwool Jeong
2023 J jnl
Machine Learning-Based Read Access Yield Estimation and Design Optimization for High-Density SRAM.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Taehwan Yoon, Hanwool Jeong
2023 J jnl
Voltage Boosted Fail Detecting Circuit for Selective Write Assist and Cell Current Boosting for High-Density Low-Power SRAM.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jaehyun Park, Sangheon Lee, Hanwool Jeong
2022 — conf
All-Digital Time-Domain Temperature Sensor for Energy Efficient On-Chip Thermal Management.
ICEIC
Gidong Baek, Hanwool Jeong
2022 J jnl
Self-Shut-Off Pulsed Latches for Minimizing Sequencing Overhead.
IEEE Trans. Very Large Scale Integr. Syst.
Hyunho Park, Hanwool Jeong
2021 J jnl
A Wide-Range Static Current-Free Current Mirror-Based LS With Logic Error Detection for Near-Threshold Operation.
IEEE J. Solid State Circuits
Hanwool Jeong, Tae Hyun Kim, Changnam Park, Hoonki Kim, Taejoong Song, Seong-Ook Jung
2021 J jnl
High-Density SRAM Read Access Yield Estimation Methodology.
IEEE Access
Gidong Baek, Hanwool Jeong
2020 J jnl
An Embedded Level-Shifting Dual-Rail SRAM for High-Speed and Low-Power Cache.
IEEE Access
Tae Hyun Kim, Hanwool Jeong, Juhyun Park, Hoonki Kim, Taejoong Song, Seong-Ook Jung
2019 — conf
A Voltage and Temperature Tracking SRAM Assist Supporting 740mV Dual-Rail Offset for Low-Power and High-Performance Applications in 7nm EUV FinFET Technology.
ISSCC
Inhak Lee, Hanwool Jeong, Sangyeop Baeck, Siddharth Gupta, Changnam Park, Dongwook Seo, Jaeseung Choi, Jaeyoung Kim, Hoon Kim, Jungmyung Kang, Sunyung Jang, Daeyoung Moon, Sangshin Han, TaeHyung Kim, Jaehyun Lim, Younghwan Park, Hyejin Hwang, Jeonseung Kang, Taejoong Song
2019 J jnl
Bitline Charge-Recycling SRAM Write Assist Circuitry for $V_{\mathrm{MIN}}$ Improvement and Energy Saving.
IEEE J. Solid State Circuits
Hanwool Jeong, Se Hyeok Oh, Tae Woo Oh, Hoonki Kim, Changnam Park, Woojin Rim, Taejoong Song, Seong-Ook Jung
2019 J jnl
Self-Timed Pulsed Latch for Low-Voltage Operation With Reduced Hold Time.
IEEE J. Solid State Circuits
Hanwool Jeong, Juhyun Park, Seung Chul Song, Seong-Ook Jung
2018 J jnl
Sense-Amplifier-Based Flip-Flop With Transition Completion Detection for Low-Voltage Operation.
IEEE Trans. Very Large Scale Integr. Syst.
Hanwool Jeong, Tae Woo Oh, Seung Chul Song, Seong-Ook Jung
2017 J jnl
Power-Gated 9T SRAM Cell for Low-Energy Operation.
IEEE Trans. Very Large Scale Integr. Syst.
Tae Woo Oh, Hanwool Jeong, Kyoman Kang, Juhyun Park, Younghwi Yang, Seong-Ook Jung
2017 J jnl
Pre-Charged Local Bit-Line Sharing SRAM Architecture for Near-Threshold Operation.
IEEE Trans. Circuits Syst. I Regul. Pap.
Tae Woo Oh, Hanwool Jeong, Juhyun Park, Seong-Ook Jung
2017 J jnl
SRAM Operational Mismatch Corner Model for Efficient Circuit Design and Yield Analysis.
IEEE Trans. Circuits Syst. I Regul. Pap.
Tae Hoon Choi, Hanwool Jeong, Younghwi Yang, Juhyun Park, Seong-Ook Jung
2016 J jnl
Bitline Precharging and Preamplifying Switching pMOS for High-Speed Low-Power SRAM.
IEEE Trans. Circuits Syst. II Express Briefs
Hanwool Jeong, Juhyun Park, Tae Woo Oh, Woojin Rim, Taejoong Song, Gyu-Hong Kim, Hyo-Sig Won, Seong-Ook Jung
2016 J jnl
Full-Swing Local Bitline SRAM Architecture Based on the 22-nm FinFET Technology for Low-Voltage Operation.
IEEE Trans. Very Large Scale Integr. Syst.
Kyoman Kang, Hanwool Jeong, Younghwi Yang, Juhyun Park, Ki-Ryong Kim, Seong-Ook Jung
2016 J jnl
Single Bit-Line 7T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Performance and Energy in 14 nm FinFET Technology.
IEEE Trans. Circuits Syst. I Regul. Pap.
Younghwi Yang, Hanwool Jeong, Seung Chul Song, Joseph Wang, Geoffrey Yeap, Seong-Ook Jung
2016 J jnl
Transient Cell Supply Voltage Collapse Write Assist Using Charge Redistribution.
IEEE Trans. Circuits Syst. II Express Briefs
Ki-Ryong Kim, Hanwool Jeong, Juhyun Park, Seong-Ook Jung
2015 J jnl
Architecture-Aware Analytical Yield Model for Read Access in Static Random Access Memory.
IEEE Trans. Very Large Scale Integr. Syst.
Heechai Kang, Jisu Kim, Hanwool Jeong, Younghwi Yang, Seong-Ook Jung
2015 — conf
Efficiency analysis of importance sampling in deep submicron STT-RAM design using uncontrollable industry-compatible model parameter.
ICECS
Taehui Na, Hanwool Jeong, Seong-Ook Jung, Jung Pill Kim, Seung-Hyuk Kang
2015 J jnl
Offset-Compensated Cross-Coupled PFET Bit-Line Conditioning and Selective Negative Bit-Line Write Assist for High-Density Low-Power SRAM.
IEEE Trans. Circuits Syst. I Regul. Pap.
Hanwool Jeong, Taewon Kim, Younghwi Yang, Taejoong Song, Gyu-Hong Kim, Hyo-Sig Won, Seong-Ook Jung
2015 J jnl
Switching pMOS Sense Amplifier for High-Density Low-Voltage Single-Ended SRAM.
IEEE Trans. Circuits Syst. I Regul. Pap.
Hanwool Jeong, Taewon Kim, Kyoman Kang, Taejoong Song, Gyu-Hong Kim, Hyo-Sig Won, Seong-Ook Jung
2015 J jnl
Trip-Point Bit-Line Precharge Sensing Scheme for Single-Ended SRAM.
IEEE Trans. Very Large Scale Integr. Syst.
Hanwool Jeong, Taewon Kim, Taejoong Song, Gyu-Hong Kim, Seong-Ook Jung
2014 J jnl
Comparative Study of Various Latch-Type Sense Amplifiers.
IEEE Trans. Very Large Scale Integr. Syst.
Taehui Na, Seung-Han Woo, Jisu Kim, Hanwool Jeong, Seong-Ook Jung
2014 J jnl
One-Sided Static Noise Margin and Gaussian-Tail-Fitting Method for SRAM.
IEEE Trans. Very Large Scale Integr. Syst.
Hanwool Jeong, Younghwi Yang, Junha Lee, Jisu Kim, Seong-Ook Jung
2014 — conf
Pseudo NMOS based sense amplifier for high speed single-ended SRAM.
ICECS
Hanwool Jeong, Taewon Kim, Seong-Ook Jung, Taejoong Song, Gyu-Hong Kim
2012 — conf
Impact of fin thickness and height on read stability / write ability in tri-gate FinFET based SRAM.
ISOCC
Junha Lee, Hanwool Jeong, Younghwi Yang, Jisu Kim, Seong-Ook Jung
2012 — conf
Static read stability and write ability metrics in FinFET based SRAM considering read and write-assist circuits.
ICECS
Hanwool Jeong, Younghwi Yang, Junha Lee, Jisu Kim, Seong-Ook Jung