Hans T. Heineken

13 papers A* 1A 6Misc 3Unranked 3
YearRankTypeTitle / Venue / Authors
2004 A conf
Test Strategies For a 40Gbps Framer SoC.
ITC
Hans T. Heineken, Jitendra Khare
2000 Misc conf
Cost Trade-Offs in System On Chip Designs.
VLSI Design
Jitendra Khare, Hans T. Heineken, Manuel d'Abreu
2000 Misc conf
Manufacturability and Testability Oriented Synthesis.
VLSI Design
Saghir A. Shaikh, Jitendra Khare, Hans T. Heineken
2000 Misc conf
Maximizing Wafer Productivity Through Layout Optimization.
VLSI Design
Charles H. Ouyang, Hans T. Heineken, Jitendra Khare, Saghir A. Shaikh, Manuel d'Abreu
2000 — conf
Wire planning for performance and yield enhancement.
CICC
Charles Ouyang, Kyungsuk Ryu, Hans T. Heineken, Jitu Khare, Saghir A. Shaikh, Manuel d'Abreu
1998 A conf
Design-Manufacturing Interface: Part I - Vision.
DATE
Wojciech Maly, Pranab K. Nag, Hans T. Heineken, Jitendra Khare
1998 A conf
Design-Manufacturing Interface: Part II - Applications.
DATE
Wojciech Maly, Pranab K. Nag, Charles H. Ouyang, Hans T. Heineken, Jitendra Khare, P. Simon
1998 — conf
Manufacturability analysis of standard cell libraries.
CICC
Hans T. Heineken, Jitendra Khare, Manuel d'Abreu
1998 A conf
Performance - Manufacturability Tradeoffs in IC Design.
DATE
Hans T. Heineken, Wojciech Maly
1997 A* conf
CAD at the Design-Manufacturing Interface.
DAC
Hans T. Heineken, Jitendra Khare, Wojciech Maly, Pranab K. Nag, Charles H. Ouyang, Witold A. Pleskacz
1997 — conf
Detection of Yield Trends.
DFT
Witold A. Pleskacz, Wojciech Maly, Hans T. Heineken
1996 A conf
Design for manufacturability in submicron domain.
ICCAD
Wojciech Maly, Hans T. Heineken, Jitendra Khare, Pranab K. Nag
1996 A conf
Interconnect yield model for manufacturability prediction in synthesis of standard cell based designs.
ICCAD
Hans T. Heineken, Wojciech Maly