Hans-Jörg Peter

16 papers A* 1A 5C 3Journal 2Unranked 4
YearRankTypeTitle / Venue / Authors
2016 C conf
Conclusively verifying clock-domain crossings in very large hardware designs.
VLSI-SoC
Guillaume Plassan, Hans-Jörg Peter, Katell Morin-Allory, Fahim Rahim, Shaker Sarwary, Dominique Borrione
2016 — conf
Improving the Efficiency of Formal Verification: The Case of Clock-Domain Crossings.
VLSI-SoC (Selected Papers)
Guillaume Plassan, Hans-Jörg Peter, Katell Morin-Allory, Shaker Sarwary, Dominique Borrione
2013 — —
A uniform approach to the complexity and analysis of succinct systems.
Hans-Jörg Peter
2013 J jnl
Can we build it: formal synthesis of control strategies for cooperative driver assistance systems.
Math. Struct. Comput. Sci.
Werner Damm, Hans-Jörg Peter, Jan-Hendrik Rakow, Bernd Westphal
2012 — conf
FlexRay for Avionics: Automatic Verification with Parametric Physical Layers.
Infotech@Aerospace
Michael Gerke, Rüdiger Ehlers, Bernd Finkbeiner, Hans-Jörg Peter
2012 A conf
Template-Based Controller Synthesis for Timed Systems.
TACAS
Bernd Finkbeiner, Hans-Jörg Peter
2012 — conf
The Complexity of Bounded Synthesis for Timed Control with Partial Observability.
FORMATS
Hans-Jörg Peter, Bernd Finkbeiner
2011 A* conf
Synthia: Verification and Synthesis for Timed Automata.
CAV
Hans-Jörg Peter, Rüdiger Ehlers, Robert Mattmüller
2010 — conf
Combining Symbolic Representations for Solving Timed Games.
FORMATS
Rüdiger Ehlers, Robert Mattmüller, Hans-Jörg Peter
2010 A conf
Fully Symbolic Timed Model Checking Using Constraint Matrix Diagrams.
RTSS
Rüdiger Ehlers, Daniel Fass, Michael Gerke, Hans-Jörg Peter
2010 C conf
Making the Right Cut in Model Checking Data-Intensive Timed Systems.
ICFEM
Rüdiger Ehlers, Michael Gerke, Hans-Jörg Peter
2010 C conf
Model Checking the FlexRay Physical Layer Protocol.
FMICS
Michael Gerke, Rüdiger Ehlers, Bernd Finkbeiner, Hans-Jörg Peter
2010 J jnl
Synthesising certificates in networks of timed automata.
IET Softw.
Bernd Finkbeiner, Hans-Jörg Peter, Sven Schewe
2009 A conf
Component-Based Abstraction Refinement for Timed Controller Synthesis.
RTSS
Hans-Jörg Peter, Robert Mattmüller
2008 A conf
RESY: Requirement Synthesis for Compositional Model Checking.
TACAS
Bernd Finkbeiner, Hans-Jörg Peter, Sven Schewe
2008 A conf
Synthesizing Certificates in Networks of Timed Automata.
RTSS
Bernd Finkbeiner, Hans-Jörg Peter, Sven Schewe