Hans-Joachim Wunderlich

291 papers A* 9A 74B 33C 16Misc 17Journal 61Unranked 80

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	Enhancing the Lifetime of STT-MRAM in IoT Applications by Current Balancing. LATS Somayeh Sadeghi Kohan, Fatemeh Akbari, Mahta Mayahinia, Mehdi B. Tahoori, Sybille Hellebrand, Hans-Joachim Wunderlich
2026	—	`conf`	Validating Statistical Delay Test Generation Under Timing Variations via SAT-Based ATPG. LATS Hanieh Jafarzadeh, Jan Dennis Reimer, Hussam Amrouch, Sybille Hellebrand, Hans-Joachim Wunderlich
2025	B	`conf`	European Test Symposium Teams: an Anniversary Snapshot. ETS Maksim Jenihhin, Jaan Raik, Artur Jutman, Natalia Cherezova, Raimund Ubar, Liviu Miclea, Szilárd Enyedi, I. Stefan, Ovidiu Stan, Cosmina Corches, Z. Peng, Petru Eles, Rolf Drechsler, S. Eggersglüß, Görschwin Fey, Andreas Glowatz, Daniel Tille, Georges G. E. Gielen, Anthony Coyette, Wim Dobbelaere, Ronny Vanhooren, P.-Y. Chuang, Erik Jan Marinissen, Giorgio Di Natale, M. Barragan, Paolo Maistri, S. Mir, Vatajelu I. Vatajelu, Paolo Bernardi, S. Di Carlo, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante, Haralampos-G. Stratigopoulos, M. K. Michael, Stelios Neophytou, Stavros Hadjitheophanous, Kyriakos Christou, M. Skitsas, Alberto Bosio, Bastien Deveautour, P. Girard, Marcello Traiola, Arnaud Virazel, F. Fernandes Dos Santos, Angeliki Kritikakou, Gioele Casagranda, Marzio Vallero, Flavio Vella, Paolo Rech, Letícia Maria Bolzani Poehls, Milos Krstic, Marko S. Andjelkovic, F. Vargas, Grigor Tshagharyan, Gurgen Harutyunyan, Valery A. Vardanian, Samvel K. Shoukourian, Yervant Zorian, Jennifer Dworak, Kundan Nepal, Theodore W. Manikas, Mottaqiallah Taouil, Moritz Fieback, Anteneh Gebregiorgis, Rajendra Bishnoi, Said Hamdioui, Abhijit Chatterjee, A. Saha, Suhasini Komarraju, K. Ma, Chandramouli N. Amarnath, Mehdi Baradaran Tahoori, Mahta Mayahinia, Maryam Rajabalipanah, Katayoon Basharkhah, N. Nosrati, Zahra Jahanpeima, Zain Navabi, Hans-Joachim Wunderlich, Sybille Hellebrand
2025	—	`conf`	Robust DLBIST for Delay Fault Testing: Minimizing PVT Variability with Zero Temperature Coefficient (ZTC) Voltage. LATS Hanieh Jafarzadeh, Florian Klemme, Hussam Amrouch, Sybille Hellebrand, Hans-Joachim Wunderlich
2025	B	`conf`	Robust Pattern Generation for Small Delay Faults under the Impact of Variations. ETS Hanieh Jafarzadeh, Sybille Hellebrand, Hans-Joachim Wunderlich
2025	J	`jnl`	Small Delay Fault Testing with Multiple Voltages under Variations: Defect vs. Fault Coverage. J. Electron. Test. Hanieh Jafarzadeh, Florian Klemme, Hussam Amrouch, Sybille Hellebrand, Hans-Joachim Wunderlich
2025	—	`conf`	Zero Overhead Error-Tolerant Communication. LATS Somayeh Sadeghi Kohan, Sybille Hellebrand, Hans-Joachim Wunderlich
2024	A	`conf`	Minimizing PVT-Variability by Exploiting the Zero Temperature Coefficient (ZTC) for Robust Delay Fault Testing. ITC Hanieh Jafarzadeh, Florian Klemme, Jan Dennis Reimer, Hussam Amrouch, Sybille Hellebrand, Hans-Joachim Wunderlich
2024	—	`conf`	RAPPER: Robust and APProximate ERror Tolerating Communication. DFT Somayeh Sadeghi Kohan, Sybille Hellebrand, Hans-Joachim Wunderlich
2024	B	`conf`	Time and Space Optimized Storage-based BIST under Multiple Voltages and Variations. ETS Hanieh Jafarzadeh, Florian Klemme, Hussam Amrouch, Sybille Hellebrand, Hans-Joachim Wunderlich
2024	—	`conf`	Vmin Testing under Variations: Defect vs. Fault Coverage. LATS Hanieh Jafarzadeh, Florian Klemme, Hussam Amrouch, Sybille Hellebrand, Hans-Joachim Wunderlich
2024	J	`jnl`	Workload-Aware Periodic Interconnect BIST. IEEE Des. Test Somayeh Sadeghi Kohan, Sybille Hellebrand, Hans-Joachim Wunderlich
2023	C	`conf`	Exploiting the Error Resilience of the Preconditioned Conjugate Gradient Method for Energy and Delay Optimization. IOLTS Natalia Lylina, Stefan Holst, Hanieh Jafarzadeh, Alexandra Kourfali, Hans-Joachim Wunderlich
2023	—	`conf`	Guardband Optimization for the Preconditioned Conjugate Gradient Algorithm. DSN-W Natalia Lylina, Stefan Holst, Hanieh Jafarzadeh, Alexandra Kourfali, Hans-Joachim Wunderlich
2023	J	`jnl`	Identifying Resistive Open Defects in Embedded Cells under Variations. J. Electron. Test. Zahra Paria Najafi-Haghi, Hans-Joachim Wunderlich
2023	—	`conf`	Low Power Streaming of Sensor Data Using Gray Code-Based Approximate Communication. DSN-W Somayeh Sadeghi Kohan, Sybille Hellebrand, Hans-Joachim Wunderlich
2023	—	`conf`	Optimizing the Streaming of Sensor Data with Approximate Communication. ATS Somayeh Sadeghi Kohan, Jan Dennis Reimer, Sybille Hellebrand, Hans-Joachim Wunderlich
2023	A	`conf`	Robust Pattern Generation for Small Delay Faults Under Process Variations. ITC Hanieh Jafarzadeh, Florian Klemme, Jan Dennis Reimer, Zahra Paria Najafi-Haghi, Hussam Amrouch, Sybille Hellebrand, Hans-Joachim Wunderlich
2023	A	`conf`	Robust Resistive Open Defect Identification Using Machine Learning with Efficient Feature Selection. DATE Zahra Paria Najafi-Haghi, Florian Klemme, Hanieh Jafarzadeh, Hussam Amrouch, Hans-Joachim Wunderlich
2023	B	`conf`	Synthesis of IJTAG Networks for Multi-Power Domain Systems on Chips. ETS Payam Habiby, Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich, Sebastian Huhn, Rolf Drechsler
2023	—	`conf`	Test Aspects of System Health State Monitoring. LATS Hans-Joachim Wunderlich, Hanieh Jafarzadeh, Alexandra Kourfali, Natalia Lylina, Zahra Paria Najafi-Haghi
2022	J	`jnl`	A Complete Design-for-Test Scheme for Reconfigurable Scan Networks. J. Electron. Test. Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich
2022	A	`conf`	Efficient and Robust Resistive Open Defect Detection Based on Unsupervised Deep Learning. ITC Yiwen Liao, Zahra Paria Najafi-Haghi, Hans-Joachim Wunderlich, Bin Yang
2022	A	`conf`	Intelligent Methods for Test and Reliability. DATE Hussam Amrouch, Jens Anders, Steffen Becker, Maik Betka, Gerd Bleher, Peter Domanski, Nourhan Elhamawy, Thomas Ertl, Athanasios Gatzastras, Paul R. Genssler, Sebastian Hasler, Martin Heinrich, André van Hoorn, Hanieh Jafarzadeh, Ingmar Kallfass, Florian Klemme, Steffen Koch, Ralf Küsters, Andrés Lalama, Raphaël Latty, Yiwen Liao, Natalia Lylina, Zahra Paria Najafi-Haghi, Dirk Pflüger, Ilia Polian, Jochen Rivoir, Matthias Sauer, Denis Schwachhofer, Steffen Templin, Christian Volmer, Stefan Wagner, Daniel Weiskopf, Hans-Joachim Wunderlich, Bin Yang, Martin Zimmermann
2022	B	`conf`	On Extracting Reliability Information from Speed Binning. ETS Zahra Paria Najafi-Haghi, Florian Klemme, Hussam Amrouch, Hans-Joachim Wunderlich
2022	—	`conf`	Online Periodic Test of Reconfigurable Scan Networks. ATS Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich
2022	A	`conf`	Robust Reconfigurable Scan Networks. DATE Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich
2022	J	`jnl`	SCAR: Security Compliance Analysis and Resynthesis of Reconfigurable Scan Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich
2021	Misc	`conf`	A Hybrid Protection Scheme for Reconfigurable Scan Networks. VTS Natalia Lylina, Ahmed Atteya, Hans-Joachim Wunderlich
2021	C	`conf`	Concurrent Test of Reconfigurable Scan Networks for Self-Aware Systems. IOLTS Chih-Hao Wang, Natalia Lylina, Ahmed Atteya, Tong-Yu Hsieh, Hans-Joachim Wunderlich
2021	—	`conf`	Resistive Open Defect Classification of Embedded Cells under Variations. LATS Zahra Paria Najafi-Haghi, Hans-Joachim Wunderlich
2021	J	`jnl`	Stress-Aware Periodic Test of Interconnects. J. Electron. Test. Somayeh Sadeghi Kohan, Sybille Hellebrand, Hans-Joachim Wunderlich
2021	A	`conf`	Testability-Enhancing Resynthesis of Reconfigurable Scan Networks. ITC Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich
2020	A	`conf`	GPU-accelerated Time Simulation of Systems with Adaptive Voltage and Frequency Scaling. DATE Eric Schneider, Hans-Joachim Wunderlich
2020	A	`conf`	Logic Fault Diagnosis of Hidden Delay Defects. ITC Stefan Holst, Matthias Kampmann, Alexander Sprenger, Jan Dennis Reimer, Sybille Hellebrand, Hans-Joachim Wunderlich, Xiaoqing Wen
2020	A	`conf`	Security Preserving Integration and Resynthesis of Reconfigurable Scan Networks. ITC Natalia Lylina, Ahmed Atteya, Chih-Hao Wang, Hans-Joachim Wunderlich
2020	Misc	`conf`	Switch Level Time Simulation of CMOS Circuits with Adaptive Voltage and Frequency Scaling. VTS Eric Schneider, Hans-Joachim Wunderlich
2020	A	`conf`	Synthesis of Fault-Tolerant Reconfigurable Scan Networks. DATE Sebastian Brandhofer, Michael A. Kochte, Hans-Joachim Wunderlich
2020	A	`conf`	Using Programmable Delay Monitors for Wear-Out and Early Life Failure Prediction. DATE Chang Liu, Eric Schneider, Hans-Joachim Wunderlich
2020	B	`conf`	Variation-Aware Defect Characterization at Cell Level. ETS Zahra Paria Najafi-Haghi, Marzieh Hashemipour-Nazari, Hans-Joachim Wunderlich
2019	J	`jnl`	Built-In Test for Hidden Delay Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Matthias Kampmann, Michael A. Kochte, Chang Liu, Eric Schneider, Sybille Hellebrand, Hans-Joachim Wunderlich
2019	J	`jnl`	Multi-level timing and fault simulation on GPUs. Integr. Eric Schneider, Hans-Joachim Wunderlich
2019	A	`conf`	On Secure Data Flow in Reconfigurable Scan Networks. DATE Pascal Raiola, Benjamin Thiemann, Jan Burchard, Ahmed Atteya, Natalia Lylina, Hans-Joachim Wunderlich, Bernd Becker, Matthias Sauer
2019	J	`jnl`	SWIFT: Switch-Level Fault Simulation on GPUs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Eric Schneider, Hans-Joachim Wunderlich
2019	A	`conf`	Security Compliance Analysis of Reconfigurable Scan Networks. ITC Natalia Lylina, Ahmed Atteya, Pascal Raiola, Matthias Sauer, Bernd Becker, Hans-Joachim Wunderlich
2019	A	`conf`	Variation-Aware Small Delay Fault Diagnosis on Compressed Test Responses. ITC Stefan Holst, Eric Schneider, Michael A. Kochte, Xiaoqing Wen, Hans-Joachim Wunderlich
2018	—	`conf`	Clock-Skew-Aware Scan Chain Grouping for Mitigating Shift Timing Failures in Low-Power Scan Testing. ATS Yucong Zhang, Xiaoqing Wen, Stefan Holst, Kohei Miyase, Seiji Kajihara, Hans-Joachim Wunderlich, Jun Qian
2018	C	`conf`	Detecting and Resolving Security Violations in Reconfigurable Scan Networks. IOLTS Pascal Raiola, Michael A. Kochte, Ahmed Atteya, Laura Rodríguez Gómez, Hans-Joachim Wunderlich, Bernd Becker, Matthias Sauer
2018	B	`conf`	Device aging: A reliability and security concern. ETS Daniel Kraak, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Francky Catthoor, Abhijit Chatterjee, Adit D. Singh, Hans-Joachim Wunderlich, Naghmeh Karimi
2018	—	`conf`	Extending Aging Monitors for Early Life and Wear-Out Failure Prevention. ATS Chang Liu, Eric Schneider, Matthias Kampmann, Sybille Hellebrand, Hans-Joachim Wunderlich
2018	J	`jnl`	Guest Editor's Introduction. IEEE Des. Test Hans-Joachim Wunderlich, Yervant Zorian
2018	J	`jnl`	Guest Editors' Introduction. IEEE Embed. Syst. Lett. Sybille Hellebrand, Jörg Henkel, Anand Raghunathan, Hans-Joachim Wunderlich
2018	—	`conf`	Multi-level timing simulation on GPUs. ASP-DAC Eric Schneider, Michael A. Kochte, Hans-Joachim Wunderlich
2018	B	`conf`	Online prevention of security violations in reconfigurable scan networks. ETS Ahmed Atteya, Michael A. Kochte, Matthias Sauer, Pascal Raiola, Bernd Becker, Hans-Joachim Wunderlich
2018	J	`jnl`	Self-Test and Diagnosis for Self-Aware Systems. IEEE Des. Test Michael A. Kochte, Hans-Joachim Wunderlich
2017	J	`jnl`	Aging Resilience and Fault Tolerance in Runtime Reconfigurable Architectures. IEEE Trans. Computers Hongyan Zhang, Lars Bauer, Michael A. Kochte, Eric Schneider, Hans-Joachim Wunderlich, Jörg Henkel
2017	Misc	`conf`	Aging monitor reuse for small delay fault testing. VTS Chang Liu, Michael A. Kochte, Hans-Joachim Wunderlich
2017	A	`conf`	Analysis and mitigation or IR-Drop induced scan shift-errors. ITC Stefan Holst, Eric Schneider, Koshi Kawagoe, Michael A. Kochte, Kohei Miyase, Hans-Joachim Wunderlich, Seiji Kajihara, Xiaoqing Wen
2017	C	`conf`	Energy-efficient and error-resilient iterative solvers for approximate computing. IOLTS Alexander Schöll, Claus Braun, Hans-Joachim Wunderlich
2017	J	`jnl`	GPU-Accelerated Simulation of Small Delay Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Eric Schneider, Michael A. Kochte, Stefan Holst, Xiaoqing Wen, Hans-Joachim Wunderlich
2017	J	`jnl`	Multi-Layer Diagnosis for Fault-Tolerant Networks-on-Chip. IEEE Trans. Computers Gert Schley, Atefe Dalirsani, Marcus Eggenberger, Nadereh Hatami, Hans-Joachim Wunderlich, Martin Radetzki
2017	B	`conf`	Probabilistic sensitization analysis for variation-aware path delay fault test evaluation. ETS Marcus Wagner, Hans-Joachim Wunderlich
2017	Misc	`conf`	Special session on early life failures. VTS Jyotirmoy V. Deshmukh, Wolfgang Kunz, Hans-Joachim Wunderlich, Sybille Hellebrand
2017	B	`conf`	Specification and verification of security in reconfigurable scan networks. ETS Michael A. Kochte, Matthias Sauer, Laura Rodríguez Gómez, Pascal Raiola, Bernd Becker, Hans-Joachim Wunderlich
2017	—	`conf`	Structure-Oriented Test of Reconfigurable Scan Networks. ATS Dominik Ull, Michael A. Kochte, Hans-Joachim Wunderlich
2017	—	`conf`	Trustworthy reconfigurable access to on-chip infrastructure. ITC-Asia Michael A. Kochte, Rafal Baranowski, Hans-Joachim Wunderlich
2016	—	`conf`	A Neural-Network-Based Fault Classifier. ATS Laura Rodríguez Gómez, Hans-Joachim Wunderlich
2016	—	`conf`	Applying efficient fault tolerance to enable the preconditioned conjugate gradient solver on approximate computing hardware. DFT Alexander Schöll, Claus Braun, Hans-Joachim Wunderlich
2016	—	`conf`	Autonomous Testing for 3D-ICs with IEEE Std. 1687. ATS Jin-Cun Ye, Michael A. Kochte, Kuen-Jong Lee, Hans-Joachim Wunderlich
2016	—	`conf`	Dependable on-chip infrastructure for dependable MPSOCs. LATS Michael A. Kochte, Hans-Joachim Wunderlich
2016	B	`conf`	ETS 2015 best paper. ETS Hans-Joachim Wunderlich, Peter C. Maxwell
2016	A	`conf`	Efficient Algorithm-Based Fault Tolerance for Sparse Matrix Operations. DSN Alexander Schöll, Claus Braun, Michael A. Kochte, Hans-Joachim Wunderlich
2016	Misc	`conf`	Fault tolerance of approximate compute algorithms. VTS Hans-Joachim Wunderlich, Claus Braun, Alexander Schöll
2016	B	`conf`	Formal verification of secure reconfigurable scan network infrastructure. ETS Michael A. Kochte, Rafal Baranowski, Matthias Sauer, Bernd Becker, Hans-Joachim Wunderlich
2016	—	`conf`	Functional Diagnosis for Graceful Degradation of NoC Switches. ATS Atefe Dalirsani, Hans-Joachim Wunderlich
2016	—	`conf`	High-Throughput Transistor-Level Fault Simulation on GPUs. ATS Eric Schneider, Hans-Joachim Wunderlich
2016	—	`conf`	Mixed 01X-RSL-Encoding for fast and accurate ATPG with unknowns. ASP-DAC Dominik Erb, Karsten Scheibler, Michael A. Kochte, Matthias Sauer, Hans-Joachim Wunderlich, Bernd Becker
2016	C	`conf`	Pushing the limits: How fault tolerance extends the scope of approximate computing. IOLTS Hans-Joachim Wunderlich, Claus Braun, Alexander Schöll
2016	—	`conf`	Test Strategies for Reconfigurable Scan Networks. ATS Michael A. Kochte, Rafal Baranowski, Marcel Schaal, Hans-Joachim Wunderlich
2016	—	`conf`	Timing-Accurate Estimation of IR-Drop Impact on Logic- and Clock-Paths During At-Speed Scan Test. ATS Stefan Holst, Eric Schneider, Xiaoqing Wen, Seiji Kajihara, Yuta Yamato, Hans-Joachim Wunderlich, Michael A. Kochte
2015	J	`jnl`	Accurate QBF-Based Test Pattern Generation in Presence of Unknown Values. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Dominik Erb, Michael A. Kochte, Sven Reimer, Matthias Sauer, Hans-Joachim Wunderlich, Bernd Becker
2015	J	`jnl`	Adaptive multi-layer techniques for increased system dependability. it Inf. Technol. Lars Bauer, Jörg Henkel, Andreas Herkersdorf, Michael A. Kochte, Johannes Maximilian Kühn, Wolfgang Rosenstiel, Thomas Schweizer, Stefan Wallentowitz, Volker Wenzel, Thomas Wild, Hans-Joachim Wunderlich, Hongyan Zhang
2015	C	`conf`	Efficient observation point selection for aging monitoring. IOLTS Chang Liu, Michael A. Kochte, Hans-Joachim Wunderlich
2015	C	`conf`	Efficient on-line fault-tolerance for the preconditioned conjugate gradient method. IOLTS Alexander Schöll, Claus Braun, Michael A. Kochte, Hans-Joachim Wunderlich
2015	J	`jnl`	Fine-Grained Access Management in Reconfigurable Scan Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich
2015	A	`conf`	GPU-accelerated small delay fault simulation. DATE Eric Schneider, Stefan Holst, Michael A. Kochte, Xiaoqing Wen, Hans-Joachim Wunderlich
2015	J	`jnl`	High-Throughput Logic Timing Simulation on GPGPUs. ACM Trans. Design Autom. Electr. Syst. Stefan Holst, Michael E. Imhof, Hans-Joachim Wunderlich
2015	—	`conf`	Intermittent and Transient Fault Diagnosis on Sparse Code Signatures. ATS Michael A. Kochte, Atefe Dalirsani, Andrea Bernabei, Martin Omaña, Cecilia Metra, Hans-Joachim Wunderlich
2015	—	`conf`	Logic/Clock-Path-Aware At-Speed Scan Test Generation for Avoiding False Capture Failures and Reducing Clock Stretch. ATS Koji Asada, Xiaoqing Wen, Stefan Holst, Kohei Miyase, Seiji Kajihara, Michael A. Kochte, Eric Schneider, Hans-Joachim Wunderlich, Jun Qian
2015	—	`conf`	Low-overhead fault-tolerance for the preconditioned conjugate gradient solver. DFTS Alexander Schöll, Claus Braun, Michael A. Kochte, Hans-Joachim Wunderlich
2015	—	`conf`	Multi-Layer Test and Diagnosis for Dependable NoCs. NOCS Hans-Joachim Wunderlich, Martin Radetzki
2015	A	`conf`	On-line prediction of NBTI-induced aging rates. DATE Rafal Baranowski, Farshad Firouzi, Saman Kiamehr, Chang Liu, Mehdi Baradaran Tahoori, Hans-Joachim Wunderlich
2015	—	`conf`	Optimized Selection of Frequencies for Faster-Than-at-Speed Test. ATS Matthias Kampmann, Michael A. Kochte, Eric Schneider, Thomas Indlekofer, Sybille Hellebrand, Hans-Joachim Wunderlich
2015	J	`jnl`	Reconfigurable Scan Networks: Modeling, Verification, and Optimal Pattern Generation. ACM Trans. Design Autom. Electr. Syst. Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich
2015	A	`conf`	STRAP: Stress-Aware Placement for Aging Mitigation in Runtime Reconfigurable Architectures. ICCAD Hongyan Zhang, Michael A. Kochte, Eric Schneider, Lars Bauer, Hans-Joachim Wunderlich, Jörg Henkel
2015	B	`conf`	Testing visions. ETS Hans-Joachim Wunderlich
2014	J	`jnl`	A New Hybrid Fault-Tolerant Architecture for Digital CMOS Circuits and Systems. J. Electron. Test. D. A. Tran, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Hans-Joachim Wunderlich
2014	A	`conf`	A-ABFT: Autonomous Algorithm-Based Fault Tolerance for Matrix Multiplications on Graphics Processing Units. DSN Claus Braun, Sebastian Halder, Hans-Joachim Wunderlich
2014	J	`jnl`	Access Port Protection for Reconfigurable Scan Networks. J. Electron. Test. Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich
2014	J	`jnl`	Adaptive Bayesian Diagnosis of Intermittent Faults. J. Electron. Test. Laura Rodríguez Gómez, Alejandro Cook, Thomas Indlekofer, Sybille Hellebrand, Hans-Joachim Wunderlich
2014	—	`conf`	Adaptive parallel simulation of a two-timescale model for apoptotic receptor-clustering on GPUs. BIBM Alexander Schöll, Claus Braun, Markus Daub, Guido Schneider, Hans-Joachim Wunderlich
2014	A*	`conf`	Advanced Diagnosis: SBST and BIST Integration in Automotive E/E Architectures. DAC Felix Reimann, Michael Glaß, Jürgen Teich, Alejandro Cook, Laura Rodríguez Gómez, Dominik Ull, Hans-Joachim Wunderlich, Piet Engelke, Ulrich Abelein
2014	C	`conf`	Area-efficient synthesis of fault-secure NoC switches. IOLTS Atefe Dalirsani, Michael A. Kochte, Hans-Joachim Wunderlich
2014	A	`conf`	Bit-Flipping Scan - A unified architecture for fault tolerance and offline test. DATE Michael E. Imhof, Hans-Joachim Wunderlich
2014	A	`conf`	Data-parallel simulation for fast and accurate timing validation of CMOS circuits. ICCAD Eric Schneider, Stefan Holst, Xiaoqing Wen, Hans-Joachim Wunderlich
2014	B	`conf`	Diagnosis of multiple faults with highly compacted test responses. ETS Alejandro Cook, Hans-Joachim Wunderlich
2014	J	`jnl`	Exact Logic and Fault Simulation in Presence of Unknowns. ACM Trans. Design Autom. Electr. Syst. Dominik Erb, Michael A. Kochte, Matthias Sauer, Stefan Hillebrecht, Tobias Schubert, Hans-Joachim Wunderlich, Bernd Becker
2014	A	`conf`	FAST-BIST: Faster-than-at-Speed BIST targeting hidden delay defects. ITC Sybille Hellebrand, Thomas Indlekofer, Matthias Kampmann, Michael A. Kochte, Chang Liu, Hans-Joachim Wunderlich
2014	A*	`conf`	GUARD: GUAranteed Reliability in Dynamically Reconfigurable Systems. DAC Hongyan Zhang, Michael A. Kochte, Michael E. Imhof, Lars Bauer, Hans-Joachim Wunderlich, Jörg Henkel
2014	—	`conf`	High Quality System Level Test and Diagnosis. ATS Artur Jutman, Matteo Sonza Reorda, Hans-Joachim Wunderlich
2014	B	`conf`	Incremental computation of delay fault detection probability for variation-aware test generation. ETS Marcus Wagner, Hans-Joachim Wunderlich
2014	J	`jnl`	Multilevel Simulation of Nonfunctional Properties by Piecewise Evaluation. ACM Trans. Design Autom. Electr. Syst. Nadereh Hatami, Rafal Baranowski, Paolo Prinetto, Hans-Joachim Wunderlich
2014	A	`conf`	Non-intrusive integration of advanced diagnosis features in automotive E/E-architectures. DATE Ulrich Abelein, Alejandro Cook, Piet Engelke, Michael Glaß, Felix Reimann, Laura Rodríguez Gómez, Thomas Russ, Jürgen Teich, Dominik Ull, Hans-Joachim Wunderlich
2014	—	`conf`	On Covering Structural Defects in NoCs by Functional Tests. ATS Atefe Dalirsani, Nadereh Hatami, Michael E. Imhof, Marcus Eggenberger, Gert Schley, Martin Radetzki, Hans-Joachim Wunderlich
2014	J	`jnl`	Resilience Articulation Point (RAP): Cross-layer dependability modeling for nanometer system-on-chip resilience. Microelectron. Reliab. Andreas Herkersdorf, Hananeh Aliee, Michael Engel, Michael Glaß, Christina Gimmler-Dumont, Jörg Henkel, Veit Kleeberger, Michael A. Kochte, Johannes Maximilian Kühn, Daniel Mueller-Gritschneder, Sani R. Nassif, Holm Rauchfuss, Wolfgang Rosenstiel, Ulf Schlichtmann, Muhammad Shafique, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Christian Weis, Hans-Joachim Wunderlich
2014	J	`jnl`	SAT-based ATPG beyond stuck-at fault testing. it Inf. Technol. Sybille Hellebrand, Hans-Joachim Wunderlich
2014	Misc	`conf`	Structural Software-Based Self-Test of Network-on-Chip. VTS Atefe Dalirsani, Michael E. Imhof, Hans-Joachim Wunderlich
2014	A	`conf`	Test pattern generation in presence of unknown values based on restricted symbolic logic. ITC Dominik Erb, Karsten Scheibler, Michael A. Kochte, Matthias Sauer, Hans-Joachim Wunderlich, Bernd Becker
2014	B	`conf`	Variation-aware deterministic ATPG. ETS Matthias Sauer, Ilia Polian, Michael E. Imhof, Abdullah Mumtaz, Eric Schneider, Alexander Czutro, Hans-Joachim Wunderlich, Bernd Becker
2014	—	`conf`	Verifikation Rekonfigurierbarer Scan-Netze. MBMV Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich
2013	—	`conf`	Accurate Multi-cycle ATPG in Presence of X-Values. Asian Test Symposium Dominik Erb, Michael A. Kochte, Matthias Sauer, Hans-Joachim Wunderlich, Bernd Becker
2013	A	`conf`	Accurate QBF-based test pattern generation in presence of unknown values. DATE Stefan Hillebrecht, Michael A. Kochte, Dominik Erb, Hans-Joachim Wunderlich, Bernd Becker
2013	C	`conf`	Efficacy and efficiency of algorithm-based fault-tolerance on GPUs. IOLTS Hans-Joachim Wunderlich, Claus Braun, Sebastian Halder
2013	A	`conf`	Efficient variation-aware statistical dynamic timing analysis for delay test applications. DATE Marcus Wagner, Hans-Joachim Wunderlich
2013	A	`conf`	Module diversification: Fault tolerance and aging mitigation for runtime reconfigurable architectures. ITC Hongyan Zhang, Lars Bauer, Michael A. Kochte, Eric Schneider, Claus Braun, Michael E. Imhof, Hans-Joachim Wunderlich, Jörg Henkel
2013	—	`conf`	SAT-based code synthesis for fault-secure circuits. DFTS Atefe Dalirsani, Michael A. Kochte, Hans-Joachim Wunderlich
2013	B	`conf`	Scan pattern retargeting and merging with reduced access time. ETS Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich
2013	—	`conf`	Securing Access to Reconfigurable Scan Networks. Asian Test Symposium Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich
2013	—	`conf`	Synthesis of workload monitors for on-line stress prediction. DFTS Rafal Baranowski, Alejandro Cook, Michael E. Imhof, Chang Liu, Hans-Joachim Wunderlich
2013	J	`jnl`	Test Strategies for Reliable Runtime Reconfigurable Architectures. IEEE Trans. Computers Lars Bauer, Claus Braun, Michael E. Imhof, Michael A. Kochte, Eric Schneider, Hongyan Zhang, Jörg Henkel, Hans-Joachim Wunderlich
2012	Misc	`conf`	A pseudo-dynamic comparator for error detection in fault tolerant architectures. VTS D. A. Tran, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Michael E. Imhof, Hans-Joachim Wunderlich
2012	C	`conf`	Acceleration of Monte-Carlo molecular simulations on hybrid computing architectures. ICCD Claus Braun, Stefan Holst, Hans-Joachim Wunderlich, Juan Manuel Castillo-Sanchez, Joachim Gross
2012	J	`jnl`	Accurate X-Propagation for Test Applications by SAT-Based Reasoning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Michael A. Kochte, Melanie Elm, Hans-Joachim Wunderlich
2012	B	`conf`	Built-in self-diagnosis exploiting strong diagnostic windows in mixed-mode test. ETS Alejandro Cook, Sybille Hellebrand, Hans-Joachim Wunderlich
2012	—	`conf`	Built-in self-diagnosis targeting arbitrary defects with partial pseudo-exhaustive test. LATW Alejandro Cook, Sybille Hellebrand, Michael E. Imhof, Abdullah Mumtaz, Hans-Joachim Wunderlich
2012	B	`conf`	Efficient system-level aging prediction. ETS Nadereh Hatami, Rafal Baranowski, Paolo Prinetto, Hans-Joachim Wunderlich
2012	B	`conf`	Exact stuck-at fault classification in presence of unknowns. ETS Stefan Hillebrecht, Michael A. Kochte, Hans-Joachim Wunderlich, Bernd Becker
2012	A	`conf`	Modeling, verification and pattern generation for reconfigurable scan networks. ITC Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich
2012	—	`conf`	OTERA: Online test strategies for reliable reconfigurable architectures - Invited paper for the AHS-2012 special session "Dependability by reconfigurable hardware". AHS Lars Bauer, Claus Braun, Michael E. Imhof, Michael A. Kochte, Hongyan Zhang, Hans-Joachim Wunderlich, Jörg Henkel
2012	—	`conf`	Parallel simulation of apoptotic receptor-clustering on GPGPU many-core architectures. BIBM Claus Braun, Markus Daub, Alexander Schöll, Guido Schneider, Hans-Joachim Wunderlich
2012	—	`conf`	Reuse of Structural Volume Test Methods for In-System Testing of Automotive ASICs. Asian Test Symposium Alejandro Cook, Dominik Ull, Melanie Elm, Hans-Joachim Wunderlich, Helmut Randoll, Stefan Dohren
2012	—	`conf`	Scan Test Power Simulation on GPGPUs. Asian Test Symposium Stefan Holst, Eric Schneider, Hans-Joachim Wunderlich
2012	J	`jnl`	Structural Test and Diagnosis for Graceful Degradation of NoC Switches. J. Electron. Test. Atefe Dalirsani, Stefan Holst, Melanie Elm, Hans-Joachim Wunderlich
2012	C	`conf`	Transparent structural online test for reconfigurable systems. IOLTS Mohamed Abdelfattah, Lars Bauer, Claus Braun, Michael E. Imhof, Michael A. Kochte, Hongyan Zhang, Jörg Henkel, Hans-Joachim Wunderlich
2012	—	`conf`	Variation-Aware Fault Grading. Asian Test Symposium Alexander Czutro, Michael E. Imhof, J. Jiang, Abdullah Mumtaz, Matthias Sauer, Bernd Becker, Ilia Polian, Hans-Joachim Wunderlich
2011	—	`conf`	A Hybrid Fault Tolerant Architecture for Robustness Improvement of Digital Circuits. Asian Test Symposium D. A. Tran, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Hans-Joachim Wunderlich
2011	Misc	`conf`	Design and architectures for dependable embedded systems. CODES+ISSS Jörg Henkel, Lars Bauer, Joachim Becker, Oliver Bringmann, Uwe Brinkschulte, Samarjit Chakraborty, Michael Engel, Rolf Ernst, Hermann Härtig, Lars Hedrich, Andreas Herkersdorf, Rüdiger Kapitza, Daniel Lohmann, Peter Marwedel, Marco Platzner, Wolfgang Rosenstiel, Ulf Schlichtmann, Olaf Spinczyk, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Hans-Joachim Wunderlich
2011	—	`conf`	Diagnostic Test of Robust Circuits. Asian Test Symposium Alejandro Cook, Sybille Hellebrand, Thomas Indlekofer, Hans-Joachim Wunderlich
2011	—	`conf`	Efficient BDD-based Fault Simulation in Presence of Unknown Values. Asian Test Symposium Michael A. Kochte, Sandip Kundu, Kohei Miyase, Xiaoqing Wen, Hans-Joachim Wunderlich
2011	J	`jnl`	Efficient multi-level fault simulation of HW/SW systems for structural faults. Sci. China Inf. Sci. Rafal Baranowski, Stefano Di Carlo, Nadereh Hatami, Michael E. Imhof, Michael A. Kochte, Paolo Prinetto, Hans-Joachim Wunderlich, Christian G. Zoellin
2011	—	`conf`	Embedded Test for Highly Accurate Defect Localization. Asian Test Symposium Abdullah Mumtaz, Michael E. Imhof, Stefan Holst, Hans-Joachim Wunderlich
2011	C	`conf`	Fail-safety in core-based system design. IOLTS Rafal Baranowski, Hans-Joachim Wunderlich
2011	A	`conf`	P-PET: Partial pseudo-exhaustive test for high defect coverage. ITC Abdullah Mumtaz, Michael E. Imhof, Hans-Joachim Wunderlich
2011	A	`conf`	SAT-based capture-power reduction for at-speed broadcast-scan-based test compression architectures. ISLPED Michael A. Kochte, Kohei Miyase, Xiaoqing Wen, Seiji Kajihara, Yuta Yamato, Kazunari Enokimoto, Hans-Joachim Wunderlich
2011	A	`conf`	SAT-based fault coverage evaluation in the presence of unknown values. DATE Michael A. Kochte, Hans-Joachim Wunderlich
2011	C	`conf`	Soft error correction in embedded storage elements. IOLTS Michael E. Imhof, Hans-Joachim Wunderlich
2011	B	`conf`	Structural In-Field Diagnosis for Random Logic Circuits. ETS Alejandro Cook, Melanie Elm, Hans-Joachim Wunderlich, Ulrich Abelein
2011	B	`conf`	Structural Test for Graceful Degradation of NoC Switches. ETS Atefe Dalirsani, Stefan Holst, Melanie Elm, Hans-Joachim Wunderlich
2011	B	`conf`	Towards Variation-Aware Test Methods. ETS Ilia Polian, Bernd Becker, Sybille Hellebrand, Hans-Joachim Wunderlich, Peter C. Maxwell
2011	J	`jnl`	Variation-aware fault modeling. Sci. China Inf. Sci. Fabian Hopsch, Bernd Becker, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, Hans-Joachim Wunderlich
2010	B	`conf`	Algorithm-based fault tolerance for many-core architectures. ETS Claus Braun, Hans-Joachim Wunderlich
2010	J	`jnl`	Algorithmen-basierte Fehlertoleranz für Many-Core-Architekturen (Algorithm-based Fault-Tolerance on Many-Core Architectures). it Inf. Technol. Claus Braun, Hans-Joachim Wunderlich
2010	A	`conf`	BISD: Scan-based Built-In self-diagnosis. DATE Melanie Elm, Hans-Joachim Wunderlich
2010	J	`jnl`	Efficient Concurrent Self-Test with Partially Specified Patterns. J. Electron. Test. Michael A. Kochte, Christian G. Zoellin, Hans-Joachim Wunderlich
2010	—	`conf`	Efficient Simulation of Structural Faults for the Reliability Evaluation at System-Level. Asian Test Symposium Michael A. Kochte, Christian G. Zoellin, Rafal Baranowski, Michael E. Imhof, Hans-Joachim Wunderlich, Nadereh Hatami, Stefano Di Carlo, Paolo Prinetto
2010	A*	`conf`	Efficient fault simulation on many-core processors. DAC Michael A. Kochte, Marcel Schaal, Hans-Joachim Wunderlich, Christian G. Zoellin
2010	Misc	`conf`	Low-power test planning for arbitrary at-speed delay-test clock schemes. VTS Christian G. Zoellin, Hans-Joachim Wunderlich
2010	—	`conf`	Massive statistical process variations: A grand challenge for testing nanoelectronic circuits. DSN Workshops Bernd Becker, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, Hans-Joachim Wunderlich
2010	—	`conf`	On Determining the Real Output Xs by SAT-Based Reasoning. Asian Test Symposium Melanie Elm, Michael A. Kochte, Hans-Joachim Wunderlich
2010	A	`conf`	Parity prediction synthesis for nano-electronic gate designs. ITC D. A. Tran, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Hans-Joachim Wunderlich
2010	A	`conf`	System reliability evaluation using concurrent multi-level simulation of structural faults. ITC Michael A. Kochte, Christian G. Zoellin, Rafal Baranowski, Michael E. Imhof, Hans-Joachim Wunderlich, Nadereh Hatami, Stefano Di Carlo, Paolo Prinetto
2010	—	`conf`	Variation-Aware Fault Modeling. Asian Test Symposium Fabian Hopsch, Bernd Becker, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, Hans-Joachim Wunderlich
2009	A	`conf`	A diagnosis algorithm for extreme space compaction. DATE Stefan Holst, Hans-Joachim Wunderlich
2009	J	`jnl`	Adaptive Debug and Diagnosis Without Fault Dictionaries. J. Electron. Test. Stefan Holst, Hans-Joachim Wunderlich
2009	B	`conf`	Concurrent Self-Test with Partially Specified Patterns for Low Test Latency and Overhead. ETS Michael A. Kochte, Christian G. Zoellin, Hans-Joachim Wunderlich
2009	Misc	`conf`	Restrict Encoding for Mixed-Mode BIST. VTS Abdul Wahid Hakmi, Stefan Holst, Hans-Joachim Wunderlich, Jürgen Schlöffel, Friedrich Hapke, Andreas Glowatz
2009	—	`conf`	Software-Based Hardware Fault Tolerance for Many-Core Architectures. DFT Hans-Joachim Wunderlich
2009	B	`conf`	Test Encoding for Extreme Response Compaction. ETS Michael A. Kochte, Stefan Holst, Melanie Elm, Hans-Joachim Wunderlich
2009	A	`conf`	Test exploration and validation using transaction level models. DATE Michael A. Kochte, Christian G. Zoellin, Michael E. Imhof, Rauf Salimi Khaligh, Martin Radetzki, Hans-Joachim Wunderlich, Stefano Di Carlo, Paolo Prinetto
2008	B	`conf`	Adaptive Debug and Diagnosis without Fault Dictionaries. ETS Stefan Holst, Hans-Joachim Wunderlich
2008	C	`conf`	Integrating Scan Design and Soft Error Correction in Low-Power Applications. IOLTS Michael E. Imhof, Hans-Joachim Wunderlich, Christian G. Zoellin
2008	A	`conf`	Scan Chain Organization for Embedded Diagnosis. DATE Melanie Elm, Hans-Joachim Wunderlich
2008	A*	`conf`	Scan chain clustering for test power reduction. DAC Melanie Elm, Hans-Joachim Wunderlich, Michael E. Imhof, Christian G. Zoellin, Jens Leenstra, Nicolas Mäding
2008	B	`conf`	Selective Hardening in Early Design Steps. ETS Christian G. Zoellin, Hans-Joachim Wunderlich, Ilia Polian, Bernd Becker
2008	Misc	`conf`	Signature Rollback - A Technique for Testing Robust Circuits. VTS Uranmandakh Amgalan, Christian Hachmann, Sybille Hellebrand, Hans-Joachim Wunderlich
2008	—	`conf`	Test Set Stripping Limiting the Maximum Number of Specified Bits. DELTA Michael A. Kochte, Christian G. Zoellin, Michael E. Imhof, Hans-Joachim Wunderlich
2007	—	`conf`	A Refined Electrical Model for Particle Strikes and its Impact on SEU Prediction. DFT Sybille Hellebrand, Christian G. Zoellin, Hans-Joachim Wunderlich, Stefan Ludwig, Torsten Coym, Bernd Straube
2007	B	`conf`	Adaptive Debug and Diagnosis without Fault Dictionaries. ETS Stefan Holst, Hans-Joachim Wunderlich
2007	B	`conf`	An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy. ETS Philipp Öhler, Sybille Hellebrand, Hans-Joachim Wunderlich
2007	C	`conf`	Analyzing Test and Repair Times for 2D Integrated Memory Built-in Test and Repair. DDECS Philipp Öhler, Sybille Hellebrand, Hans-Joachim Wunderlich
2007	J	`jnl`	Deterministic logic BIST for transition fault testing. IET Comput. Digit. Tech. Valentin Gherman, Hans-Joachim Wunderlich, Jürgen Schlöffel, Michael Garbers
2007	A	`conf`	Programmable deterministic Built-In Self-Test. ITC Abdul Wahid Hakmi, Hans-Joachim Wunderlich, Christian G. Zoellin, Andreas Glowatz, Friedrich Hapke, Jürgen Schlöffel, Laurent Souef
2007	A*	`conf`	Scan Test Planning for Power Reduction. DAC Michael E. Imhof, Christian G. Zoellin, Hans-Joachim Wunderlich, Nicolas Mäding, Jens Leenstra
2007	—	`conf`	Synthesis of irregular combinational functions with large don't care sets. ACM Great Lakes Symposium on VLSI Valentin Gherman, Hans-Joachim Wunderlich, R. D. Mascarenhas, Jürgen Schlöffel, Michael Garbers
2006	A	`conf`	BIST Power Reduction Using Scan-Chain Disable in the Cell Processor. ITC Christian G. Zoellin, Hans-Joachim Wunderlich, Nicolas Mäding, Jens Leenstra
2006	J	`jnl`	DFG-Projekt RealTest - Test und Zuverlässigkeit nanoelektronischer Systeme (DFG-Project - Test and Reliability of Nano-Electronic Systems). it Inf. Technol. Bernd Becker, Ilia Polian, Sybille Hellebrand, Bernd Straube, Hans-Joachim Wunderlich
2006	B	`conf`	Deterministic Logic BIST for Transition Fault Testing. ETS Valentin Gherman, Hans-Joachim Wunderlich, Jürgen Schlöffel, Michael Garbers
2006	A	`conf`	Software-based self-test of processors under power constraints. DATE Jun Zhou, Hans-Joachim Wunderlich
2006	—	`conf`	Some Common Aspects of Design Validation, Debug and Diagnosis. DELTA Talal Arnaout, Gunter Bartsch, Hans-Joachim Wunderlich
2006	C	`conf`	Structural-Based Power-Aware Assignment of Don't Cares for Peak Power Reduction during Scan Testing. VLSI-SoC Nabil Badereddine, Patrick Girard, Serge Pravossoudovitch, Christian Landrault, Arnaud Virazel, Hans-Joachim Wunderlich
2006	J	`jnl`	X-masking during logic BIST and its impact on defect coverage. IEEE Trans. Very Large Scale Integr. Syst. Yuyi Tang, Hans-Joachim Wunderlich, Piet Engelke, Ilia Polian, Bernd Becker, Jürgen Schlöffel, Friedrich Hapke, Michael Wittke
2005	—	`conf`	Development of an audio player as system-on-a-chip using an open source platform. ISCAS (3) Pattara Kiatisevi, Luis Leonardo Azuara-Gomez, Rainer Dorsch, Hans-Joachim Wunderlich
2005	B	`conf`	From embedded test to embedded diagnosis. ETS Hans-Joachim Wunderlich
2005	Misc	`conf`	Implementing a Scheme for External Deterministic Self-Test. VTS Abdul Wahid Hakmi, Hans-Joachim Wunderlich, Valentin Gherman, Michael Garbers, Jürgen Schlöffel
2005	B	`conf`	On the Reliability Evaluation of SRAM-Based FPGA Designs. FPL Olivier Héron, Talal Arnaout, Hans-Joachim Wunderlich
2005	—	`conf`	Software-basierender Selbsttest von Prozessorkernen unter Verlustleistungsbeschränkung. GI Jahrestagung (1) Jun Zhou, Hans-Joachim Wunderlich
2004	—	`conf`	Digital, Memory and Mixed-Signal Test Engineering Education: Five Centres of Competence in Europ. DELTA Marie-Lise Flottes, Yves Bertrand, Luz Balado, Emili Lupon, Anton Biasizzo, Franc Novak, Stefano Di Carlo, Paolo Prinetto, Nicoleta Pricopi, Hans-Joachim Wunderlich
2004	A	`conf`	Efficient Pattern Mapping for Deterministic Logic BIST. ITC Valentin Gherman, Hans-Joachim Wunderlich, Harald P. E. Vranken, Friedrich Hapke, Michael Wittke, Michael Garbers
2004	A	`conf`	Impact of Test Point Insertion on Silicon Area and Timing during Layout. DATE Harald P. E. Vranken, Ferry Syafei Sapei, Hans-Joachim Wunderlich
2004	J	`jnl`	Panel Summaries. IEEE Des. Test Comput. Hans-Joachim Wunderlich, Sandeep K. Shukla
2004	—	`conf`	Reliability Considerations forMechatronic Systems on the Basis of a State Model. ARCS Workshops Talal Arnaout, Peter Göhner, Hans-Joachim Wunderlich, Eduard Zimmer
2004	A	`conf`	X-Masking During Logic BIST and Its Impact on Defect Coverage. ITC Yuyi Tang, Hans-Joachim Wunderlich, Harald P. E. Vranken, Friedrich Hapke, Michael Wittke, Piet Engelke, Ilia Polian, Bernd Becker
2003	J	`jnl`	Introduction. ACM Trans. Design Autom. Electr. Syst. Shishpal Rawat, Hans-Joachim Wunderlich
2003	—	`conf`	Test Engineering Education in Europe: the EuNICE-Test Project. MSE Yves Bertrand, Marie-Lise Flottes, Luz Balado, Joan Figueras, Anton Biasizzo, Franc Novak, Stefano Di Carlo, Paolo Prinetto, Nicoleta Pricopi, Hans-Joachim Wunderlich, Jean-Pierre Van der Heyden
2002	J	`jnl`	A Mixed-Mode BIST Scheme Based on Folding Compression. J. Comput. Sci. Technol. Huaguo Liang, Sybille Hellebrand, Hans-Joachim Wunderlich
2002	A	`conf`	Adapting an SoC to ATE Concurrent Test Capabilities. ITC Rainer Dorsch, Ramón Huerta Rivera, Hans-Joachim Wunderlich, Martin Fischer
2002	—	`conf`	Combining deterministic logic BIST with test point insertion. ETW Harald P. E. Vranken, Florian Meister, Hans-Joachim Wunderlich
2002	J	`jnl`	Efficient Online and Offline Testing of Embedded DRAMs. IEEE Trans. Computers Sybille Hellebrand, Hans-Joachim Wunderlich, Alexander A. Ivaniuk, Yuri V. Klimets, Vyacheslav N. Yarmolik
2002	J	`jnl`	High Defect Coverage with Low-Power Test Sequences in a BIST Environment. IEEE Des. Test Comput. Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Hans-Joachim Wunderlich
2002	—	`conf`	RESPIN++ - deterministic embedded test. ETW Lars Schäfer, Rainer Dorsch, Hans-Joachim Wunderlich
2002	J	`jnl`	Reusing Scan Chains for Test Pattern Decompression. J. Electron. Test. Rainer Dorsch, Hans-Joachim Wunderlich
2002	J	`jnl`	Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST. J. Electron. Test. Huaguo Liang, Sybille Hellebrand, Hans-Joachim Wunderlich
2001	J	`jnl`	A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters. J. Electron. Test. Sybille Hellebrand, Huaguo Liang, Hans-Joachim Wunderlich
2001	Misc	`conf`	A Modified Clock Scheme for a Low Power BIST Test Pattern Generator. VTS Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch, Hans-Joachim Wunderlich
2001	J	`jnl`	Application of Deterministic Logic BIST on Industrial Circuits. J. Electron. Test. Gundolf Kiefer, Harald P. E. Vranken, Erik Jan Marinissen, Hans-Joachim Wunderlich
2001	A	`conf`	Circuit partitioning for efficient logic BIST synthesis. DATE Alexander Irion, Gundolf Kiefer, Harald P. E. Vranken, Hans-Joachim Wunderlich
2001	A	`conf`	On applying the set covering model to reseeding. DATE Silvia Chiusano, Stefano Di Carlo, Paolo Prinetto, Hans-Joachim Wunderlich
2001	—	`conf`	Reusing scan chains for test pattern decompression. ETW Rainer Dorsch, Hans-Joachim Wunderlich
2001	A	`conf`	Tailoring ATPG for embedded testing. ITC Rainer Dorsch, Hans-Joachim Wunderlich
2001	A	`conf`	Two-dimensional test data compression for scan-based deterministic BIST. ITC Huaguo Liang, Sybille Hellebrand, Hans-Joachim Wunderlich
2001	A	`conf`	Using a hierarchical DfT methodology in high frequency processor designs for improved delay fault testability. ITC Michael Kessler, Gundolf Kiefer, Jens Leenstra, Knut Schünemann, Thomas Schwarz, Hans-Joachim Wunderlich
2001	A	`conf`	Using mission logic for embedded testing. DATE Rainer Dorsch, Hans-Joachim Wunderlich
2000	A	`conf`	A mixed mode BIST scheme based on reseeding of folding counters. ITC Sybille Hellebrand, Hans-Joachim Wunderlich, Huaguo Liang
2000	A	`conf`	Application of deterministic logic BIST on industrial circuits. ITC Gundolf Kiefer, Hans-Joachim Wunderlich, Harald P. E. Vranken, Erik Jan Marinissen
2000	J	`jnl`	Deterministic BIST with Partial Scan. J. Electron. Test. Gundolf Kiefer, Hans-Joachim Wunderlich
2000	J	`jnl`	Minimized Power Consumption for Scan-Based BIST. J. Electron. Test. Stefan Gerstendörfer, Hans-Joachim Wunderlich
2000	A	`conf`	Non-intrusive BIST for systems-on-a-chip. ITC Silvia Chiusano, Paolo Prinetto, Hans-Joachim Wunderlich
2000	A	`conf`	Optimal Hardware Pattern Generation for Functional BIST. DATE Silvia Cataldo, Silvia Chiusano, Paolo Prinetto, Hans-Joachim Wunderlich
1999	J	`jnl`	Deterministic BIST with Multiple Scan Chains. J. Electron. Test. Gundolf Kiefer, Hans-Joachim Wunderlich
1999	—	`conf`	Deterministic BIST with partial scan. ETW Gundolf Kiefer, Hans-Joachim Wunderlich
1999	Misc	`conf`	Error Detecting Refreshment for Embedded DRAMs. VTS Sybille Hellebrand, Hans-Joachim Wunderlich, Alexander A. Ivaniuk, Yuri V. Klimets, Vyacheslav N. Yarmolik
1999	A	`conf`	Minimized power consumption for scan-based BIST. ITC Stefan Gerstendörfer, Hans-Joachim Wunderlich
1999	A	`conf`	Symmetric Transparent BIST for RAMs. DATE Sybille Hellebrand, Hans-Joachim Wunderlich, Vyacheslav N. Yarmolik
1999	Misc	`conf`	Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms. EDCC Vyacheslav N. Yarmolik, I. V. Bykov, Sybille Hellebrand, Hans-Joachim Wunderlich
1998	A	`conf`	Accumulator based deterministic BIST. ITC Rainer Dorsch, Hans-Joachim Wunderlich
1998	J	`jnl`	BIST for systems-on-a-chip. Integr. Hans-Joachim Wunderlich
1998	A	`conf`	Deterministic BIST with multiple scan chains. ITC Gundolf Kiefer, Hans-Joachim Wunderlich
1998	Misc	`conf`	Fast Self-Recovering Controllers. VTS Andre Hertwig, Sybille Hellebrand, Hans-Joachim Wunderlich
1998	J	`jnl`	Hardware-optimal test register insertion. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Albrecht P. Stroele, Hans-Joachim Wunderlich
1998	J	`jnl`	Mixed-Mode BIST Using Embedded Processors. J. Electron. Test. Sybille Hellebrand, Hans-Joachim Wunderlich, Andre Hertwig
1998	A	`conf`	Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs. DATE Vyacheslav N. Yarmolik, Sybille Hellebrand, Hans-Joachim Wunderlich
1998	—	`conf`	Special ATPG to Correlate Test Patterns for Low-Overhead Mixed-Mode BIST. Asian Test Symposium Madhavi Karkala, Nur A. Touba, Hans-Joachim Wunderlich
1998	J	`jnl`	Synthesizing Fast, Online-Testable Control Units. IEEE Des. Test Comput. Sybille Hellebrand, Hans-Joachim Wunderlich, Andre Hertwig
1997	—	`conf`	Fast controllers for data dominated applications. ED&TC Andre Hertwig, Hans-Joachim Wunderlich
1997	J	`jnl`	Guest Editorial. J. Electron. Test. Kwang-Ting Cheng, Kewal K. Saluja, Hans-Joachim Wunderlich
1997	Misc	`conf`	Power Dissipation During Testing: Should We Worry About it? VTS Vishwani D. Agrawal, Robert C. Aitken, J. Braden, Joan Figueras, S. Kumar, Hans-Joachim Wunderlich, Yervant Zorian
1997	A	`conf`	Using BIST Control for Pattern Generation. ITC Gundolf Kiefer, Hans-Joachim Wunderlich
1996	A	`conf`	Bit-flipping BIST. ICCAD Hans-Joachim Wunderlich, Gundolf Kiefer
1996	—	`conf`	Deterministic Pattern Generation for Weighted Random Pattern Testing. ED&TC Birgit Reeb, Hans-Joachim Wunderlich
1996	A	`conf`	Mixed-Mode BIST Using Embedded Processors. ITC Sybille Hellebrand, Hans-Joachim Wunderlich, Andre Hertwig
1995	A	`conf`	Pattern generation for a deterministic BIST scheme. ICCAD Sybille Hellebrand, Birgit Reeb, Steffen Tarnick, Hans-Joachim Wunderlich
1995	—	`conf`	Synthesis of I ED&TC Hans-Joachim Wunderlich, M. Herzog, Joan Figueras, Juan A. Carrasco, Angel Calderón
1995	A	`conf`	Test register insertion with minimum hardware cost. ICCAD Albrecht P. Stroele, Hans-Joachim Wunderlich
1994	A	`conf`	An efficient procedure for the synthesis of fast self-testable controller structures. ICCAD Sybille Hellebrand, Hans-Joachim Wunderlich
1994	A	`conf`	Configuring Flip-Flops to BIST Registers. ITC Albrecht P. Stroele, Hans-Joachim Wunderlich
1994	A	`conf`	Simulation Results of an Efficient Defect-Analysis Procedure. ITC Olaf Stern, Hans-Joachim Wunderlich
1994	—	`conf`	Synthesis of Self-Testable Controllers. EDAC-ETC-EUROASIC Sybille Hellebrand, Hans-Joachim Wunderlich
1992	J	`jnl`	Optimized synthesis techniques for testable sequential circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Bernhard Eschermann, Hans-Joachim Wunderlich
1992	J	`jnl`	Prüfgerechter Entwurf und Test hochintegrierter Schaltungen. Inform. Spektrum Hans-Joachim Wunderlich, Michael H. Schulz
1992	J	`jnl`	The pseudoexhaustive test of sequential circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Hans-Joachim Wunderlich, Sybille Hellebrand
1991	A	`conf`	A Common Approach to Test Generation and Hardware Verification Based on Temporal Logic. ITC Thomas Kropf, Hans-Joachim Wunderlich
1991	A*	`conf`	A Unified Approach for the Synthesis of Self-Testable Finite State Machines. DAC Bernhard Eschermann, Hans-Joachim Wunderlich
1991	—	`conf`	Emulation of Scan Paths in Sequential Circuit Synthesis. Fault-Tolerant Computing Systems Bernhard Eschermann, Hans-Joachim Wunderlich
1991	—	`conf`	Signature Analysis and Test Scheduling for Self-Testable Circuits. FTCS Albrecht P. Stroele, Hans-Joachim Wunderlich
1991	J	`jnl`	TESTCHIP: a chip for weighted random pattern generation, evaluation, and test control. IEEE J. Solid State Circuits Albrecht P. Ströle, Hans-Joachim Wunderlich
1990	J	`jnl`	An analytical approach to the partial scan problem. J. Electron. Test. Arno Kunzmann, Hans-Joachim Wunderlich
1990	A	`conf`	Error masking in self-testable circuits. ITC Albrecht P. Stroele, Hans-Joachim Wunderlich
1990	A	`conf`	Generating pseudo-exhaustive vectors for external testing. ITC Sybille Hellebrand, Hans-Joachim Wunderlich, Oliver F. Haberl
1990	J	`jnl`	Multiple distributions for biased random test patterns. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Hans-Joachim Wunderlich
1990	—	`conf`	Optimized synthesis of self-testable finite state machines. FTCS Bernhard Eschermann, Hans-Joachim Wunderlich
1990	—	`conf`	The effectiveness of different test sets for PLAs. EURO-DAC Peter C. Maxwell, Hans-Joachim Wunderlich
1990	—	`conf`	Tools and devices supporting the pseudo-exhaustive test. EURO-DAC Sybille Hellebrand, Hans-Joachim Wunderlich
1989	A	`conf`	The Pseudo-Exhaustive Test of Sequential Circuits. ITC Sybille Hellebrand, Hans-Joachim Wunderlich
1989	—	`conf`	The design of random-testable sequential circuits. FTCS Hans-Joachim Wunderlich
1988	—	`conf`	Automatisierung des Entwurfs vollständig testbarer Schaltungen. GI Jahrestagung (2) Sybille Hellebrand, Hans-Joachim Wunderlich
1988	—	`conf`	Generating pattern sequences for the pseudo-exhaustive test of MOS-circuits. FTCS Hans-Joachim Wunderlich, Sybille Hellebrand
1988	A	`conf`	Multiple Distributions for Biased Random Test Patterns. ITC Hans-Joachim Wunderlich
1987	A*	`conf`	On Computing Optimized Input Probabilities for Random Tests. DAC Hans-Joachim Wunderlich
1987	—	`book`	Probabilistische Verfahren für den Test hochintegrierter Schaltungen Hans-Joachim Wunderlich
1986	A*	`conf`	On fault modeling for dynamic MOS circuits. DAC Hans-Joachim Wunderlich, Wolfgang Rosenstiel
1985	A*	`conf`	PROTEST: a tool for probabilistic testability analysis. DAC Hans-Joachim Wunderlich