Hanno Lieske

12 papers A* 1A 1C 2Misc 3Journal 2Unranked 3
YearRankTypeTitle / Venue / Authors
2022 J jnl
A 12-nm Autonomous Driving Processor With 60.4 TOPS, 13.8 TOPS/W CNN Executed by Task-Separated ASIL D Control.
IEEE J. Solid State Circuits
Katsushige Matsubara, Hanno Lieske, Motoki Kimura, Atsushi Nakamura, Manabu Koike, Shun Morikawa, Yoshihiko Hotta, Takahiro Irita, Seiji Mochizuki, Hiroyuki Hamasaki, Tatsuya Kamei
2021 — conf
4.2 A 12nm Autonomous-Driving Processor with 60.4TOPS, 13.8TOPS/W CNN Executed by Task-Separated ASIL D Control.
ISSCC
Katsushige Matsubara, Hanno Lieske, Motoki Kimura, Atsushi Nakamura, Manabu Koike, Kazuaki Terashima, Shun Morikawa, Yoshihiko Hotta, Takahiro Irita, Seiji Mochizuki, Hiroyuki Hamasaki, Tatsuya Kamei
2012 Misc conf
Efficient data transfer operations for a SIMD processor array system.
ICASSP
Hanno Lieske, Shorin Kyo, Shouhei Nomoto, Sunao Torii, Yuki Kobayashi, Yasuyuki Ninomiya, Shin'ichiro Okazaki
2009 — conf
IMAPCAR2: A dynamic SIMD/MIMD mode switching processor for embedded systems.
Hot Chips Symposium
Shorin Kyo, Shouhei Nomoto, Takuya Koga, Hanno Lieske, Shin'ichiro Okazaki
2007 A conf
A low-cost mixed-mode parallel processor architecture for embedded systems.
ICS
Shorin Kyo, Takuya Koga, Hanno Lieske, Shouhei Nomoto, Shin'ichiro Okazaki
2003 C conf
A compact and flexible multi-DSP system for real-time SAR applications.
IGARSS
Stefan Langemeyer, Helge Kloos, Christian Simon-Klar, Lars Friebe, Willm Hinrichs, Hanno Lieske, Peter Pirsch
2002 C conf
A multi DSP board for real time SAR processing using the HiPAR-DSP 16.
IGARSS
Christian Simon-Klar, Lars Friebe, Helge Kloos, Hanno Lieske, Willm Hinrichs, Peter Pirsch
2002 Misc conf
HiPAR-DSP 16, a scalable highly parallel DSP core for system on a chip video- and image processing applications.
ICASSP
Helge Kloos, Jens Peter Wittenburg, Willm Hinrichs, Hanno Lieske, Lars Friebe, C. Klar, Peter Pirsch
2000 J jnl
A 1.3-GOPS parallel DSP for high-performance image-processing applications.
IEEE J. Solid State Circuits
Willm Hinrichs, Jens Peter Wittenburg, Hanno Lieske, Helge Kloos, Martin Ohmacht, Peter Pirsch
1999 — conf
HiPAR-DSP: Ein 1.3 GOPS Multimedia Signalprozessor.
ARCS
Jens Peter Wittenburg, Willm Hinrichs, Martin Ohmacht, Hanno Lieske, Helge Kloos, Peter Pirsch
1998 A* conf
Realization of a Programmable Parallel DSP for High Performance Image Processing Applications.
DAC
Jens Peter Wittenburg, Willm Hinrichs, Johannes Kneip, Martin Ohmacht, Mladen Berekovic, Hanno Lieske, Helge Kloos, Peter Pirsch
1998 Misc conf
Software MPEG-2 video decoder on a 200-MHz, low-power multimedia microprocessor.
ICASSP
Kouhei Nadehara, Hanno Lieske, Ichiro Kuroda