Han Shen

74 papers A* 8A 3C 1Misc 3Journal 52Unranked 7
YearRankTypeTitle / Venue / Authors
2026 J jnl
IEEE Trans. Veh. Technol.
Han Shen, Qifu Tyler Sun, Fanyang Meng, Ye Wang, Zongpeng Li, Yongsheng Liang
2026 J jnl
CoRR
Sicheng Shen, Mingyang Lv, Han Shen, Jialin Wu, Binghao Wang, Zhou Yang, Guobin Shen, Dongcheng Zhao, Feifei Zhao, Yi Zeng
2026 J jnl
IEEE Trans. Cogn. Commun. Netw.
Jian Zou, Jian Xiao, Han Shen, Wenwu Xie, Fanyang Meng, Liang Yang, Yongsheng Liang
2026 J jnl
CoRR
Jialin Wu, Wei Shi, Han Shen, Peigui Qi, Kunsheng Tang, Zhicong Huang, Binghao Wang, Zhou Yang
2025 J jnl
IEEE Trans. Ind. Electron.
Shuwang Wang, Guanghui Wen, Han Shen, Linan Wang
2025 J jnl
Int. J. Commun. Syst.
Yanli Tu, Yu Wu, Shizheng Feng, Jiaxin Ren, Han Shen, Yuzhen Zhang, Qianwen Liu
2025 J jnl
Unmanned Syst.
Ruichen Li, Han Shen, Linan Wang, Congyi Liu, Xiao-jian Yi
2025 J jnl
IEEE Trans. Ind. Informatics
Zhou Zhou, Han Shen, Fangmin Li, Jemal H. Abawajy, Zhenli He
2025 conf
SoCC
Yihui Zhang, Han Shen, Renyu Yang, Di Tian, Yuxi Luo, Menghao Zhang, Li Li, Chunming Hu, Tianyu Wo, Chengru Song, Jin Ouyang
2025 A* conf
ASE
Xinyu Sun, Fugen Tang, Yu Zhang, Han Shen, Chengru Song, Di Zhang
2025 J jnl
IEEE Trans. Ind. Electron.
Hang Lu, Guanghui Wen, Han Shen
2025 J jnl
CoRR
Pin-Yu Chen, Han Shen, Payel Das, Tianyi Chen
2025 J jnl
CoRR
Biao Yang, Bin Wen, Boyang Ding, Changyi Liu, Chenglong Chu, Chengru Song, Chongling Rao, Chuan Yi, Da Li, Dunju Zang, Fan Yang, Guorui Zhou, Guowang Zhang, Han Shen, Hao Peng, Haojie Ding, Hao Wang, Haonan Fan, Hengrui Ju, Jiaming Huang, Jiangxia Cao, Jiankang Chen, Jingyun Hua, Kaibing Chen, Kaiyu Jiang, Kaiyu Tang, Kun Gai, Muhao Wei, Qiang Wang, Ruitao Wang, Sen Na, Shengnan Zhang, Siyang Mao, Sui Huang, Tianke Zhang, Tingting Gao, Wei Chen, Wei Yuan, Xiangyu Wu, Xiao Hu, Xingyu Lu, Yifan Zhang, Yiping Yang, Yulong Chen, Zeyi Lu, Zhenhua Wu, Zhixin Ling, Zhuoran Yang, Ziming Li, Di Xu, Haixuan Gao, Hang Li, Jing Wang, Lejian Ren, Qigen Hu, Qianqian Wang, Shiyao Wang, Xinchen Luo, Yan Li, Yuhang Hu, Zixing Zhang
2025 J jnl
CoRR
Han Shen
2025 J jnl
Math. Program.
Han Shen, Quan Xiao, Tianyi Chen
2025 A conf
CGO
Chaitanya Mamatha Ananda, Rajiv Gupta, Sriraman Tallam, Han Shen, Xinliang David Li
2025 J jnl
J. Mach. Learn. Res.
Han Shen, Zhuoran Yang, Tianyi Chen
2025 J jnl
J. Field Robotics
Guanghui Wen, Junjie Fu, Hang Lu, Jianfei Sun, Han Shen
2025 A* conf
ICLR
Han Shen, Pin-Yu Chen, Payel Das, Tianyi Chen
2024 Misc conf
ICASSP
Han Shen, Santiago Paternain, Gaowen Liu, Ramana Kompella, Tianyi Chen
2024 J jnl
IEEE Trans. Ind. Electron.
Han Shen, Guanghui Wen, Yuezu Lv, Jialing Zhou
2024 conf
ASCC
Zhenyu Yao, Han Shen, Yan Xu, Yu Chen, Jing Nie
2024 J jnl
IEEE Trans. Ind. Informatics
Han Shen, Guanghui Wen, Yuezu Lv
2024 J jnl
IEEE Trans. Ind. Informatics
Xingyun Dai, Guanghui Wen, Xiao Fang, Han Shen
2024 J jnl
Comput. Biol. Medicine
Yinglun Wang, Qiurui Chen, Hongwei Shao, Rongxin Zhang, Han Shen
2024 J jnl
Ad Hoc Networks
Zhongsheng Wang, Han Shen, Zhou Zhou
2024 Misc conf
ICASSP
A. F. M. Saif, Xiaodong Cui, Han Shen, Songtao Lu, Brian Kingsbury, Tianyi Chen
2024 J jnl
CoRR
A. F. M. Saif, Xiaodong Cui, Han Shen, Songtao Lu, Brian Kingsbury, Tianyi Chen
2024 J jnl
CoRR
Heshan Devaka Fernando, Han Shen, Parikshit Ram, Yi Zhou, Horst Samulowitz, Nathalie Baracaldo, Tianyi Chen
2024 A* conf
ICML
Han Shen, Zhuoran Yang, Tianyi Chen
2024 J jnl
CoRR
Han Shen, Zhuoran Yang, Tianyi Chen
2024 J jnl
CoRR
Han Shen, Pin-Yu Chen, Payel Das, Tianyi Chen
2023 A conf
AISTATS
Quan Xiao, Han Shen, Wotao Yin, Tianyi Chen
2023 A conf
AISTATS
Han Shen, Songtao Lu, Xiaodong Cui, Tianyi Chen
2023 A* conf
ICLR
Heshan Devaka Fernando, Han Shen, Miao Liu, Subhajit Chaudhury, Keerthiram Murugesan, Tianyi Chen
2023 A* conf
ICML
Han Shen, Tianyi Chen
2023 J jnl
CoRR
Han Shen, Tianyi Chen
2023 conf
ASPLOS (2)
Han Shen, Krzysztof Pszeniczny, Rahman Lavaee, Snehasish Kumar, Sriraman Tallam, Xinliang David Li
2023 conf
AIBDF
Han Shen, Bing Wang
2023 J jnl
IEEE Trans. Aerosp. Electron. Syst.
Mengfei Niu, Guanghui Wen, Han Shen, Yuezu Lv, Guanrong Chen
2023 J jnl
IEEE Trans. Signal Process.
Han Shen, Kaiqing Zhang, Mingyi Hong, Tianyi Chen
2023 J jnl
IEEE Trans. Ind. Informatics
Han Shen, Guanghui Wen, Yuezu Lv, Jun Zhou, Linan Wang
2022 J jnl
CoRR
Han Shen, Tianyi Chen
2022 A* conf
NeurIPS
Han Shen, Tianyi Chen
2022 J jnl
IEEE Trans. Pattern Anal. Mach. Intell.
Tao Sun, Han Shen, Tianyi Chen, Dongsheng Li
2022 J jnl
CoRR
Quan Xiao, Han Shen, Wotao Yin, Tianyi Chen
2022 J jnl
CoRR
Heshan Devaka Fernando, Han Shen, Miao Liu, Subhajit Chaudhury, Keerthiram Murugesan, Tianyi Chen
2021 J jnl
IEEE Trans. Signal Process.
Zhaoxian Wu, Han Shen, Tianyi Chen, Qing Ling
2021 Misc conf
ICASSP
Zhaoxian Wu, Han Shen, Tianyi Chen, Qing Ling
2021 J jnl
Int. J. Comput. Vis.
Hong Yan, Xuanyu Mao, Xu Yang, Yongquan Xia, Chengbin Wang, Junjun Wang, Rui Xia, Xuejing Xu, Zhiqiang Wang, Zhiyang Li, Xie Zhao, Yan Li, Guoye Liu, Li He, Zhongyu Wang, Zhiqiong Wang, Zhiqiang Li, Weidong Cai, Han Shen, Hang Chang
2021 conf
SPIoT (1)
Han Shen
2020 J jnl
CoRR
Tao Sun, Han Shen, Tianyi Chen, Dongsheng Li
2020 J jnl
CoRR
Han Shen, Kaiqing Zhang, Mingyi Hong, Tianyi Chen
2020 A* conf
AAAI
Haojie Liu, Han Shen, Lichao Huang, Ming Lu, Tong Chen, Zhan Ma
2020 J jnl
CoRR
Tao Hu, Lichao Huang, Han Shen
2020 J jnl
IEEE Access
Mubashir Hussain, Songsheng Zhu, Ping Yang, Yukun An, Zhiyang Li, Irshad Ali, Bin Liu, Han Shen, Nongyue He
2019 J jnl
CoRR
Haojie Liu, Han Shen, Lichao Huang, Ming Lu, Tong Chen, Zhan Ma
2019 conf
ICCV Workshops
Qiang Zhou, Zilong Huang, Lichao Huang, Yongchao Gong, Han Shen, Wenyu Liu, Xinggang Wang
2019 J jnl
CoRR
Hao Luo, Lichao Huang, Han Shen, Yuan Li, Chang Huang, Xinggang Wang
2019 J jnl
CoRR
Qiang Zhou, Zilong Huang, Lichao Huang, Yongchao Gong, Han Shen, Chang Huang, Wenyu Liu, Xinggang Wang
2019 J jnl
CoRR
Tao Hu, Lichao Huang, Xianming Liu, Han Shen
2018 J jnl
CoRR
Han Shen, Lichao Huang, Chang Huang, Wei Xu
2017 J jnl
Int. J. Electron. Secur. Digit. Forensics
Haoran Chen, Jianhua Chen, Han Shen
2017 conf
ASICON
Wei Yu, Jing Chang, Cheng Yang, Limin Zhang, Han Shen, Yongquan Xia, Jin Sha
2017 J jnl
Wirel. Pers. Commun.
Han Shen, Jian Shen, Muhammad Khurram Khan, Jong-Hyouk Lee
2017 J jnl
Wirel. Pers. Commun.
Han Shen, Jianhua Chen, Debiao He, Jian Shen
2016 J jnl
J. Supercomput.
Han Shen, Neeraj Kumar, Debiao He, Jian Shen, Naveen K. Chilamkurti
2016 J jnl
Secur. Commun. Networks
Han Shen, Jianhua Chen, Jian Shen, Debiao He
2016 J jnl
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Han Shen, Jianhua Chen, Hao Hu, Jian Shen
2016 J jnl
Sci. China Inf. Sci.
Debiao He, Neeraj Kumar, Han Shen, Jong-Hyouk Lee
2015 J jnl
J. Ambient Intell. Humaniz. Comput.
Han Shen, Chongzhi Gao, Debiao He, Libing Wu
2014 J jnl
Inf. Technol. Control.
Hang Tu, Han Shen, Debiao He, Jianhua Chen
1994 C conf
APSEC
Stan Jarzabek, Han Shen, Hock Chuan Chan
1994 A* conf
ICDE
Han Shen, Beng Chin Ooi, Hongjun Lu
redb/extractors/decompiler/bninja/analysis/cfg.py
← Index redb/extractors/decompiler/bninja/analysis/cfg.py python
from binaryninja.enums import LowLevelILOperation as LLIL_OP

# Support both package and standalone imports
try:
    from . import cfg_features
except ImportError:
    from redb.extractors.decompiler.bninja.analysis import cfg_features


# ---------------------------------------------------------------------------
# Task 2.2: Build LLIL operation maps at import time using real enum values
# ---------------------------------------------------------------------------

# Prime product map: LLIL operation integer value -> small prime
cfg_features.LLIL_OP_PRIMES = {
    # SET_REG, SET_REG_SPLIT
    LLIL_OP.LLIL_SET_REG.value: 2,
    LLIL_OP.LLIL_SET_REG_SPLIT.value: 2,
    # SET_FLAG
    LLIL_OP.LLIL_SET_FLAG.value: 3,
    # LOAD
    LLIL_OP.LLIL_LOAD.value: 5,
    # STORE
    LLIL_OP.LLIL_STORE.value: 7,
    # PUSH, POP
    LLIL_OP.LLIL_PUSH.value: 11,
    LLIL_OP.LLIL_POP.value: 13,
    # CALL, TAILCALL, SYSCALL
    LLIL_OP.LLIL_CALL.value: 17,
    LLIL_OP.LLIL_TAILCALL.value: 17,
    LLIL_OP.LLIL_SYSCALL.value: 19,
    # RET, NORET
    LLIL_OP.LLIL_RET.value: 23,
    LLIL_OP.LLIL_NORET.value: 23,
    # IF, GOTO
    LLIL_OP.LLIL_IF.value: 29,
    LLIL_OP.LLIL_GOTO.value: 31,
    # ADD, SUB
    LLIL_OP.LLIL_ADD.value: 37,
    LLIL_OP.LLIL_SUB.value: 41,
    # AND, OR, XOR
    LLIL_OP.LLIL_AND.value: 43,
    LLIL_OP.LLIL_OR.value: 47,
    LLIL_OP.LLIL_XOR.value: 53,
    # LSL, LSR, ASR, ROL, ROR
    LLIL_OP.LLIL_LSL.value: 59,
    LLIL_OP.LLIL_LSR.value: 61,
    LLIL_OP.LLIL_ASR.value: 67,
    LLIL_OP.LLIL_ROL.value: 71,
    LLIL_OP.LLIL_ROR.value: 73,
    # MUL, DIVU, DIVS, MODU, MODS
    LLIL_OP.LLIL_MUL.value: 79,
    LLIL_OP.LLIL_DIVU.value: 83,
    LLIL_OP.LLIL_DIVS.value: 83,
    LLIL_OP.LLIL_MODU.value: 89,
    LLIL_OP.LLIL_MODS.value: 89,
    # NEG, NOT
    LLIL_OP.LLIL_NEG.value: 97,
    LLIL_OP.LLIL_NOT.value: 101,
    # CMP_E, CMP_NE, CMP_SLT, CMP_ULT, CMP_SLE, CMP_ULE
    # CMP_SGT, CMP_UGT, CMP_SGE, CMP_UGE
    LLIL_OP.LLIL_CMP_E.value: 103,
    LLIL_OP.LLIL_CMP_NE.value: 103,
    LLIL_OP.LLIL_CMP_SLT.value: 107,
    LLIL_OP.LLIL_CMP_ULT.value: 107,
    LLIL_OP.LLIL_CMP_SLE.value: 109,
    LLIL_OP.LLIL_CMP_ULE.value: 109,
    LLIL_OP.LLIL_CMP_SGT.value: 113,
    LLIL_OP.LLIL_CMP_UGT.value: 113,
    LLIL_OP.LLIL_CMP_SGE.value: 127,
    LLIL_OP.LLIL_CMP_UGE.value: 127,
    # NOP
    LLIL_OP.LLIL_NOP.value: 1,
    # SX, ZX, LOW_PART, BOOL_TO_INT
    LLIL_OP.LLIL_SX.value: 131,
    LLIL_OP.LLIL_ZX.value: 137,
    LLIL_OP.LLIL_LOW_PART.value: 139,
    LLIL_OP.LLIL_BOOL_TO_INT.value: 149,
    # JUMP, JUMP_TO
    LLIL_OP.LLIL_JUMP.value: 151,
    LLIL_OP.LLIL_JUMP_TO.value: 151,
}

# Category map: LLIL operation integer value -> category index
_ARITHMETIC = {
    LLIL_OP.LLIL_ADD, LLIL_OP.LLIL_ADC, LLIL_OP.LLIL_SUB, LLIL_OP.LLIL_SBB,
    LLIL_OP.LLIL_MUL, LLIL_OP.LLIL_MULU_DP, LLIL_OP.LLIL_MULS_DP,
    LLIL_OP.LLIL_DIVU, LLIL_OP.LLIL_DIVU_DP, LLIL_OP.LLIL_DIVS,
    LLIL_OP.LLIL_DIVS_DP, LLIL_OP.LLIL_MODU, LLIL_OP.LLIL_MODS,
    LLIL_OP.LLIL_NEG,
}
_LOGIC = {
    LLIL_OP.LLIL_AND, LLIL_OP.LLIL_OR, LLIL_OP.LLIL_XOR, LLIL_OP.LLIL_NOT,
    LLIL_OP.LLIL_LSL, LLIL_OP.LLIL_LSR, LLIL_OP.LLIL_ASR,
    LLIL_OP.LLIL_ROL, LLIL_OP.LLIL_RLC, LLIL_OP.LLIL_ROR, LLIL_OP.LLIL_RRC,
}
_TRANSFER = {
    LLIL_OP.LLIL_SET_REG, LLIL_OP.LLIL_SET_REG_SPLIT, LLIL_OP.LLIL_SET_FLAG,
    LLIL_OP.LLIL_GOTO, LLIL_OP.LLIL_IF, LLIL_OP.LLIL_JUMP, LLIL_OP.LLIL_JUMP_TO,
    LLIL_OP.LLIL_RET, LLIL_OP.LLIL_NORET, LLIL_OP.LLIL_PUSH, LLIL_OP.LLIL_POP,
}
_CALL = {
    LLIL_OP.LLIL_CALL, LLIL_OP.LLIL_TAILCALL, LLIL_OP.LLIL_SYSCALL,
}
_COMPARISON = {
    LLIL_OP.LLIL_CMP_E, LLIL_OP.LLIL_CMP_NE,
    LLIL_OP.LLIL_CMP_SLT, LLIL_OP.LLIL_CMP_ULT,
    LLIL_OP.LLIL_CMP_SLE, LLIL_OP.LLIL_CMP_ULE,
    LLIL_OP.LLIL_CMP_SGE, LLIL_OP.LLIL_CMP_UGE,
    LLIL_OP.LLIL_CMP_SGT, LLIL_OP.LLIL_CMP_UGT,
    LLIL_OP.LLIL_TEST_BIT, LLIL_OP.LLIL_FLAG_COND,
}
_MEMORY = {
    LLIL_OP.LLIL_LOAD, LLIL_OP.LLIL_STORE,
}

cfg_features.LLIL_OP_CATEGORIES = {}
for _op in _ARITHMETIC:
    cfg_features.LLIL_OP_CATEGORIES[_op.value] = cfg_features.CAT_ARITHMETIC
for _op in _LOGIC:
    cfg_features.LLIL_OP_CATEGORIES[_op.value] = cfg_features.CAT_LOGIC
for _op in _TRANSFER:
    cfg_features.LLIL_OP_CATEGORIES[_op.value] = cfg_features.CAT_TRANSFER
for _op in _CALL:
    cfg_features.LLIL_OP_CATEGORIES[_op.value] = cfg_features.CAT_CALL
for _op in _COMPARISON:
    cfg_features.LLIL_OP_CATEGORIES[_op.value] = cfg_features.CAT_COMPARISON
for _op in _MEMORY:
    cfg_features.LLIL_OP_CATEGORIES[_op.value] = cfg_features.CAT_MEMORY

# Set of CALL operation values for counting
_CALL_OPS = {op.value for op in _CALL}


# ---------------------------------------------------------------------------
# Task 2.1 + 2.3: Rewritten CFGAnalysis
# ---------------------------------------------------------------------------

class CFGAnalysis:
    def __init__(self, function, llil_function=None):
        self.function = function
        self.llil_function = llil_function

    def extract_function_cfg(self):
        """Extract function-level CFG features as a flat dictionary."""

        if self.function is None:
            return None

        blocks = list(self.function.basic_blocks)
        if not blocks:
            return None

        n = len(blocks)

        # 1. Build index-based adjacency from Binary Ninja blocks
        addr_to_idx = {b.start: i for i, b in enumerate(blocks)}
        successors = [[] for _ in range(n)]
        predecessors = [[] for _ in range(n)]
        for i, block in enumerate(blocks):
            for edge in block.outgoing_edges:
                if edge.target is None:
                    continue
                target_idx = addr_to_idx.get(edge.target.start)
                if target_idx is not None:
                    successors[i].append(target_idx)
                    predecessors[target_idx].append(i)

        # 2. BFS order (reusable across multiple features)
        bfs = cfg_features.bfs_order(successors, n)

        # 3. Collect per-block LLIL operations (for prime product + ACFG features)
        block_llil_ops = self._collect_block_llil_ops(blocks, addr_to_idx, n)
        all_llil_ops = [op for block_ops in block_llil_ops for op in block_ops]

        # 4. Structural counts
        edge_count = sum(len(s) for s in successors)
        total_llil = sum(len(ops) for ops in block_llil_ops)
        call_count = sum(
            1 for ops in block_llil_ops for op in ops
            if op in _CALL_OPS
        )

        # 5. Compute all features
        bb_features = cfg_features.build_block_features(block_llil_ops, successors, n)

        return {
            "cfg_topology_hash": cfg_features.compute_topology_hash(successors, bfs, n),
            "block_count": n,
            "edge_count": edge_count,
            "llil_total_operations": total_llil,
            "call_count": call_count,
            "cyclomatic_complexity": edge_count - n + 2,
            "loop_count": cfg_features.count_back_edges(successors, n),
            "max_depth": cfg_features.bfs_max_depth(successors, n),
            "max_fan_out": max((len(s) for s in successors), default=0),
            "md_index_topdown": cfg_features.compute_md_index_topdown(successors, predecessors, bfs),
            "md_index_bottomup": cfg_features.compute_md_index_bottomup(successors, predecessors, n),
            "prime_product_llil": cfg_features.compute_prime_product(all_llil_ops),
            "cfg_feature_tlsh": cfg_features.compute_cfg_feature_tlsh(bb_features, bfs),
            "wl_minhash": cfg_features.compute_wl_minhash(successors, predecessors, bb_features, n),
            "bb_features": bb_features,
            "cfg_adjacency": cfg_features.pack_adjacency(successors),
        }

    def _collect_block_llil_ops(self, blocks, addr_to_idx, n):
        """
        Collect LLIL operation integers per native basic block.
        Walks the full expression tree of each instruction so that
        nested operations (e.g. ADD inside SET_REG) are captured.
        Returns list of n lists, one per block.
        """
        block_ops = [[] for _ in range(n)]

        if self.llil_function is None:
            return block_ops

        try:
            for llil_block in self.llil_function.basic_blocks:
                # Map LLIL block to native block via source_block
                if llil_block.source_block is not None:
                    native_idx = addr_to_idx.get(llil_block.source_block.start)
                    if native_idx is not None:
                        for instr in llil_block:
                            self._walk_llil_ops(instr, block_ops[native_idx])
        except Exception:
            pass  # Return empty ops — LLIL-dependent fields will be 0/null

        return block_ops

    @staticmethod
    def _walk_llil_ops(expr, ops_list):
        """Collect operation values from an LLIL expression tree iteratively."""
        stack = [expr]
        while stack:
            node = stack.pop()
            if hasattr(node, 'operation'):
                ops_list.append(node.operation.value)
            if hasattr(node, 'operands'):
                for operand in node.operands:
                    if hasattr(operand, 'operation'):
                        stack.append(operand)