Hamidreza Hashempour

31 papers A 7Journal 12Unranked 12

Year	Rank	Type	Title / Venue / Authors
2022	J	`jnl`	Secure SWIPT in STAR-RIS Aided Downlink MISO Rate-Splitting Multiple Access Networks. CoRR Hamidreza Hashempour, Hamed Bastami, Majid Moradikia, Seyed A. Zekavat, Hamid Behroozi, A. Lee Swindlehurst
2021	J	`jnl`	Deep-LfD: Deep robot learning from demonstrations. Softw. Impacts Amir Ghalamzan E, Kiyanoush Nazari, Hamidreza Hashempour, Fangxun Zhong
2020	J	`jnl`	A data-set of piercing needle through deformable objects for Deep Learning from Demonstrations. CoRR Hamidreza Hashempour, Kiyanoush Nazari, Fangxun Zhong, Amir Ghalamzan E
2012	J	`jnl`	Defect Oriented Testing for Analog/Mixed-Signal Designs. IEEE Des. Test Comput. Bram Kruseman, Bratislav Tasic, Camelia Hora, Jos Dohmen, Hamidreza Hashempour, Maikel van Beurden, Yizi Xing
2011	—	`conf`	A Schematic-Based Extraction Methodology for Dislocation Defects in Analog/Mixed-Signal Devices. DFT Nivesh Rai, Hamidreza Hashempour, Yizi Xing, Bram Kruseman, Said Hamdioui
2011	A	`conf`	Defect Oriented Testing for analog/mixed-signal devices. ITC Bram Kruseman, Bratislav Tasic, Camelia Hora, Jos Dohmen, Hamidreza Hashempour, Maikel van Beurden, Yizi Xing
2011	A	`conf`	Test time reduction in analogue/mixed-signal devices by defect oriented testing: An industrial example. DATE Hamidreza Hashempour, Jos Dohmen, Bratislav Tasic, Bram Kruseman, Camelia Hora, Maikel van Beurden, Yizi Xing
2010	A	`conf`	Defect-oriented cell-internal testing. ITC Friedrich Hapke, Wilfried Redemund, Jürgen Schlöffel, Rene Krenz-Baath, Andreas Glowatz, Michael Wittke, Hamidreza Hashempour, Stefan Eichenberger
2009	A	`conf`	Defect-oriented cell-aware ATPG and fault simulation for industrial cell libraries and designs. ITC Friedrich Hapke, Rene Krenz-Baath, Andreas Glowatz, Jürgen Schlöffel, Hamidreza Hashempour, Stefan Eichenberger, Camelia Hora, Dan Adolfsson
2009	J	`jnl`	Modeling and Evaluating Errors Due to Random Clock Shifts in Quantum-Dot Cellular Automata Circuits. J. Electron. Test. Faizal Karim, Marco Ottavi, Hamidreza Hashempour, Vamsi Vankamamidi, Konrad Walus, André Ivanov, Fabrizio Lombardi
2008	J	`jnl`	Device Model for Ballistic CNFETs Using the First Conducting Band. IEEE Des. Test Comput. Hamidreza Hashempour, Fabrizio Lombardi
2008	J	`jnl`	Evaluation and Analysis of Heuristic Techniques for Vector Ordering of VLSI Test Sets. IEEE Trans. Instrum. Meas. Hamidreza Hashempour, Fabrizio Lombardi
2007	J	`jnl`	An Integrated Environment for Design Verification of ATE Systems. IEEE Trans. Instrum. Meas. Hamidreza Hashempour, Fabrizio Lombardi, Warren Necoechea, Rakesh Mehta, Tim Alton
2007	A	`conf`	Circuit-level modeling and detection of metallic carbon nanotube defects in carbon nanotube FETs. DATE Hamidreza Hashempour, Fabrizio Lombardi
2007	—	`conf`	On the Error Effects of Random Clock Shifts in Quantum-Dot Cellular Automata Circuits. DFT Marco Ottavi, Hamidreza Hashempour, Vamsi Vankamamidi, Faizal Karim, Konrad Walus, André Ivanov
2006	—	`conf`	A Novel Methodology for Functional Test Data Compression. DFT Hamidreza Hashempour, Fabrizio Lombardi
2005	J	`jnl`	Analysis and evaluation of multisite testing for VLSI. IEEE Trans. Instrum. Meas. Hamidreza Hashempour, Fred J. Meyer, Fabrizio Lombardi
2005	J	`jnl`	Application of Arithmetic Coding to Compression of VLSI Test Data. IEEE Trans. Computers Hamidreza Hashempour, Fabrizio Lombardi
2005	—	`conf`	Enhancing error resilience for reliable compression of VLSI test data. ACM Great Lakes Symposium on VLSI Hamidreza Hashempour, Luca Schiano, Fabrizio Lombardi
2005	A	`conf`	Evaluation of Error-Resilience for Reliable Compression of Test Data. DATE Hamidreza Hashempour, Luca Schiano, Fabrizio Lombardi
2005	J	`jnl`	Evaluation, analysis, and enhancement of error resilience for reliable compression of VLSI test data. IEEE Trans. Instrum. Meas. Hamidreza Hashempour, Luca Schiano, Fabrizio Lombardi
2005	—	`conf`	Improving Error Resilience for Compressed Test Sets by Don't Care Assignment. SoCC Hamidreza Hashempour, Fabrizio Lombardi
2005	—	`conf`	Two dimensional reordering of functional test data for compression by ATE. ACM Great Lakes Symposium on VLSI Hamidreza Hashempour, Fabrizio Lombardi
2004	J	`jnl`	Analysis and measurement of fault coverage in a combined ATE and BIST environment. IEEE Trans. Instrum. Meas. Hamidreza Hashempour, Fred J. Meyer, Fabrizio Lombardi
2004	—	`conf`	Compression of VLSI Test Data by Arithmetic Coding. DFT Hamidreza Hashempour, Fabrizio Lombardi
2004	—	`conf`	Error-Resilient Test Data Compression Using Tunstall Codes. DFT Hamidreza Hashempour, Luca Schiano, Fabrizio Lombardi
2004	—	`conf`	Evaluation of heuristic techniques for test vector ordering. ACM Great Lakes Symposium on VLSI Hamidreza Hashempour, Fabrizio Lombardi
2003	—	`conf`	ATE-Amenable Test Data Compression with No Cyclic Scan. DFT Hamidreza Hashempour, Fabrizio Lombardi
2003	A	`conf`	Hybrid Multisite Testing at Manufacturing. ITC Hamidreza Hashempour, Fred J. Meyer, Fabrizio Lombardi, Farzin Karimi
2002	—	`conf`	A Test-Vector Generation Methodology for Crosstalk Noise Faults. DFT Hamidreza Hashempour, Yong-Bin Kim, Nohpill Park
2002	—	`conf`	Test Time Reduction in a Manufacturing Environment by Combining BIST and ATE. DFT Hamidreza Hashempour, Fred J. Meyer, Fabrizio Lombardi