Hamid Reza Zohouri

12 papers A 3B 2Journal 5Unranked 2

Year	Rank	Type	Title / Venue / Authors
2020	J	`jnl`	AN5D: Automated Stencil Framework for High-Degree Temporal Blocking on GPUs. CoRR Kazuaki Matsumura, Hamid Reza Zohouri, Mohamed Wahib, Toshio Endo, Satoshi Matsuoka
2020	A	`conf`	AN5D: automated stencil framework for high-degree temporal blocking on GPUs. CGO Kazuaki Matsumura, Hamid Reza Zohouri, Mohamed Wahib, Toshio Endo, Satoshi Matsuoka
2020	J	`jnl`	High-Performance High-Order Stencil Computation on FPGAs Using OpenCL. CoRR Hamid Reza Zohouri, Artur Podobas, Satoshi Matsuoka
2019	—	`conf`	The Memory Controller Wall: Benchmarking the Intel FPGA SDK for OpenCL Memory Interface. H2RC@SC Hamid Reza Zohouri, Satoshi Matsuoka
2019	J	`jnl`	The Memory Controller Wall: Benchmarking the Intel FPGA SDK for OpenCL Memory Interface. CoRR Hamid Reza Zohouri, Satoshi Matsuoka
2018	A	`conf`	Combined Spatial and Temporal Blocking for High-Performance Stencil Computation on FPGAs Using OpenCL. FPGA Hamid Reza Zohouri, Artur Podobas, Satoshi Matsuoka
2018	J	`jnl`	Combined Spatial and Temporal Blocking for High-Performance Stencil Computation on FPGAs Using OpenCL. CoRR Hamid Reza Zohouri, Artur Podobas, Satoshi Matsuoka
2018	J	`jnl`	High Performance Computing with FPGAs and OpenCL. CoRR Hamid Reza Zohouri
2018	—	`conf`	High-Performance High-Order Stencil Computation on FPGAs Using OpenCL. IPDPS Workshops Hamid Reza Zohouri, Artur Podobas, Satoshi Matsuoka
2017	B	`conf`	Evaluating high-level design strategies on FPGAs for high-performance computing. FPL Artur Podobas, Hamid Reza Zohouri, Naoya Maruyama, Satoshi Matsuoka
2017	B	`conf`	Evaluating high-level design strategies on FPGAs for high-performance computing. FPL Artur Podobas, Hamid Reza Zohouri, Naoya Maruyama, Satoshi Matsuoka
2016	A	`conf`	Evaluating and optimizing OpenCL kernels for high performance computing with FPGAs. SC Hamid Reza Zohouri, Naoya Maruyama, Aaron Smith, Motohiko Matsuda, Satoshi Matsuoka