Hamid Reza Pourshaghaghi

14 papers A 1C 4Journal 6Unranked 3

Year	Rank	Type	Title / Venue / Authors
2023	J	`jnl`	MTTR reduction of FPGA scrubbing: Exploring SEU sensitivity. Microprocess. Microsystems Mahsa Mousavi, Hamid Reza Pourshaghaghi, Akash Kumar, Henk Corporaal
2020	J	`jnl`	PR Microprocess. Microsystems Mark Wijtvliet, Bjarni Pont, Christiaan Brinkerink, Hamid Reza Pourshaghaghi, Roel Jordans, Jörg Hörandel, Jochem Beurskens, Ronald Bouma, Joris Dalderup, Peter Dolron, Jeroen Gubbels, Veronica Marcela Gomez Medina, Louis D. van Harten, Thijn Hermsen, Ivar Jansen, Daan Kapitein, Martijn Koedam, Ronis T. Maximidis, Kristiaan Zoontjens
2020	J	`jnl`	Special issue on cyber-physical systems design and applications related to DSD2018. Microprocess. Microsystems Dip Goswami, Hamid Reza Pourshaghaghi
2019	C	`conf`	Fault Tolerant FPGAs: Where to Spend the Effort? DSD Mahsa Mousavi, Sayandip De, Hamid Reza Pourshaghaghi, Henk Corporaal
2019	—	`conf`	Scatter Scrubbing: A Method to Reduce SEU Repair Time in FPGA Configuration Memory. DFT Mahsa Mousavi, Hamid Reza Pourshaghaghi, Henk Corporaal, Akash Kumar
2018	C	`conf`	A Generic Methodology to Compute Design Sensitivity to SEU in SRAM-Based FPGA. DSD Mahsa Mousavi, Hamid Reza Pourshaghaghi, Mohammad Tahghighi, Roel Jordans, Henk Corporaal
2018	J	`jnl`	Determining the necessity of fault tolerance techniques in FPGA devices for space missions. Microprocess. Microsystems Louis D. van Harten, Mahsa Mousavi, Roel Jordans, Hamid Reza Pourshaghaghi
2017	C	`conf`	Necessity of Fault Tolerance Techniques in Xilinx Kintex 7 FPGA Devices for Space Missions: A Case Study. DSD Louis D. van Harten, Roel Jordans, Hamid Reza Pourshaghaghi
2013	J	`jnl`	Fuzzy-Controlled Voltage Scaling Based on Supply Current Tracking. IEEE Trans. Computers Hamid Reza Pourshaghaghi, José Pineda de Gyvez
2012	A	`conf`	Sliding-Mode Control to Compensate PVT Variations in dual core systems. DATE Hamid Reza Pourshaghaghi, Hamed Fatemi, José Pineda de Gyvez
2011	C	`conf`	Process Variation Reduction for CMOS Logic Operating at Sub-threshold Supply Voltage. DSD Bo Liu, Hamid Reza Pourshaghaghi, Sebastian M. Londono, José Pineda de Gyvez
2010	J	`jnl`	Experimental Realization of a Reconfigurable Three Input, One Output Logic Function Based on a Chaotic Circuit. Int. J. Bifurc. Chaos Hamid Reza Pourshaghaghi, Reza Ahmadi, Mohammad Reza Jahed-Motlagh, Behnam Kia
2010	—	`conf`	Power-performance optimization using fuzzy control of simultaneous supply voltage and body biasing scaling. ICECS Hamid Reza Pourshaghaghi, José Pineda de Gyvez
2009	—	`conf`	Dynamic voltage scaling based on supply current tracking using fuzzy Logic controller. ICECS Hamid Reza Pourshaghaghi, José Pineda de Gyvez