Hailong Jiao

86 papers A* 1A 5B 4C 15Journal 34Unranked 27
YearRankTypeTitle / Venue / Authors
2025 — conf
23.4 Nebula: A 28nm 109.8TOPS/W 3D PNN Accelerator Featuring Adaptive Partition, Multi-Skipping, and Block-Wise Aggregation.
ISSCC
Changchun Zhou, Tianling Huang, Yanzhe Ma, Yuzhe Fu, Xiangjie Song, Siyuan Qiu, Jiacong Sun, Min Liu, Ge Li, Yifan He, Yuchao Yang, Hailong Jiao
2025 J jnl
A 15T SRAM Cell-Based Fully-Digital Computing-in-Memory Macro Supporting High Parallelism and Fine-Grained Simultaneous Read + Write + MAC Operations.
IEEE Solid State Circuits Lett.
Hao Guo, Jiawei Chen, Hailong Jiao
2025 J jnl
A Two-Stage Prediction + Detection Framework for Real-Time Epileptic Seizure Monitoring.
IEEE Trans. Instrum. Meas.
Siyuan Qiu, Wenjin Wang, Changchun Zhou, Xiaoyan Song, Jie Yang, Hailong Jiao
2025 J jnl
Automatic epileptic seizure detection with an ultra lightweight 3D-CNN model.
Biomed. Signal Process. Control.
Chenyu Xie, Siyuan Qiu, Changchun Zhou, Xiaoyan Song, Jie Yang, Jia Huang, Wenjin Wang, Hailong Jiao
2025 B conf
EGReg: Accurate and Efficient Registration of 3D Gaussian Splatting with Epipolar Geometry.
IJCNN
Tuoyu Jin, Shiqiang Long, Weimin Zhang, Hailong Jiao, Ge Li
2025 B conf
Rate-Distortion Optimized Motion Estimation for Dynamic Point Cloud Geometry Compression.
DCC
Qi Zhang, Yiting Shao, Lixuan Meng, Hailong Jiao, Shan Liu, Ge Li
2025 J jnl
Robust Monolithic 3D Carbon-Based Computing-in-SRAM With Variation-Aware Bit-Wise Data-Mapping for High-Performance and Integration Density.
IEEE Trans. Circuits Syst. I Regul. Pap.
Dengfeng Wang, Weifeng He, Qin Wang, Hailong Jiao, Yanan Sun
2024 C conf
A Low-Power Single-Phase Split-Controlled Flip-Flop With No Redundant Switching.
ISCAS
Zhuoya Yan, Yingna Huang, Hailong Jiao
2024 J jnl
Adjustable Multi-Stream Block-Wise Farthest Point Sampling Acceleration in Point Cloud Analysis.
IEEE Trans. Circuits Syst. II Express Briefs
Changchun Zhou, Yuzhe Fu, Yanzhe Ma, Eryi Han, Yifan He, Hailong Jiao
2024 J jnl
SoftAct: A High-Precision Softmax Architecture for Transformers Supporting Nonlinear Functions.
IEEE Trans. Circuits Syst. Video Technol.
Yuzhe Fu, Changchun Zhou, Tianling Huang, Eryi Han, Yifan He, Hailong Jiao
2023 J jnl
APCCAS 2022 Guest Editorial Special Issue Based on the 18th Asia Pacific Conference on Circuits and Systems.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xiaojin Zhao, Hailong Jiao, Wei Mao
2023 A conf
An Energy-Efficient 3D Point Cloud Neural Network Accelerator With Efficient Filter Pruning, MLP Fusion, and Dual-Stream Sampling.
ICCAD
Changchun Zhou, Yuzhe Fu, Min Liu, Siyuan Qiu, Ge Li, Yifan He, Hailong Jiao
2023 J jnl
C
IEEE J. Solid State Circuits
Cong Huang, Hailong Jiao
2023 J jnl
CNN Accelerator at the Edge With Adaptive Zero Skipping and Sparsity-Driven Data Flow.
IEEE Trans. Circuits Syst. Video Technol.
Ming Liu, Changchun Zhou, Siyuan Qiu, Yifan He, Hailong Jiao
2023 J jnl
LightSeizureNet: A Lightweight Deep Learning Model for Real-Time Epileptic Seizure Detection.
IEEE J. Biomed. Health Informatics
Siyuan Qiu, Wenjin Wang, Hailong Jiao
2023 J jnl
Sagitta: An Energy-Efficient Sparse 3D-CNN Accelerator for Real-Time 3-D Understanding.
IEEE Internet Things J.
Changchun Zhou, Min Liu, Siyuan Qiu, Xugang Cao, Yuzhe Fu, Yifan He, Hailong Jiao
2022 J jnl
A Bypassable Scan Flip-Flop for Low Power Testing With Data Retention Capability.
IEEE Trans. Circuits Syst. II Express Briefs
Xugang Cao, Hailong Jiao, Erik Jan Marinissen
2022 J jnl
A High-Efficiency Segmented Reconfigurable Cyclic Shifter for 5G QC-LDPC Decoder.
IEEE Trans. Circuits Syst. I Regul. Pap.
Hing-Mo Lam, Silin Lu, Hezi Qiu, Min Zhang, Hailong Jiao, Shengdong Zhang
2022 — conf
A Karnaugh Map Approximate Adder With Intrinsic Error Compensation.
APCCAS
Chenyu Xie, Chunmei Yang, Hailong Jiao
2022 — conf
An LUT-Based Multiplier Array for Systolic Array-Based Convolutional Neural Network Accelerator.
APCCAS
Ming Liu, Yifan He, Hailong Jiao
2022 J jnl
An Ultra-Low-Voltage Bit-Interleaved Synthesizable 13T SRAM Circuit.
IEEE J. Solid State Circuits
Jiacong Sun, Hao Guo, Geng Li, Hailong Jiao
2022 J jnl
An Ultralow-Power 65-nm Standard Cell Library for Near/Subthreshold Digital Circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Yuting Chen, Yuxuan Nie, Hailong Jiao
2022 J jnl
Guest Editors' Introduction: Special Issue on Design and Test of Multidie Packages.
IEEE Des. Test
Adam Cron, Hailong Jiao, Erik Jan Marinissen
2022 J jnl
Receiver Design With an Adjustable Energy-Signal-Quality Tradeoff for IoT Networks.
IEEE Internet Things J.
Paul Detterer, Majid Nabi, Hailong Jiao, Twan Basten
2022 — conf
Ternary In-Memory MAC Accelerator With Dual-6T SRAM Cell for Deep Neural Networks.
APCCAS
Xudong Wang, Geng Li, Jiacong Sun, Huanjie Fan, Yong Chen, Hailong Jiao
2021 J jnl
A 3.36-GHz Locking-Tuned Type-I Sampling PLL With -78.6-dBc Reference Spur Merging Single-Path Reference-Feedthrough-Suppression and Narrow-Pulse-Shielding Techniques.
IEEE Trans. Circuits Syst. II Express Briefs
Yunbo Huang, Yong Chen, Hailong Jiao, Pui-In Mak, Rui Paulo Martins
2021 C conf
A Hybrid Digital Transmitter Architecture for High- Efficiency and High-Speed Applications.
ISCAS
Chen Xu, Xiaolei Su, Zhengkun Shen, Dong Wang, Yi Tan, Zexue Liu, Hailong Jiao, Junhua Liu, Huailin Liao
2021 C conf
A Pull-Up Adaptive Sense Amplifier Based on Dual-Gate IGZO TFTs.
ISCAS
Silin Lu, Lei Lu, Shengdong Zhang, Hailong Jiao
2021 A* conf
An Energy-Efficient Low-Latency 3D-CNN Accelerator Leveraging Temporal Locality, Full Zero-Skipping, and Hierarchical Load Balance.
DAC
Changchun Zhou, Min Liu, Siyuan Qiu, Yifan He, Hailong Jiao
2021 J jnl
Converter-Free Power Delivery Using Voltage Stacking for Near/Subthreshold Operation.
IEEE Trans. Very Large Scale Integr. Syst.
Kamlesh Singh, Barry de Bruin, Hailong Jiao, Jos Huisken, Henk Corporaal, José Pineda de Gyvez
2021 — conf
Efficient Zero-Activation-Skipping for On-Chip Low-Energy CNN Acceleration.
AICAS
Min Liu, Yifan He, Hailong Jiao
2021 — conf
Insights of 3D Input CNN in EEG-based Emotion Recognition.
EMBC
Kris van Noord, Wenjin Wang, Hailong Jiao
2021 J jnl
Pseudo Multi-Port SRAM Circuit for Image Processing in Display Drivers.
IEEE Trans. Circuits Syst. Video Technol.
Hing-Mo Lam, Fan Guo, Hezi Qiu, Min Zhang, Hailong Jiao, Shengdong Zhang
2021 J jnl
Receiver-Sensitivity Control for Energy-Efficient IoT Networks.
IEEE Commun. Lett.
Paul Detterer, Majid Nabi, Hailong Jiao, Twan Basten
2021 C conf
Segmented Reconfigurable Cyclic Shifter for QC-LDPC Decoder.
ISCAS
Hing-Mo Lam, Silin Lu, Hezi Qiu, Hailong Jiao, Min Zhang, Shengdong Zhang
2020 J jnl
A -80 dB PSRR 4.99 ​ppm/°C TC bandgap reference with nonlinear compensation.
Microelectron. J.
Jian Liang, Shuiping Yi, Wenlong Bai, Lidan Wang, Chenchang Zhan, Congwei Liao, Hing-Mo Lam, Min Zhang, Shengdong Zhang, Hailong Jiao
2020 C conf
A Compact Low-Power Data Retention Flip-Flop with Easy-Sleep Mode.
ISCAS
Hailong Jiao, Zhanliang Zhang
2020 C conf
A Compensation System using Analog Voltage Adder with Continuous Output for AMOLED Display Drivers.
ISCAS
Hezi Qiu, Jian Liang, Wenlong Bai, Hing-Mo Lam, Junjun An, Congwei Liao, Min Zhang, Hailong Jiao, Shengdong Zhang
2020 J jnl
Monolithic 3D Carbon Nanotube Memory for Enhanced Yield and Integration Density.
IEEE Trans. Circuits Syst. I Regul. Pap.
Yanan Sun, Weifeng He, Zhigang Mao, Hailong Jiao, Volkan Kursun
2020 A conf
Trading Sensitivity for Power in an IEEE 802.15.4 Conformant Adequate Demodulator.
DATE
Paul Detterer, Cumhur Erdin, Jos Huisken, Hailong Jiao, Majid Nabi, Twan Basten, José Pineda de Gyvez
2019 — conf
A 12T Low-Power Standard-Cell Based SRAM Circuit for Ultra-Low-Voltage Operations.
ICICDT
Jiacong Sun, Hailong Jiao
2019 C conf
A Compact Low-Voltage Segmented D/A Converter with Adjustable Gamma Coefficient for AMOLED Displays.
ISCAS
Xinxin Huo, Wenlong Bai, Hing-Mo Lam, Congwei Liao, Min Zhang, Shengdong Zhang, Hailong Jiao
2019 — conf
Low Power Karnaugh Map Approximate Adder for Error Compensation in Loop Accumulations.
ICICDT
Chunmei Yang, Hailong Jiao
2019 — conf
Standard Cell Optimization for Ultra-Low-Voltage Digital Circuits.
ICICDT
Yuting Chen, Hailong Jiao
2019 — conf
Statistical Modeling and Design of a 16nm 9T SRAM Cell Considering Post-Synthesis Removal of Metallic Carbon-Nanotubes.
ICEIC
Yanan Sun, Weifeng He, Zhigang Mao, Hailong Jiao, Volkan Kursun
2019 A conf
Trading Digital Accuracy for Power in an RSSI Computation of a Sensor Network Transceiver.
DATE
Paul Detterer, Cumhur Erdin, Majid Nabi, José Pineda de Gyvez, Twan Basten, Hailong Jiao
2019 — conf
Voltage Stacked Design of a Microcontroller for Near/Sub-threshold Operation.
SoCC
Kamlesh Singh, Barry de Bruin, Jos Huisken, Hailong Jiao, José Pineda de Gyvez
2018 — conf
Achieving Low Power Classification with Classifier Ensemble.
ISVLSI
Fanglei Hu, Min Zhang, Hailong Jiao
2018 J jnl
Crosstalk-noise-aware bus coding with low-power ground-gated repeaters.
Int. J. Circuit Theory Appl.
Hailong Jiao, Rui Wang, Yifan He
2018 C conf
Datawidth-Aware Energy-Efficient Multipliers: A Case for Going Sign Magnitude.
DSD
Luc Waeijen, Hailong Jiao, Henk Corporaal, Yifan He
2018 B conf
IEEE Std P1838's flexible parallel port and its specification with Google's protocol buffers.
ETS
Yu Li, Ming Shao, Hailong Jiao, Adam Cron, Sandeep Bhatia, Erik Jan Marinissen
2018 — conf
Low power latch based design with smart retiming.
ISQED
Kamlesh Singh, Hailong Jiao, Jos Huisken, Hamed Fatemi, José Pineda de Gyvez
2018 C conf
Multi-Bit Pulsed-Latch Based Low Power Synchronous Circuit Design.
ISCAS
Kamlesh Singh, Omar Alejandro Rodriguez Rosas, Hailong Jiao, Jos Huisken, José Pineda de Gyvez
2018 A conf
On-Chip Toggle Generators to Provide Realistic Conditions during Test of Digital 2D-SoCs and 3D-SICs.
ITC
Leonidas Katselas, Alkis A. Hatzopoulos, Hailong Jiao, Christos Papameletis, Erik Jan Marinissen
2018 — conf
Understanding the Impact of Circuit-Level Inaccuracy on Sensor Network Performance.
PE-WASUN
Paul Detterer, Cumhur Erdin, Majid Nabi, Twan Basten, Hailong Jiao
2017 — conf
An analytical model for interdependent setup/hold-time characterization of flip-flops.
ISQED
Hadi Ahmadi Balef, Hailong Jiao, José Pineda de Gyvez, Kees Goossens
2017 — conf
An improved NLOS error elimination algorithm for indoor ultra-wideband localization.
IEEE SENSORS
Peng Ling, Chong Shen, Kun Zhang, Hailong Jiao, Liqiang Zheng, Xi Deng
2017 — conf
Embedded toggle generator to control the switching activity during test of digital 2D-SoCs and 3D-SICs.
PATMOS
Leonidas Katselas, Hailong Jiao, Angelos Athanasiadis, Christos Papameletis, Alkis A. Hatzopoulos, Erik Jan Marinissen
2017 — conf
Metallic-carbon-nanotube-removal tolerant SRAM cell with 9 transistors.
ASICON
Yanan Sun, Weifeng He, Zhigang Mao, Hailong Jiao, Volkan Kursun
2017 — conf
Reconfigurable Support Vector Machine Classifier with Approximate Computing.
ISVLSI
Martin Van Leussen, Jos Huisken, Lei Wang, Hailong Jiao, José Pineda de Gyvez
2016 B conf
IEEE Std P1838: DfT standard-under-development for 2.5D-, 3D-, and 5.5D-SICs.
ETS
Erik Jan Marinissen, Teresa L. McLaurin, Hailong Jiao
2016 J jnl
Low power and robust memory circuits with asymmetrical ground gating.
Microelectron. J.
Hailong Jiao, Yongmin Qiu, Volkan Kursun
2016 J jnl
Variability-aware 7T SRAM circuit with low leakage high data stability SLEEP mode.
Integr.
Hailong Jiao, Yongmin Qiu, Volkan Kursun
2016 C conf
Variations-tolerant 9T SRAM circuit with robust and low leakage SLEEP mode.
IOLTS
Hailong Jiao, Yongmin Qiu, Volkan Kursun
2015 J jnl
A Novel Robust and Low-Leakage SRAM Cell With Nine Carbon Nanotube Transistors.
IEEE Trans. Very Large Scale Integr. Syst.
Yanan Sun, Hailong Jiao, Volkan Kursun
2015 A conf
Memristor based computation-in-memory architecture for data-intensive applications.
DATE
Said Hamdioui, Lei Xie, Hoang Anh Du Nguyen, Mottaqiallah Taouil, Koen Bertels, Henk Corporaal, Hailong Jiao, Francky Catthoor, Dirk J. Wouters, Eike Linn, Jan van Lunteren
2014 — conf
Low-leakage 9-CN-MOSFET SRAM cell with enhanced read and write voltage margins.
ICM
Yanan Sun, Hailong Jiao, Volkan Kursun
2014 J jnl
Mode transition timing and energy overhead analysis in noise-aware MTCMOS circuits.
Microelectron. J.
Hailong Jiao, Volkan Kursun
2013 — conf
A novel 6T SRAM cell with asymmetrically gate underlap engineered FinFETs for enhanced read data stability and write ability.
ISQED
Shairfe Muhammad Salahuddin, Hailong Jiao, Volkan Kursun
2013 — conf
An electrostatically-driven and capacitively-sensed differential lateral resonant pressure microsensor.
NEMS
Bo Xie, Hailong Jiao, Junbo Wang, Deyong Chen, Jian Chen
2013 C conf
Characterization of mode transition timing overhead for net energy savings in low-noise MTCMOS circuits.
VLSI-SoC
Hailong Jiao, Volkan Kursun
2013 — conf
Ground gated 8T SRAM cells with enhanced read and hold data stability.
ISVLSI
Hailong Jiao, Volkan Kursun
2013 C conf
Low-leakage hybrid FinFET SRAM cell with asymmetrical gate overlap / underlap bitline access transistors for enhanced read data stability.
ISCAS
Shairfe Muhammad Salahuddin, Hailong Jiao, Volkan Kursun
2013 J jnl
Reactivation Noise Suppression With Sleep Signal Slew Rate Modulation in MTCMOS Circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Hailong Jiao, Volkan Kursun
2012 C conf
Full-custom design of low leakage data preserving ground gated 6T SRAM cells to facilitate single-ended write operations.
ISCAS
Hailong Jiao, Volkan Kursun
2012 — conf
Multi-phase sleep signal modulation for mode transition noise mitigation in MTCMOS circuits.
ISOCC
Hailong Jiao, Volkan Kursun
2012 J jnl
Threshold Voltage Tuning for Faster Activation With Lower Noise in Tri-Mode MTCMOS Circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Hailong Jiao, Volkan Kursun
2011 J jnl
Ground Bouncing Noise Suppression Techniques for Data Preserving Sequential MTCMOS Circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Hailong Jiao, Volkan Kursun
2011 J jnl
Noise-Aware Data Preserving Sequential MTCMOS Circuits with Dynamic Forward Body Bias.
J. Circuits Syst. Comput.
Hailong Jiao, Volkan Kursun
2011 — conf
Sleep signal slew rate modulation for mode transition noise suppression in ground gated integrated circuits.
SoCC
Hailong Jiao, Volkan Kursun
2010 J jnl
Ground-Bouncing-Noise-Aware Combinational MTCMOS Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap.
Hailong Jiao, Volkan Kursun
2010 J jnl
Low-Leakage and Compact Registers with Easy-Sleep Mode.
J. Low Power Electron.
Hailong Jiao, Volkan Kursun
2010 C conf
Reactivation noise suppression with threshold voltage tuning in sequential MTCMOS circuits.
VLSI-SoC
Hailong Jiao, Volkan Kursun
2010 C conf
Smooth awakenings: Reactivation noise suppressed low-leakage and robust MTCMOS flip-flops.
ISCAS
Hailong Jiao, Volkan Kursun
2010 — conf
Tri-mode Operation for Noise Reduction and Data Preservation in Low-Leakage Multi-Threshold CMOS Circuits.
VLSI-SoC (Selected Papers)
Hailong Jiao, Volkan Kursun
2008 — conf
Cellwise OPC Based on Reduced Standard Cell Library.
ISQED
Hailong Jiao, Lan Chen